+ peoples who are in CC list.
Janboe Ye
2010/5/13 ye janboe janboe...@gmail.com:
Thanks for Russell and Tony.
I think this patch is needed when MPU support OFF mode, special on
omap. Otherwise, VFP state will be lost.
Reviewed-by: Janboe Ye janboe...@gmail.com
2010/5/12 Russell King
hi, Russell, Tony
Is this patch ignored by you? I do not see any ack for this patch.
Thanks
Janboe Ye
2009/12/3 Tero Kristo tero.kri...@nokia.com:
From: Tero Kristo tero.kri...@nokia.com
In some ARM architectures, like OMAP3, the VFP context can be lost during
dynamic sleep cycle. For this
resend because little format issue.
From fc5e771b808b5bf094846051a1c59c7e5e8ec149 Mon Sep 17 00:00:00 2001
From: janboe janboe...@gmail.com
Date: Fri, 28 Aug 2009 13:50:57 +0800
Subject: [PATCH] flush the function in sdram is not correct because
sram is changed.
Signed-off-by: janboe
Signed-off-by: janboe janboe...@gmail.com
---
arch/arm/plat-omap/sram.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index f2b0fa6..f549d8a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@
Hi, Paul
I resent the patch after fix the format issue.
Please help to review it.
Thanks
Janboe
2009/8/28 Paul Walmsley p...@pwsan.com:
Hello janboe,
On Fri, 28 Aug 2009, ye janboe wrote:
From f10090bf307066f1317d7152c6f9a6f395007d4a Mon Sep 17 00:00:00 2001
From: janboe janboe
the original flush operation is to flush the function address which is
copied from.
But we do not change the function code and it is not necessary to flush it.
Signed-off-by: janboe janboe...@gmail.com
---
arch/arm/plat-omap/sram.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
From f10090bf307066f1317d7152c6f9a6f395007d4a Mon Sep 17 00:00:00 2001
From: janboe janboe...@gmail.com
Date: Fri, 28 Aug 2009 13:50:57 +0800
Subject: [PATCH] flush the function in sdram is not correct because
sram is changed.
Signed-off-by: janboe janboe...@gmail.com
---
Hi, Paul
I saw you clear clear the SDRC PWRENA bit during SDRC frequency change
but not during suspend.
Please review if it is necessary to clear PWRENA bit during suspend.
Thanks
Janboe Ye
rom 287db2e188391be0ac95128131724e0e035e945a Mon Sep 17 00:00:00 2001
From: janboe janboe...@gmail.com
Hi,
some bootloader may initialize debounce register and this will make
dbclk not consist with the debounce register after linux kernel boot
up.
From 8f97e5b50e50627e9e4b40f5d4fba09d750aceb1 Mon Sep 17 00:00:00 2001
From: janboe janboe...@gmail.com
Date: Fri, 19 Jun 2009 10:56:02 -0500
Subject: