Hi Mark,
Sorry for delayed response. I was away for some time.
On Friday 15 November 2013 04:53 PM, Mark Rutland wrote:
On Thu, Nov 14, 2013 at 04:46:36PM +, Sricharan R wrote:
Hi Mark,
On Thursday 14 November 2013 07:31 PM, Mark Rutland wrote:
On Thu, Nov 14, 2013 at 12:18:47PM +,
On Thu, Nov 14, 2013 at 04:46:36PM +, Sricharan R wrote:
Hi Mark,
On Thursday 14 November 2013 07:31 PM, Mark Rutland wrote:
On Thu, Nov 14, 2013 at 12:18:47PM +, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to
On Friday 15 November 2013 06:23 AM, Mark Rutland wrote:
On Thu, Nov 14, 2013 at 04:46:36PM +, Sricharan R wrote:
Hi Mark,
On Thursday 14 November 2013 07:31 PM, Mark Rutland wrote:
On Thu, Nov 14, 2013 at 12:18:47PM +, Sricharan R wrote:
In some socs the gic can be preceded by a
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free gic input line.
The DT entries for peripherals provides the
On Thu, 14 Nov 2013, Sricharan R wrote:
[V3] Addressed unnecessary warn-on and updated default
xlate function as per Thomas Gleixner comments
Reviewed-by: Thomas Gleixner t...@linutronix.de
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On Thursday 14 November 2013 06:03 PM, Thomas Gleixner wrote:
On Thu, 14 Nov 2013, Sricharan R wrote:
[V3] Addressed unnecessary warn-on and updated default
xlate function as per Thomas Gleixner comments
Reviewed-by: Thomas Gleixner t...@linutronix.de
Thanks Thomas..
Regards,
On Thu, Nov 14, 2013 at 12:18:47PM +, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free
Hi Mark,
On Thursday 14 November 2013 07:31 PM, Mark Rutland wrote:
On Thu, Nov 14, 2013 at 12:18:47PM +, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a
