@vger.kernel.org
Subject: Re: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
On 15 February 2011 07:14, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1140,7 +1140,7 @@ config ARM_ERRATA_742231
...@atomide.com;
linux-arm-ker...@lists.infradead.org; Catalin Marinas
Subject: RE: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
...
I understood that from first comment. But I am not in favor
of polluting common ARM files with SOC specific
On 15 February 2011 07:14, Santosh Shilimkar santosh.shilim...@ti.com wrote:
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1140,7 +1140,7 @@ config ARM_ERRATA_742231
config PL310_ERRATA_588369
bool Clean Invalidate maintenance operations do not invalidate
clean lines
-
@vger.kernel.org
Subject: Re: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
On 15 February 2011 07:14, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1140,7 +1140,7 @@ config ARM_ERRATA_742231
;
linux-arm-ker...@lists.infradead.org; Catalin Marinas
Subject: RE: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
...
I understood that from first comment. But I am not in favor
of polluting common ARM files with SOC specific #ifdeffery.
We
To: Andrei Warkentin
Cc: linux-omap@vger.kernel.org; Kevin Hilman; t...@atomide.com;
linux-arm-ker...@lists.infradead.org; Catalin Marinas
Subject: RE: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
Why set by default to NULL, why not have
;
linux-arm-ker...@lists.infradead.org; Catalin Marinas
Subject: Re: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
On Sat, Feb 12, 2011 at 11:59 AM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
-Original Message-
From: Andrei Warkentin
On Mon, Feb 14, 2011 at 1:33 PM, Andrei Warkentin andr...@motorola.com wrote:
Fair enough, but you're doing it right now :-). I believe the smarter
approach would be to start abstracting all accesses to secure-only
resources (like the DCR reg). This would be your hypervisor
interface. Then
] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
...
I understood that from first comment. But I am not in favor
of polluting common ARM files with SOC specific #ifdeffery.
We have gone over this when first errata support
was added for PL310
I have
Shilimkar
Cc: linux-omap@vger.kernel.org; khil...@ti.com; t...@atomide.com;
linux-arm-ker...@lists.infradead.org; Catalin Marinas
Subject: Re: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
Can these PL310 errata fixes be made more
] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
Can these PL310 errata fixes be made more generic? PL310 is present
in
non-OMAP platforms too, which lack the TI hypervisor. And these
platforms might have the same PL310 rev, and suffer the same
glitches
On Sat, Feb 12, 2011 at 5:29 AM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
PL310 implements the Clean Invalidate by Way L2 cache maintenance
operation (offset 0x7FC). This operation runs in background so that
PL310 can handle normal accesses while it is in progress. Under very
rare
;
linux-arm-ker...@lists.infradead.org; Catalin Marinas
Subject: Re: [PATCH 3/5] ARM: l2x0: Errata fix for flush by Way
operation can cause data corruption
[]
Can these PL310 errata fixes be made more generic? PL310 is present
in
non-OMAP platforms too, which lack the TI hypervisor
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