On 22/04/2015 at 19:04:52 -0500, Nishanth Menon wrote :
I fully agree that your patch doesn't change the behaviour for the other
cases you presented and further clean up is to be done in a separate set
of patches.
Sure,
Acked-by: Alexandre Belloni alexandre.bell...@free-electrons.com
On 04/23/2015 04:11 PM, Nishanth Menon wrote:
On 04/23/2015 05:17 AM, grygorii.stras...@linaro.org wrote:
On 04/23/2015 03:00 AM, Nishanth Menon wrote:
On 04/22/2015 08:26 AM, grygorii.stras...@linaro.org wrote:
Hi,
On 04/21/2015 03:51 AM, Nishanth Menon wrote:
Alarm interrupt enable
On 04/23/2015 05:17 AM, grygorii.stras...@linaro.org wrote:
On 04/23/2015 03:00 AM, Nishanth Menon wrote:
On 04/22/2015 08:26 AM, grygorii.stras...@linaro.org wrote:
Hi,
On 04/21/2015 03:51 AM, Nishanth Menon wrote:
Alarm interrupt enable register is at offset 0x7, while the time
registers
On 04/23/2015 03:00 AM, Nishanth Menon wrote:
On 04/22/2015 08:26 AM, grygorii.stras...@linaro.org wrote:
Hi,
On 04/21/2015 03:51 AM, Nishanth Menon wrote:
Alarm interrupt enable register is at offset 0x7, while the time
registers for the alarm follow that. When we program Alarm interrupt
Hi,
On 04/21/2015 03:51 AM, Nishanth Menon wrote:
Alarm interrupt enable register is at offset 0x7, while the time
registers for the alarm follow that. When we program Alarm interrupt
enable prior to programming the time, it is possible that previous
time value could be close or match at the
On 04/22/2015 06:30 AM, Alexandre Belloni wrote:
Apologies on a tardy response, got dragged into another issue and got
cooped up in lab whole day.
On 21/04/2015 at 20:59:15 -0500, Nishanth Menon wrote :
Why is that so? when set alarm is requested for time X, you want
interrupt at time X, not
On 04/22/2015 08:26 AM, grygorii.stras...@linaro.org wrote:
Hi,
On 04/21/2015 03:51 AM, Nishanth Menon wrote:
Alarm interrupt enable register is at offset 0x7, while the time
registers for the alarm follow that. When we program Alarm interrupt
enable prior to programming the time, it is
On 21/04/2015 at 20:59:15 -0500, Nishanth Menon wrote :
Why is that so? when set alarm is requested for time X, you want
interrupt at time X, not an interrupt for previous configured RTC
alarm time!
You expect at least an interrupt.
And you will get an interrupt if the event occurs
Hi,
On 20/04/2015 at 19:51:34 -0500, Nishanth Menon wrote :
Alarm interrupt enable register is at offset 0x7, while the time
registers for the alarm follow that. When we program Alarm interrupt
enable prior to programming the time, it is possible that previous
time value could be close or
On 21/04/2015 at 18:58:43 -0500, Nishanth Menon wrote :
Consider the following use case: a platform is setting the RTC alarm
before going to suspend to ram. Before your patch, it may be woken up
^^ precisely what I am trying to solve.
quite quickly, before expected. After your patch,
On 04/21/2015 08:09 PM, Alexandre Belloni wrote:
On 21/04/2015 at 18:58:43 -0500, Nishanth Menon wrote :
Consider the following use case: a platform is setting the RTC alarm
before going to suspend to ram. Before your patch, it may be woken up
^^ precisely what I am trying to solve.
quite
On 04/21/2015 06:41 PM, Alexandre Belloni wrote:
Hi,
On 20/04/2015 at 19:51:34 -0500, Nishanth Menon wrote :
Alarm interrupt enable register is at offset 0x7, while the time
registers for the alarm follow that. When we program Alarm interrupt
enable prior to programming the time, it is
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