Re: [RFC/PATCH-v4.2-rc6 2/5] arm: boot: dts: am4372: add ARM timers and SCU nodes

2015-08-12 Thread Felipe Balbi
On Wed, Aug 12, 2015 at 12:28:16AM -0700, Tony Lindgren wrote: * Felipe Balbi ba...@ti.com [150810 14:44]: AM437x devices sport SCU, TWD and Global timers, let's add them to DTS so they have a chance to probe and be used by Linux. Is this one safe to apply already without the Kconfig

Re: [PATCH v2 2/6] rtc: omap: Add external clock enabling support

2015-08-12 Thread Paul Walmsley
On Mon, 10 Aug 2015, Keerthy wrote: Switch to external clock source during suspend and switch back to internal source on resume. This helps rtc ticking across suspend. Doesn't this type of dynamic switching make it likely that ticks will be lost? If the external, optional source is present,

Re: [PATCH v2 5/6] ARM: AM43XX: HWMOD: Add rtc hwmod

2015-08-12 Thread Paul Walmsley
On Mon, 10 Aug 2015, Keerthy wrote: The patch adds rtc hwmod. This is present on gp and sk evm and not on epos evm. Hence adding it selectively using a seprate list. Signed-off-by: Keerthy j-keer...@ti.com So just to confirm, the RTC IP block has been physically removed or permanently

Re: [RFC/PATCH-v4.2-rc6 4/5] arm: omap2: timer: simplify omap4_local_timer_init()

2015-08-12 Thread Felipe Balbi
On Wed, Aug 12, 2015 at 12:14:24AM -0700, Tony Lindgren wrote: * Felipe Balbi ba...@ti.com [150810 14:44]: all users of omap4_local_timer_init() are already DT-only, so we can remove the check for having DTB or not. While at that, fix a typo in comment. We already have d1dabab2841d

Re: [PATCH v2 2/6] rtc: omap: Add external clock enabling support

2015-08-12 Thread Alexandre Belloni
Hi, On 13/08/2015 at 00:38:50 +0530, Keerthy wrote : The intent here is to switch to a higher precision clock which is the internal clock when available. Alexandre, Is dynamic switching preferred over sticking to external clock always if present? I'd say that I don't really care. I'd

[PATCH 2/2] clk: Convert __clk_get_name(hw-clk) to clk_hw_get_name(hw)

2015-08-12 Thread Stephen Boyd
Use the provider based method to get a clock's name so that we can get rid of the clk member in struct clk_hw one day. Mostly converted with the following coccinelle script. @@ struct clk_hw *E; @@ -__clk_get_name(E-clk) +clk_hw_get_name(E) Cc: Heiko Stuebner he...@sntech.de Cc: Sylwester

Re: [RFC/PATCH-v4.2-rc6 1/5] Revert ARM: 7655/1: smp_twd: make twd_local_timer_of_register() no-op for nosmp

2015-08-12 Thread Tony Lindgren
* Felipe Balbi ba...@ti.com [150810 14:45]: This reverts commit 904464b91eca8c665acea033489225af02eeb75a. The problem pointed out by commit 904464b91eca (ARM: 7655/1: smp_twd: make twd_local_timer_of_register() no-op for nosmp) doesn't exist anymore. We can safely boot with nosmp and the

Re: [RFC/PATCH-v4.2-rc6 4/5] arm: omap2: timer: simplify omap4_local_timer_init()

2015-08-12 Thread Tony Lindgren
* Felipe Balbi ba...@ti.com [150810 14:44]: all users of omap4_local_timer_init() are already DT-only, so we can remove the check for having DTB or not. While at that, fix a typo in comment. We already have d1dabab2841d (ARM: OMAP2+: Clean up omap4_local_timer_init) in Linux next

Re: [GIT PULL] omap clock dts changes for v4.3 merge window

2015-08-12 Thread Tony Lindgren
* Tero Kristo t-kri...@ti.com [150806 04:10]: The following changes since commit bc0195aad0daa2ad5b0d76cce22b167bc3435590: Linux 4.2-rc2 (2015-07-12 15:10:30 -0700) are available in the git repository at: https://github.com/t-kristo/linux-pm.git for-4.3/ti-clk-dt for you to fetch

Re: [PATCH] memory: omap-gpmc: Don't try to save the GPMC context

2015-08-12 Thread Tony Lindgren
* Javier Martinez Canillas jav...@dowhile0.org [150805 05:47]: Hello Tomeu, On Wed, Aug 5, 2015 at 2:24 PM, Tomeu Vizoso tomeu.viz...@collabora.com wrote: ...if there isn't one already. I think is better to instead splitting the subject line like this, to change it for something that

Re: [PATCH] ARM: OMAP3: clock: remove un-used core dpll re-program code

2015-08-12 Thread Tony Lindgren
* Tero Kristo t-kri...@ti.com [150716 01:10]: Remove the OMAP3 core DPLL re-program code, and the associated SRAM code that does the low-level programming of the DPLL divider, idling of the SDRAM etc. This code was never fully implemented in the kernel; things missing were driver side

Re: [PATCH v2 3/6] ARM: AM43xx: Introduce a separate soc_is function for am438x series of SoCs

2015-08-12 Thread Tony Lindgren
* Keerthy a0393...@ti.com [150811 10:57]: On Tuesday 11 August 2015 06:25 PM, Tony Lindgren wrote: * Keerthy j-keer...@ti.com [150810 02:31]: @@ -371,8 +372,10 @@ IS_OMAP_TYPE(3430, 0x3430) #ifdefCONFIG_SOC_AM43XX # undef soc_is_am43xx # undef soc_is_am437x -# define

Re: [RFC/PATCH-v4.2-rc6 2/5] arm: boot: dts: am4372: add ARM timers and SCU nodes

2015-08-12 Thread Tony Lindgren
* Felipe Balbi ba...@ti.com [150810 14:44]: AM437x devices sport SCU, TWD and Global timers, let's add them to DTS so they have a chance to probe and be used by Linux. Is this one safe to apply already without the Kconfig change? Or will it cause multi_v7_defconfig with the timers selected to

Re: [PATCH] ARM: dts: AM4372: Add the am4372-rtc compatible string

2015-08-12 Thread Tony Lindgren
* Keerthy j-keer...@ti.com [150806 22:10]: am4372-rtc string was already part of dts, introduced to identify the rtc specific to am4372 family of SoCs. It was removed in one of the previous patches. Adding back the same with appropriate documentation. Applying into omap-for-v4.3/dt-v2 thanks.

[net-next PATCH 2/3] ARM: dts: dra7: update cpsw compatible

2015-08-12 Thread Mugunthan V N
CPSW driver has been updated with compatibles for enabling errata workarounds. So updating cpsw compatibles. Signed-off-by: Mugunthan V N mugunthan...@ti.com --- arch/arm/boot/dts/dra7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/dra7.dtsi

[net-next PATCH 1/3] drivers: net: cpsw: add am335x errata workarround for interrutps

2015-08-12 Thread Mugunthan V N
As per Am335x Errata [1] Advisory 1.0.9, The CPSW C0_TX_PEND and C0_RX_PEND interrupt outputs provide a single transmit interrupt that combines transmit channel interrupts TXPEND[7:0] and a single receive interrupt that combines receive channel interrupts RXPEND[7:0]. The TXPEND[0] and RXPEND[0]

[net-next PATCH 3/3] ARM: dts: am33xx: update cpsw compatible

2015-08-12 Thread Mugunthan V N
CPSW driver has been updated with compatibles for enabling errata workarounds. So updating cpsw compatibles. Signed-off-by: Mugunthan V N mugunthan...@ti.com --- arch/arm/boot/dts/am33xx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am33xx.dtsi

[net-next PATCH 0/3] Add AM335x PG1.0 CPSW errata workaround

2015-08-12 Thread Mugunthan V N
With commit 870915feabdc (drivers: net: cpsw: remove disable_irq/enable_irq as irq can be masked from cpsw itself), CPSW on AM335x beagle bone white is broken as there is a errata for AM335x PG1.0. This patch series implements the workaround by disabling the interrupts from ARM IRQ controller for

Re: [PATCH] ARM: OMAP3: clock: remove un-used core dpll re-program code

2015-08-12 Thread Tony Lindgren
* Tony Lindgren t...@atomide.com [150812 00:29]: * Tero Kristo t-kri...@ti.com [150716 01:10]: Remove the OMAP3 core DPLL re-program code, and the associated SRAM code that does the low-level programming of the DPLL divider, idling of the SDRAM etc. This code was never fully

Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read

2015-08-12 Thread Vignesh R
On 08/07/2015 03:46 PM, Michal Suchanek wrote: [snip] On 7 August 2015 at 10:35, Vignesh R vigne...@ti.com wrote: On 08/07/2015 01:08 PM, Michal Suchanek wrote: Now since the description is clearer it's obvious that ti-qspi cannot work fully mmapped as fsl-qspi does because the setup has

OMAP baseline test results for v4.2-rc5

2015-08-12 Thread Paul Walmsley
Here are some basic OMAP test results for Linux v4.2-rc5. Logs and other details at: http://www.pwsan.com/omap/testlogs/test_v4.2-rc5/20150809200304/ Test summary Build: uImage: Pass ( 3/ 3): omap1_defconfig, omap1_defconfig_1510innovator_only,

OMAP baseline test results for v4.2-rc6

2015-08-12 Thread Paul Walmsley
Here are some basic OMAP test results for Linux v4.2-rc6. Logs and other details at: http://www.pwsan.com/omap/testlogs/test_v4.2-rc6/20150810114017/ Test summary Build: uImage: Pass ( 3/ 3): omap1_defconfig, omap1_defconfig_1510innovator_only,

[PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE

2015-08-12 Thread Grygorii Strashko
The irqchip_set_wake_parent should not fail if IRQ chip specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup configuration can't be propagated properly through IRQ domains hierarchy. In case of TI OMAP DRA7 the issue reproduced with following configuration: ARM GIC-OMAP wakeupgen-TI

[PATCH v2 0/6] genirq: irqdomain_hierarchy: fixes

2015-08-12 Thread Grygorii Strashko
Hi All, I've had able to identify and reproduce four issues related to switching on using IRQ domain hierarchy on TI OMAP DRA7 (dra7-evm). Most of them were discovered during testing of Suspend to RAM and IRQ wakeup functionality. In my opinion, most of these issue could also affect on other ARM

Re: [PATCH] ARM: OMAP: irqdomain_hierarchy: fix arm gic irq type configuration

2015-08-12 Thread Grygorii Strashko
Hi Marc, On 08/11/2015 05:33 PM, Marc Zyngier wrote: On Tue, 11 Aug 2015 13:16:13 +0100 Grygorii Strashko grygorii.stras...@ti.com wrote: On 08/11/2015 02:24 PM, Marc Zyngier wrote: On Tue, 11 Aug 2015 10:25:47 +0100 Grygorii Strashko grygorii.stras...@ti.com wrote: It's observed that ARM

[PATCH v2 3/6] genirq: introduce irq_chip_set_type_parent() helper

2015-08-12 Thread Grygorii Strashko
It's expected to use this helper when the current domain doesn't implement .irq_set_type(), but expect the parent to do so. Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com --- include/linux/irq.h | 1 + kernel/irq/chip.c | 20 2 files changed, 21 insertions(+)

[PATCH v2 5/6] ARM: OMAP: wakeupgen: fix arm gic irq type configuration

2015-08-12 Thread Grygorii Strashko
It's observed that ARM GIC IRQ triggering type is not configured properly when IRQ is routed through IRQ domain hierarchy and system started using DT. As result, system will start using default ARM GIC configuration, ignore DT IRQ triggering configuration, and value of

Re: [PATCH v2 2/6] rtc: omap: Add external clock enabling support

2015-08-12 Thread Keerthy
On Wednesday 12 August 2015 07:57 PM, Paul Walmsley wrote: On Mon, 10 Aug 2015, Keerthy wrote: Switch to external clock source during suspend and switch back to internal source on resume. This helps rtc ticking across suspend. Doesn't this type of dynamic switching make it likely that

[PATCH v2 6/6] irqchip: crossbar: fix irq masking at suspend

2015-08-12 Thread Grygorii Strashko
All ARM GIC IRQs have to masked during suspend if they are not wakeup source. Now this is not happen, since switching to use IRQ domain hierarchy, because suspend_device_irq() only checks flags in the last IRQ chip in hierarchy for IRQCHIP_MASK_ON_SUSPEND bit set. And in the case of TI OMAP DRA7

[PATCH v2 4/6] irqchip: crossbar: fix arm gic irq type configuration

2015-08-12 Thread Grygorii Strashko
It's observed that ARM GIC IRQ triggering type is not configured properly when IRQ is routed through IRQ domain hierarchy and system started using DT. As result, system will start using default ARM GIC configuration, ignore DT IRQ triggering configuration, and value of

[PATCH v2 1/6] genirq: fix irq_chip_retrigger_hierarchy

2015-08-12 Thread Grygorii Strashko
Now irq_chip_retrigger_hierarchy() returns -ENOSYS if it was not able to find at least one .irq_retrigger() callback implemented in IRQ domain hierarchy. As result, IRQ re-triggering is not working now on ARM (TI OMAP) where ARM GIC is not implemented this callback. The .irq_retrigger() is

Re: [RFC/PATCH-v4.2-rc6 2/5] arm: boot: dts: am4372: add ARM timers and SCU nodes

2015-08-12 Thread Felipe Balbi
Hi, On Wed, Aug 12, 2015 at 09:52:16AM -0500, Felipe Balbi wrote: On Wed, Aug 12, 2015 at 12:28:16AM -0700, Tony Lindgren wrote: * Felipe Balbi ba...@ti.com [150810 14:44]: AM437x devices sport SCU, TWD and Global timers, let's add them to DTS so they have a chance to probe and be

[PATCH-next 0/4] arm: am437x: use TWD/Global timers

2015-08-12 Thread Felipe Balbi
(c1a0c66f231d Add linux-next specific files for 20150812) Felipe Balbi (4): Revert ARM: 7655/1: smp_twd: make twd_local_timer_of_register() no-op for nosmp arm: boot: dts: am4372: add ARM timers and SCU nodes arm: omap2: Kconfig: select TWD and global timer on AM43xx devices arm: omap2

[PATCH-next 2/4] arm: boot: dts: am4372: add ARM timers and SCU nodes

2015-08-12 Thread Felipe Balbi
AM437x devices sport SCU, TWD and Global timers, let's add them to DTS so they have a chance to probe and be used by Linux. Signed-off-by: Felipe Balbi ba...@ti.com --- arch/arm/boot/dts/am4372.dtsi | 21 + 1 file changed, 21 insertions(+) diff --git

[PATCH-next 3/4] arm: omap2: Kconfig: select TWD and global timer on AM43xx devices

2015-08-12 Thread Felipe Balbi
Make sure to tell the kernel that AM437x has TWD and global timers. Signed-off-by: Felipe Balbi ba...@ti.com --- arch/arm/mach-omap2/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 07d2e100caab..88ef10b2d415 100644

[PATCH-next 4/4] arm: omap2: board-generic: use omap4_local_timer_init for AM437x

2015-08-12 Thread Felipe Balbi
AM437x-based boards, can use omap4_local_timer_init() just fine. Let's use that instead. Signed-off-by: Felipe Balbi ba...@ti.com --- arch/arm/mach-omap2/board-generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/board-generic.c

[PATCH-next 1/4] Revert ARM: 7655/1: smp_twd: make twd_local_timer_of_register() no-op for nosmp

2015-08-12 Thread Felipe Balbi
This reverts commit 904464b91eca8c665acea033489225af02eeb75a. The problem pointed out by commit 904464b91eca (ARM: 7655/1: smp_twd: make twd_local_timer_of_register() no-op for nosmp) doesn't exist anymore. We can safely boot with nosmp and the warning won't show up. The other side benefit of