[PATCH v2] musb: am35x: fix compile error due to control apis

2010-12-06 Thread Ajay Kumar Gupta
As the control.h have been moved to new location and it's
uses are not allowed to drivers directly so moving the phy
control, interrupt clear and reset functionality to board
files.

Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Patch created against recent Linus's tree.
Changes from v1:
- Moved musb reset part also to usb-musb.c so that all the
  boards can use it.
- Corrected return value of set_mode() in case of null function
- Used pr_info/err instead of printk.

 arch/arm/mach-omap2/usb-musb.c|   97 
 arch/arm/plat-omap/include/plat/usb.h |4 +
 drivers/usb/musb/am35x.c  |  134 +++-
 3 files changed, 147 insertions(+), 88 deletions(-)

diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 7260558..8c1d121 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -30,9 +30,102 @@
 #include mach/irqs.h
 #include mach/am35xx.h
 #include plat/usb.h
+#include control.h
 
 #ifdef CONFIG_USB_MUSB_SOC
 
+static void am35x_musb_reset(void)
+{
+   u32 regval;
+
+   /* Reset the musb interface */
+   regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+
+   regval |= AM35XX_USBOTGSS_SW_RST;
+   omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+   regval = ~AM35XX_USBOTGSS_SW_RST;
+   omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+   regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+}
+
+static void am35x_musb_phy_power(u8 on)
+{
+   unsigned long timeout = jiffies + msecs_to_jiffies(100);
+   u32 devconf2;
+
+   if (on) {
+   /*
+* Start the on-chip PHY and its PLL.
+*/
+   devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
+
+   devconf2 = ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
+   devconf2 |= CONF2_PHY_PLLON;
+
+   omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
+
+   pr_info(KERN_INFO Waiting for PHY clock good...\n);
+   while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
+CONF2_PHYCLKGD)) {
+   cpu_relax();
+
+   if (time_after(jiffies, timeout)) {
+   pr_err(KERN_ERR musb PHY clock good timed 
out\n);
+   break;
+   }
+   }
+   } else {
+   /*
+* Power down the on-chip PHY.
+*/
+   devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
+
+   devconf2 = ~CONF2_PHY_PLLON;
+   devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;
+   omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
+   }
+}
+
+static void am35x_musb_clear_irq(void)
+{
+   u32 regval;
+
+   regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+   regval |= AM35XX_USBOTGSS_INT_CLR;
+   omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
+   regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+}
+
+static void am35x_musb_set_mode(u8 musb_mode)
+{
+   u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
+
+   devconf2 = ~CONF2_OTGMODE;
+   switch (musb_mode) {
+#ifdef CONFIG_USB_MUSB_HDRC_HCD
+   case MUSB_HOST: /* Force VBUS valid, ID = 0 */
+   devconf2 |= CONF2_FORCE_HOST;
+   break;
+#endif
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
+   case MUSB_PERIPHERAL:   /* Force VBUS valid, ID = 1 */
+   devconf2 |= CONF2_FORCE_DEVICE;
+   break;
+#endif
+#ifdef CONFIG_USB_MUSB_OTG
+   case MUSB_OTG:  /* Don't override the VBUS/ID comparators */
+   devconf2 |= CONF2_NO_OVERRIDE;
+   break;
+#endif
+   default:
+   pr_info(KERN_INFO Unsupported mode %u\n, musb_mode);
+   }
+
+   omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
+}
+
 static struct resource musb_resources[] = {
[0] = { /* start and end set dynamically */
.flags  = IORESOURCE_MEM,
@@ -93,6 +186,10 @@ void __init usb_musb_init(struct omap_musb_board_data 
*board_data)
} else if (cpu_is_omap3517() || cpu_is_omap3505()) {
musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
musb_resources[1].start = INT_35XX_USBOTG_IRQ;
+   board_data-set_phy_power = am35x_musb_phy_power;
+   board_data-clear_irq = am35x_musb_clear_irq;
+   board_data-set_mode = am35x_musb_set_mode;
+   board_data-reset = am35x_musb_reset;
} else if (cpu_is_omap34xx()) {
musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
} else if (cpu_is_omap44xx()) {
diff --git a/arch/arm/plat-omap/include/plat/usb.h 
b/arch/arm/plat-omap/include/plat/usb.h
index 59c7fe7..7c0be5a 100644
--- 

Re: [PATCH 8/8] staging: tidspbridge - make sync_wait_on_event interruptible

2010-12-06 Thread Ramirez Luna, Omar
On Mon, Oct 25, 2010 at 5:17 PM, Guzman Lugo, Fernando
fernando.l...@ti.com wrote:
 So that avoid nonkillable process.

 Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
 ---
  .../staging/tidspbridge/include/dspbridge/sync.h   |   13 +++--
  1 files changed, 11 insertions(+), 2 deletions(-)

Pushed to dspbridge.

Regards,

Omar
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Re: [PATCH] staging: tidspbridge: overwrite DSP error codes

2010-12-06 Thread Ramirez Luna, Omar
On Wed, Nov 3, 2010 at 7:31 PM, Rene Sapiens rene.sapi...@ti.com wrote:
 When calling the DSP's remote functions, the DSP returns error
 codes different from the ones managed by the kernel, the
 function's return value is shared with the MPU using a shared
 structure. This patch overwrites those error codes by kernel
 specifics and deletes unnecessary code.

 Signed-off-by: Rene Sapiens rene.sapi...@ti.com
 ---
  drivers/staging/tidspbridge/rmgr/disp.c |   44 +-
  1 files changed, 8 insertions(+), 36 deletions(-)

Pushed to dspbridge.

Regards,

Omar
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Re: [PATCH v4 1/3] staging: tidspbridge: fix mgr_enum_node_info

2010-12-06 Thread Ramirez Luna, Omar
On Fri, Nov 5, 2010 at 12:01 PM, Ionut Nicu ionut.n...@gmail.com wrote:
 From: Felipe Contreras felipe.contre...@gmail.com

 The current code was always returning a non-zero status value
 to userspace applications when this ioctl was called.

 The error code was ENODATA, which isn't actually an error,
 it's always returned by dcd_enumerate_object() when it hits the
 end of list.

 Signed-off-by: Felipe Contreras felipe.contre...@gmail.com
 ---
  drivers/staging/tidspbridge/rmgr/mgr.c |    5 +
  1 files changed, 5 insertions(+), 0 deletions(-)


Pushed to dspbridge.

Regards,

Omar
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Re: [PATCH v3 0/3] staging: tidspbridge: bugfixes

2010-12-06 Thread Ramirez Luna, Omar
On Fri, Nov 5, 2010 at 11:31 AM, Ionut Nicu ionut.n...@gmail.com wrote:
 Changes since v1:

 * Split the mgr_enum_node_info patch into two patches:
 one that fixes the issue and one that reorganizes the
 code.

 Ionut Nicu (3):
  staging: tidspbridge: fix mgr_enum_node_info
  staging: tidspbridge: mgr_enum_node_info cleanup
  staging: tidspbridge: fix kernel oops in bridge_io_get_proc_load

Pushed to dspbridge.

Regards,

Omar
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Re: [PATCH v3 00/12] staging: tidspbridge: various cleanups

2010-12-06 Thread Ramirez Luna, Omar
Hi Ionut,

On Sun, Nov 21, 2010 at 4:46 AM, Ionut Nicu ionut.n...@gmail.com wrote:
 This set of patches replaces some of the redundant components of
 the tidspbridge driver, such as:

 * wrapper functions for kmalloc/kfree
 * custom bitmap implementation
 * custom linked list implementation (list_head wrapper)

 with the standard linux kernel interfaces.

 The patches also do some code reorganization for increasing readability.
 Most of the changes reduce the code indentation level and simplify the code.
 No functional changes were done.

 There are many places in this driver that need this kind of cleanup, but
 these patches only fix the functions that were touched while converting
 the code to use linux bitmap and list_head.

Thanks for your patches, I just fixed the style of some multiline
comments before pushing, since these are very minor fixes I avoided
the noise of resending the patches.

Please remember to follow the Coding Style for multi line comments
whenever you insert back those lines (even if the code was that way).

 Ionut Nicu (12):
  staging: tidspbridge: remove gs memory allocator
  staging: tidspbridge: remove utildefs
  staging: tidspbridge: switch to linux bitmap API
  staging: tidspbridge: remove gb bitmap implementation

Pushed

  staging: tidspbridge: rmgr/node.c code cleanup

Changes requested

  staging: tidspbridge: convert core to list_head

Fixed a multiline style comment

  staging: tidspbridge: convert pmgr to list_head

Fixed 2 multiline style comment

  staging: tidspbridge: convert rmgr to list_head
  staging: tidspbridge: remove custom linked list

Pushed

  staging: tidspbridge: core code cleanup

Fixed multiline style comments

  staging: tidspbridge: pmgr code cleanup

Fixed multiline style comments

  staging: tidspbridge: rmgr code cleanup

Doesn't apply because of patch staging: tidspbridge: rmgr/node.c code
cleanup was not pushed.

Regards,

Omar
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[v3,05/12] staging: tidspbridge: rmgr/node.c code cleanup

2010-12-06 Thread Ramirez Luna, Omar
 Reorganized some code in rmgr/node.c to increase its
 readability. Most of the changes reduce the code
 indentation level and simplifiy the code. No functional
 changes were done.

 Signed-off-by: Ionut Nicu ionut.n...@mindbit.ro

 ---
 drivers/staging/tidspbridge/rmgr/node.c |  607 +++
  1 files changed, 284 insertions(+), 323 deletions(-)

 diff --git a/drivers/staging/tidspbridge/rmgr/node.c 
 b/drivers/staging/tidspbridge/rmgr/node.c
...
 @@ -918,170 +908,143 @@ int node_connect(struct node_object *node1, u32 
 stream1,
   DBC_ASSERT(node2 != (struct node_object *)DSP_HGPPNODE);
   hnode_mgr = node2-hnode_mgr;
   }
 +
   /* Enter critical section */
   mutex_lock(hnode_mgr-node_mgr_lock);

   /* Nodes must be in the allocated state */
 - if (node1_type != NODE_GPP  node_get_state(node1) != NODE_ALLOCATED)
 + if (node1_type != NODE_GPP 
 + node_get_state(node1) != NODE_ALLOCATED) {
   status = -EBADR;
 + goto out_unlock;
 + }

 - if (node2_type != NODE_GPP  node_get_state(node2) != NODE_ALLOCATED)
 + if (node2_type != NODE_GPP 
 + node_get_state(node2) != NODE_ALLOCATED) {
   status = -EBADR;
 + goto out_unlock;
 + }

 - if (!status) {
 - /*  Check that stream indices for task and dais socket nodes
 -  *  are not already be used. (Device nodes checked later) */
 - if (node1_type == NODE_TASK || node1_type == NODE_DAISSOCKET) {
 - output =
 - (node1-create_args.asa.
 -   task_arg_obj.strm_out_def[stream1]);
 - if (output-sz_device != NULL)
 - status = -EISCONN;
 -
 + /*  Check that stream indices for task and dais socket nodes
 +  *  are not already be used. (Device nodes checked later) */

Please follow the convention for multi line comments

 + if (node1_type == NODE_TASK || node1_type == NODE_DAISSOCKET) {
 + output = (node1-create_args.asa.
 + task_arg_obj.strm_out_def[stream1]);
 + if (output-sz_device != NULL) {

can we use the simplified form?

if (output-sz_device)

 + status = -EISCONN;
 + goto out_unlock;
   }
 - if (node2_type == NODE_TASK || node2_type == NODE_DAISSOCKET) {
 - input =
 - (node2-create_args.asa.
 -   task_arg_obj.strm_in_def[stream2]);
 - if (input-sz_device != NULL)
 - status = -EISCONN;

 + }
 + if (node2_type == NODE_TASK || node2_type == NODE_DAISSOCKET) {
 + input = (node2-create_args.asa.
 + task_arg_obj.strm_in_def[stream2]);
 + if (input-sz_device != NULL) {

same here

 + status = -EISCONN;
 + goto out_unlock;
   }
 +
   }
   /* Connecting two task nodes? */
 - if (!status  ((node1_type == NODE_TASK ||
 -node1_type == NODE_DAISSOCKET)
 -(node2_type == NODE_TASK
 -   || node2_type == NODE_DAISSOCKET))) {
 + if (((node1_type == NODE_TASK || node1_type == NODE_DAISSOCKET) 
 + (node2_type == NODE_TASK ||
 +  node2_type == NODE_DAISSOCKET))) {

extra set of parenthesis

   /* Find available pipe */
   pipe_id = find_first_zero_bit(hnode_mgr-pipe_map, MAXPIPES);
   if (pipe_id == MAXPIPES) {
   status = -ECONNREFUSED;
 - } else {
 - set_bit(pipe_id, hnode_mgr-pipe_map);
 - node1-outputs[stream1].type = NODECONNECT;
 - node2-inputs[stream2].type = NODECONNECT;
 - node1-outputs[stream1].dev_id = pipe_id;
 - node2-inputs[stream2].dev_id = pipe_id;
 - output-sz_device = kzalloc(PIPENAMELEN + 1,
 - GFP_KERNEL);
 - input-sz_device = kzalloc(PIPENAMELEN + 1, GFP_KERNEL);
 - if (output-sz_device == NULL ||
 - input-sz_device == NULL) {
 - /* Undo the connection */
 - kfree(output-sz_device);
 -
 - kfree(input-sz_device);
 -
 - output-sz_device = NULL;
 - input-sz_device = NULL;
 - clear_bit(pipe_id, hnode_mgr-pipe_map);
 - status = -ENOMEM;
 - } else {
 - /* Copy /dbpipepipId name to 

Re: [PATCH v2] musb: am35x: fix compile error due to control apis

2010-12-06 Thread Sergei Shtylyov

Hello.

On 06-12-2010 11:13, Ajay Kumar Gupta wrote:


As the control.h have been moved to new location and it's
uses are not allowed to drivers directly so moving the phy
control, interrupt clear and reset functionality to board
files.


   I'm not fond of the whole approach. I'm not sure why accesses to the 
control registers are such a no-no, taking into account that one needs to 
access such regisyter to clear the interrupt...



Signed-off-by: Ajay Kumar Guptaajay.gu...@ti.com

[...]


diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 7260558..8c1d121 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -30,9 +30,102 @@
  #includemach/irqs.h
  #includemach/am35xx.h
  #includeplat/usb.h
+#include control.h

  #ifdef CONFIG_USB_MUSB_SOC

+static void am35x_musb_reset(void)
+{
+   u32 regval;
+
+   /* Reset the musb interface */
+   regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+
+   regval |= AM35XX_USBOTGSS_SW_RST;
+   omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+   regval= ~AM35XX_USBOTGSS_SW_RST;
+   omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+   regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);


   Why read it and ignore the result?

WBR, Sergei
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[PATCH 0/3] OMAP: I2C and UART device name cleanup

2010-12-06 Thread Benoit Cousson
Hi All,

In order to enforce a little bit of consistency in the omap devices name,
the convention for omap devices name will be now omap_XXX. All the drivers
adapted to hwmod will be named like that during the on-going adaptations.

The I2C and UART drivers are already adapted to hwmod but with
the original names.

Rename i2c and uart using this convention:
i2c_omap - omap_i2c
omap-hsuart - omap_uart

Tested on OMAP4 ES2 on Panda / sdp4430. Some more validation will be needed on 
OMAP2  3.

This series is based on Kevin's pm-hwmod-i2c branch and is available here:
git://gitorious.org/omap-pm/linux.git for_2.6.38/device_name


Regards,
Benoit


Benoit Cousson (3):
  OMAP: clock: Change device name in clock nodes: i2c_omap - omap_i2c
  OMAP: i2c: Change device name: i2c_omap - omap_i2c
  OMAP: serial: Change device name: omap-hsuart - omap_uart

 arch/arm/mach-omap1/clock_data.c  |6 +++---
 arch/arm/mach-omap2/clock2420_data.c  |8 
 arch/arm/mach-omap2/clock2430_data.c  |8 
 arch/arm/mach-omap2/clock3xxx_data.c  |   12 ++--
 arch/arm/mach-omap2/clock44xx_data.c  |   16 
 arch/arm/plat-omap/i2c.c  |2 +-
 arch/arm/plat-omap/include/plat/omap-serial.h |2 +-
 drivers/i2c/busses/i2c-omap.c |4 ++--
 8 files changed, 29 insertions(+), 29 deletions(-)

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[PATCH 1/3] OMAP: clock: Change device name in clock nodes: i2c_omap - omap_i2c

2010-12-06 Thread Benoit Cousson
The convention for omap device naming is omap_XXX.

Rename the device name used in clock dev noded in order to stick
to this naming convention.

Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
 arch/arm/mach-omap1/clock_data.c |6 +++---
 arch/arm/mach-omap2/clock2420_data.c |8 
 arch/arm/mach-omap2/clock2430_data.c |8 
 arch/arm/mach-omap2/clock3xxx_data.c |   12 ++--
 arch/arm/mach-omap2/clock44xx_data.c |   16 
 5 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index af54114..aa6dd67 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -736,9 +736,9 @@ static struct omap_clk omap_clks[] = {
CLK(mmci-omap.1, ick,   armper_ck.clk, CK_16XX),
/* Virtual clocks */
CLK(NULL,   mpu,  virtual_ck_mpu, CK_16XX | CK_1510 | 
CK_310),
-   CLK(i2c_omap.1, fck,i2c_fck,   CK_16XX | CK_1510 | 
CK_310 | CK_7XX),
-   CLK(i2c_omap.1, ick,i2c_ick,   CK_16XX),
-   CLK(i2c_omap.1, ick,dummy_ck,  CK_1510 | CK_310 | 
CK_7XX),
+   CLK(omap_i2c.1, fck,i2c_fck,   CK_16XX | CK_1510 | 
CK_310 | CK_7XX),
+   CLK(omap_i2c.1, ick,i2c_ick,   CK_16XX),
+   CLK(omap_i2c.1, ick,dummy_ck,  CK_1510 | CK_310 | 
CK_7XX),
CLK(omap1_spi100k.1, fck,   dummy_ck,  CK_7XX),
CLK(omap1_spi100k.1, ick,   dummy_ck,  CK_7XX),
CLK(omap1_spi100k.2, fck,   dummy_ck,  CK_7XX),
diff --git a/arch/arm/mach-omap2/clock2420_data.c 
b/arch/arm/mach-omap2/clock2420_data.c
index 21f8562..ed61ac2 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1862,10 +1862,10 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL,   eac_fck,  eac_fck,   CK_242X),
CLK(omap_hdq.0, ick,hdq_ick,   CK_242X),
CLK(omap_hdq.1, fck,hdq_fck,   CK_242X),
-   CLK(i2c_omap.1, ick,i2c1_ick,  CK_242X),
-   CLK(i2c_omap.1, fck,i2c1_fck,  CK_242X),
-   CLK(i2c_omap.2, ick,i2c2_ick,  CK_242X),
-   CLK(i2c_omap.2, fck,i2c2_fck,  CK_242X),
+   CLK(omap_i2c.1, ick,i2c1_ick,  CK_242X),
+   CLK(omap_i2c.1, fck,i2c1_fck,  CK_242X),
+   CLK(omap_i2c.2, ick,i2c2_ick,  CK_242X),
+   CLK(omap_i2c.2, fck,i2c2_fck,  CK_242X),
CLK(NULL,   gpmc_fck, gpmc_fck,  CK_242X),
CLK(NULL,   sdma_fck, sdma_fck,  CK_242X),
CLK(NULL,   sdma_ick, sdma_ick,  CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c 
b/arch/arm/mach-omap2/clock2430_data.c
index e32afcb..1bded4e 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1969,10 +1969,10 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL,   fac_fck,  fac_fck,   CK_243X),
CLK(omap_hdq.0, ick,hdq_ick,   CK_243X),
CLK(omap_hdq.1, fck,hdq_fck,   CK_243X),
-   CLK(i2c_omap.1, ick,i2c1_ick,  CK_243X),
-   CLK(i2c_omap.1, fck,i2chs1_fck,CK_243X),
-   CLK(i2c_omap.2, ick,i2c2_ick,  CK_243X),
-   CLK(i2c_omap.2, fck,i2chs2_fck,CK_243X),
+   CLK(omap_i2c.1, ick,i2c1_ick,  CK_243X),
+   CLK(omap_i2c.1, fck,i2chs1_fck,CK_243X),
+   CLK(omap_i2c.2, ick,i2c2_ick,  CK_243X),
+   CLK(omap_i2c.2, fck,i2chs2_fck,CK_243X),
CLK(NULL,   gpmc_fck, gpmc_fck,  CK_243X),
CLK(NULL,   sdma_fck, sdma_fck,  CK_243X),
CLK(NULL,   sdma_ick, sdma_ick,  CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c 
b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..ee8aa39 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3285,9 +3285,9 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(mmci-omap-hs.1,   fck,  mmchs2_fck,CK_3XXX),
CLK(NULL,   mspro_fck,mspro_fck, CK_343X),
CLK(mmci-omap-hs.0,   fck,  mmchs1_fck,CK_3XXX),
-   CLK(i2c_omap.3, fck,i2c3_fck,  CK_3XXX),
-   CLK(i2c_omap.2, fck,i2c2_fck,  CK_3XXX),
-   CLK(i2c_omap.1, fck,i2c1_fck,  CK_3XXX),
+   CLK(omap_i2c.3, fck,i2c3_fck,  CK_3XXX),
+   CLK(omap_i2c.2, fck,i2c2_fck,  CK_3XXX),
+   CLK(omap_i2c.1, fck,i2c1_fck,  CK_3XXX),
CLK(omap-mcbsp.5, fck,  mcbsp5_fck,CK_3XXX),
CLK(omap-mcbsp.1, fck,  mcbsp1_fck,CK_3XXX),
CLK(NULL,   core_48m_fck, core_48m_fck,  CK_3XXX),
@@ -3326,9 +3326,9 @@ static struct omap_clk omap3xxx_clks[] = 

[PATCH 3/3] OMAP: serial: Change device name: omap-hsuart - omap_uart

2010-12-06 Thread Benoit Cousson
The naming convention for omap_device is omap_XXX.

Rename the device and driver name in order to stick
to this naming convention.
Remove the hs prefix that is implicit for every OMAP uarts.

Signed-off-by: Benoit Cousson b-cous...@ti.com
Acked-by: Govindraj Raja govindraj.r...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
 arch/arm/plat-omap/include/plat/omap-serial.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h 
b/arch/arm/plat-omap/include/plat/omap-serial.h
index c8dae02..cc71426 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -22,7 +22,7 @@
 
 #include plat/mux.h
 
-#define DRIVER_NAMEomap-hsuart
+#define DRIVER_NAMEomap_uart
 
 /*
  * Use tty device name as ttyO, [O - OMAP]
-- 
1.7.0.4

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[PATCH 2/3] OMAP: i2c: Change device name: i2c_omap - omap_i2c

2010-12-06 Thread Benoit Cousson
The convention for omap device naming is omap_XXX.

Rename the device and driver name in order to stick
to this naming convention.

Signed-off-by: Benoit Cousson b-cous...@ti.com
c: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Ben Dooks ben-...@fluff.org
---
 arch/arm/plat-omap/i2c.c  |2 +-
 drivers/i2c/busses/i2c-omap.c |4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5bff9c..0a271ad 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -40,7 +40,7 @@
 #define OMAP_I2C_SIZE  0x3f
 #define OMAP1_I2C_BASE 0xfffb3800
 
-static const char name[] = i2c_omap;
+static const char name[] = omap_i2c;
 
 #define I2C_RESOURCE_BUILDER(base, irq)\
{   \
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 760b8be..9d09083 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1139,7 +1139,7 @@ static struct platform_driver omap_i2c_driver = {
.probe  = omap_i2c_probe,
.remove = omap_i2c_remove,
.driver = {
-   .name   = i2c_omap,
+   .name   = omap_i2c,
.owner  = THIS_MODULE,
},
 };
@@ -1161,4 +1161,4 @@ module_exit(omap_i2c_exit_driver);
 MODULE_AUTHOR(MontaVista Software, Inc. (and others));
 MODULE_DESCRIPTION(TI OMAP I2C bus adapter);
 MODULE_LICENSE(GPL);
-MODULE_ALIAS(platform:i2c_omap);
+MODULE_ALIAS(platform:omap_i2c);
-- 
1.7.0.4

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Re: [PATCH 1/2] AM35x: musb: fix compilation error

2010-12-06 Thread Felipe Balbi

On Fri, Dec 03, 2010 at 07:08:53PM +0530, Gupta, Ajay Kumar wrote:

We already have generic APIs so I think we can pass function pointers to
musb driver via struct omap_musb_board_data,

 struct omap_musb_board_data {
+   void(*phy_on) (void)
+   void(*phy_off) (void)
+   void  (*intr_clr) (void)
 }

Reset part can be done in board file itself same as Ethernet driver is
doing.

Does this look fine?

so those would be turn phy on, turn phy off and clear interrupt
apis ?

How about:
int (*set_phy_power)(unsigned on);

Looks good.


void (*clear_phy_irq)(void);

This is actually musb ip interrupt clear so I will make it like,

void (*clear_irq) (void);


Is AM35x that different ? Can't you just write to MUSB_INTRRX
MUSB_INTRTX and MUSB_INTRUSB ??

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RE: [PATCH 1/2] AM35x: musb: fix compilation error

2010-12-06 Thread Gupta, Ajay Kumar
 On Fri, Dec 03, 2010 at 07:08:53PM +0530, Gupta, Ajay Kumar wrote:
  We already have generic APIs so I think we can pass function pointers
 to
  musb driver via struct omap_musb_board_data,
  
   struct omap_musb_board_data {
  + void(*phy_on) (void)
  + void(*phy_off) (void)
  + void  (*intr_clr) (void)
   }
  
  Reset part can be done in board file itself same as Ethernet driver is
  doing.
  
  Does this look fine?
 
  so those would be turn phy on, turn phy off and clear interrupt
  apis ?
 
  How about:
  int (*set_phy_power)(unsigned on);
 Looks good.
 
  void (*clear_phy_irq)(void);
 This is actually musb ip interrupt clear so I will make it like,
 
 void (*clear_irq) (void);
 
 Is AM35x that different ? Can't you just write to MUSB_INTRRX
 MUSB_INTRTX and MUSB_INTRUSB ??
Writing to MUSB_INTRRX/TX/USB wouldn't help. We have to clear interrupt
Bit in control register INTR_LVL_CLR.

-Ajay
 
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Re: [PATCH 1/2] AM35x: musb: fix compilation error

2010-12-06 Thread Felipe Balbi

On Mon, Dec 06, 2010 at 05:24:53PM +0530, Gupta, Ajay Kumar wrote:

On Fri, Dec 03, 2010 at 07:08:53PM +0530, Gupta, Ajay Kumar wrote:
 We already have generic APIs so I think we can pass function pointers
to
 musb driver via struct omap_musb_board_data,
 
  struct omap_musb_board_data {
 +  void(*phy_on) (void)
 +  void(*phy_off) (void)
 +  void  (*intr_clr) (void)
  }
 
 Reset part can be done in board file itself same as Ethernet driver is
 doing.
 
 Does this look fine?

 so those would be turn phy on, turn phy off and clear interrupt
 apis ?

 How about:
 int (*set_phy_power)(unsigned on);
Looks good.

 void (*clear_phy_irq)(void);
This is actually musb ip interrupt clear so I will make it like,

void (*clear_irq) (void);

Is AM35x that different ? Can't you just write to MUSB_INTRRX
MUSB_INTRTX and MUSB_INTRUSB ??

Writing to MUSB_INTRRX/TX/USB wouldn't help. We have to clear interrupt
Bit in control register INTR_LVL_CLR.


I see, thanks for the info :-)

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RE: [PATCH v2] musb: am35x: fix compile error due to control apis

2010-12-06 Thread Gupta, Ajay Kumar
Hi,
  As the control.h have been moved to new location and it's
  uses are not allowed to drivers directly so moving the phy
  control, interrupt clear and reset functionality to board
  files.
 
 I'm not fond of the whole approach. I'm not sure why accesses to the
 control registers are such a no-no, taking into account that one needs to
 access such regisyter to clear the interrupt...

I think Tony is the right person to answer this :)

 
  Signed-off-by: Ajay Kumar Guptaajay.gu...@ti.com
 [...]
 
  diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-
 musb.c

[...]

  +   regval= ~AM35XX_USBOTGSS_SW_RST;
  +   omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
  +
  +   regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
 
 Why read it and ignore the result?

This is due to recommendation for OMAPs as discussed at below
Link,
http://markmail.org/message/s3lp7xlyq7zxnjtc#query:+page:1+mid:kfia4ld4xgzek6kq+state:results

Thanks,
Ajay
 
 WBR, Sergei
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[PATCH v5 1/12] OMAP2+: dmtimer: add device names to flck nodes

2010-12-06 Thread Tarun Kanti DebBarma
From: Thara Gopinath th...@ti.com

Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be
retrieved by doing a clk_get with the corresponding device pointers or
device names.

NOTE: gpt1_fck is modified in patch-10 when we switch to platform device
driver. This is to make sure that each patch compiles and boots.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/clock2420_data.c |   58 +++--
 arch/arm/mach-omap2/clock2430_data.c |   58 +++--
 arch/arm/mach-omap2/clock3xxx_data.c |   46 --
 arch/arm/mach-omap2/clock44xx_data.c |   42 ++--
 4 files changed, 161 insertions(+), 43 deletions(-)

diff --git a/arch/arm/mach-omap2/clock2420_data.c 
b/arch/arm/mach-omap2/clock2420_data.c
index 21f8562..d140807 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1803,27 +1803,27 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL,   gpt1_ick, gpt1_ick,  CK_242X),
CLK(NULL,   gpt1_fck, gpt1_fck,  CK_242X),
CLK(NULL,   gpt2_ick, gpt2_ick,  CK_242X),
-   CLK(NULL,   gpt2_fck, gpt2_fck,  CK_242X),
+   CLK(omap_timer.2, fck,  gpt2_fck,  CK_242X),
CLK(NULL,   gpt3_ick, gpt3_ick,  CK_242X),
-   CLK(NULL,   gpt3_fck, gpt3_fck,  CK_242X),
+   CLK(omap_timer.3, fck,  gpt3_fck,  CK_242X),
CLK(NULL,   gpt4_ick, gpt4_ick,  CK_242X),
-   CLK(NULL,   gpt4_fck, gpt4_fck,  CK_242X),
+   CLK(omap_timer.4, fck,  gpt4_fck,  CK_242X),
CLK(NULL,   gpt5_ick, gpt5_ick,  CK_242X),
-   CLK(NULL,   gpt5_fck, gpt5_fck,  CK_242X),
+   CLK(omap_timer.5, fck,  gpt5_fck,  CK_242X),
CLK(NULL,   gpt6_ick, gpt6_ick,  CK_242X),
-   CLK(NULL,   gpt6_fck, gpt6_fck,  CK_242X),
+   CLK(omap_timer.6, fck,  gpt6_fck,  CK_242X),
CLK(NULL,   gpt7_ick, gpt7_ick,  CK_242X),
-   CLK(NULL,   gpt7_fck, gpt7_fck,  CK_242X),
+   CLK(omap_timer.7, fck,  gpt7_fck,  CK_242X),
CLK(NULL,   gpt8_ick, gpt8_ick,  CK_242X),
-   CLK(NULL,   gpt8_fck, gpt8_fck,  CK_242X),
+   CLK(omap_timer.8, fck,  gpt8_fck,  CK_242X),
CLK(NULL,   gpt9_ick, gpt9_ick,  CK_242X),
-   CLK(NULL,   gpt9_fck, gpt9_fck,  CK_242X),
+   CLK(omap_timer.9, fck,  gpt9_fck,  CK_242X),
CLK(NULL,   gpt10_ick,gpt10_ick, CK_242X),
-   CLK(NULL,   gpt10_fck,gpt10_fck, CK_242X),
+   CLK(omap_timer.10,fck,  gpt10_fck, CK_242X),
CLK(NULL,   gpt11_ick,gpt11_ick, CK_242X),
-   CLK(NULL,   gpt11_fck,gpt11_fck, CK_242X),
+   CLK(omap_timer.11,fck,  gpt11_fck, CK_242X),
CLK(NULL,   gpt12_ick,gpt12_ick, CK_242X),
-   CLK(NULL,   gpt12_fck,gpt12_fck, CK_242X),
+   CLK(omap_timer.12,fck,  gpt12_fck, CK_242X),
CLK(omap-mcbsp.1, ick,  mcbsp1_ick,CK_242X),
CLK(omap-mcbsp.1, fck,  mcbsp1_fck,CK_242X),
CLK(omap-mcbsp.2, ick,  mcbsp2_ick,CK_242X),
@@ -1878,6 +1878,42 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL,   pka_ick,  pka_ick,   CK_242X),
CLK(NULL,   usb_fck,  usb_fck,   CK_242X),
CLK(musb_hdrc,fck,  osc_ck,CK_242X),
+   CLK(omap_timer.1, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.2, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.3, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.4, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.5, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.6, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.7, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.8, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.9, 32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.10,32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.11,32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.12,32k_ck,   func_32k_ck,   CK_243X),
+   CLK(omap_timer.1, sys_ck,   sys_ck,CK_243X),
+   CLK(omap_timer.2, sys_ck,   sys_ck,CK_243X),
+   CLK(omap_timer.3, sys_ck,   sys_ck,CK_243X),
+   CLK(omap_timer.4, sys_ck,   sys_ck,CK_243X),
+   CLK(omap_timer.5, sys_ck,   sys_ck,CK_243X),
+   CLK(omap_timer.6, sys_ck,   

[PATCH v5 6/12] OMAP: dmtimer: infrastructure to support hwmod

2010-12-06 Thread Tarun Kanti DebBarma
(1) Add new fields and data structures to support dmtimer conversion
to platform driver.
(2) Constants to identify IP revision so that Highlander IP in OMAP 4
can be distinguished.
(3) field to identify OMAP4 abe timers.
(4) Interface function to support early boot.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Reviewed-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/dmtimer.h |   30 +
 arch/arm/plat-omap/dmtimer.c  |7 ++
 arch/arm/plat-omap/include/plat/dmtimer.h |   30 +
 3 files changed, 67 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/dmtimer.h

diff --git a/arch/arm/mach-omap2/dmtimer.h b/arch/arm/mach-omap2/dmtimer.h
new file mode 100644
index 000..75cca6c
--- /dev/null
+++ b/arch/arm/mach-omap2/dmtimer.h
@@ -0,0 +1,30 @@
+/**
+ * OMAP Dual-Mode Timers - early initialization interface
+ *
+ * Function interface called first to start dmtimer early initialization.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma tarun.ka...@ti.com
+ * Thara Gopinath th...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __ASM_ARCH_DMTIMER_H
+#define __ASM_ARCH_DMTIMER_H
+
+/*
+ * dmtimer is required during early part of boot sequence even before
+ * device model and pm_runtime if fully up and running. This function
+ * provides hook to omap2_init_common_hw() which is triggered from
+ * start_kernel()-init_irq() of kernel initialization sequence.
+ */
+void __init omap2_dm_timer_early_init(void);
+
+#endif
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 1d706cf..7fdf107 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -3,6 +3,12 @@
  *
  * OMAP Dual-Mode Timers
  *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma tarun.ka...@ti.com
+ * Thara Gopinath th...@ti.com
+ *
+ * dmtimer adaptation to platform_driver.
+ *
  * Copyright (C) 2005 Nokia Corporation
  * OMAP2 support by Juha Yrjola
  * API improvements and OMAP2 clock framework support by Timo Teras
@@ -160,6 +166,7 @@ struct omap_dm_timer {
unsigned reserved:1;
unsigned enabled:1;
unsigned posted:1;
+   struct platform_device *pdev;
 };
 
 static int dm_timer_count;
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h 
b/arch/arm/plat-omap/include/plat/dmtimer.h
index dfa3aff..b90b906 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -3,6 +3,12 @@
  *
  * OMAP Dual-Mode Timers
  *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma tarun.ka...@ti.com
+ * Thara Gopinath th...@ti.com
+ *
+ * Platform device conversion and hwmod support.
+ *
  * Copyright (C) 2005 Nokia Corporation
  * Author: Lauri Leukkunen lauri.leukku...@nokia.com
  * PWM and clock framwork support by Timo Teras.
@@ -29,6 +35,8 @@
 #ifndef __ASM_ARCH_DMTIMER_H
 #define __ASM_ARCH_DMTIMER_H
 
+#include linux/platform_device.h
+
 /* clock sources */
 #define OMAP_TIMER_SRC_SYS_CLK 0x00
 #define OMAP_TIMER_SRC_32_KHZ  0x01
@@ -44,11 +52,33 @@
 #define OMAP_TIMER_TRIGGER_OVERFLOW0x01
 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE0x02
 
+/*
+ * IP revision identifier so that Highlander IP
+ * in OMAP 4 can be distinguished.
+ */
+#define OMAP_TIMER_IP_VERSION_10x1
+#define OMAP_TIMER_IP_VERSION_20x2
+
+/*
+ * OMAP 4 IP revision has different register offsets
+ * for interrupt registers and functional registers.
+ */
+#define VERSION2_TIMER_WAKEUP_EN_REG_OFFSET 0x14
+#define VERSION2_TIMER_STAT_REG_OFFSET  0x10
+
 struct omap_dm_timer;
 extern struct omap_dm_timer *gptimer_wakeup;
 extern struct sys_timer omap_timer;
 struct clk;
 
+struct dmtimer_platform_data {
+   int (*set_timer_src) (struct platform_device *pdev, int source);
+   int timer_ip_type;
+   u8 func_offset;
+   u8 intr_offset;
+   u32 is_early_init:1;
+};
+
 int omap_dm_timer_init(void);
 
 struct omap_dm_timer *omap_dm_timer_request(void);
-- 
1.6.0.4

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[PATCH v5 8/12] OMAP2+: dmtimer: convert to platform devices

2010-12-06 Thread Tarun Kanti DebBarma
Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver. It also provides
provision to access timers during early boot when pm_runtime framework
is not completely up and running.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Reviewed-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/Makefile  |2 +-
 arch/arm/mach-omap2/dmtimer.c |  174 +
 2 files changed, 175 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-omap2/dmtimer.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 60e51bc..7700ccd 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
-common.o
+common.o dmtimer.o
 
 omap-2-3-common= irq.o sdrc.o prm2xxx_3xxx.o
 hwmod-common   = omap_hwmod.o \
diff --git a/arch/arm/mach-omap2/dmtimer.c b/arch/arm/mach-omap2/dmtimer.c
new file mode 100644
index 000..b639082
--- /dev/null
+++ b/arch/arm/mach-omap2/dmtimer.c
@@ -0,0 +1,174 @@
+/**
+ * OMAP2PLUS Dual-Mode Timers - platform device registration
+ *
+ * Contains first level initialization routines which extracts timers
+ * information from hwmod database and registers with linux device model.
+ * It also has low level function to change the timer input clock source.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma tarun.ka...@ti.com
+ * Thara Gopinath th...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/io.h
+#include linux/err.h
+#include linux/slab.h
+
+#include plat/dmtimer.h
+#include plat/omap_hwmod.h
+#include plat/omap_device.h
+
+static int early_timer_count __initdata = 1;
+
+/**
+ * omap2_dm_timer_set_src - change the timer input clock source
+ * @pdev:  timer platform device pointer
+ * @timer_clk: current clock source
+ * @source:array index of parent clock source
+ */
+static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
+{
+   int ret;
+   struct dmtimer_platform_data *pdata = pdev-dev.platform_data;
+   struct clk *fclk = clk_get(pdev-dev, fck);
+   struct clk *new_fclk;
+   char *fclk_name = 32k_ck; /* default name */
+
+   switch (source) {
+   case OMAP_TIMER_SRC_SYS_CLK:
+   fclk_name = sys_ck;
+   break;
+
+   case OMAP_TIMER_SRC_32_KHZ:
+   fclk_name = 32k_ck;
+   break;
+
+   case OMAP_TIMER_SRC_EXT_CLK:
+   if (pdata-timer_ip_type == OMAP_TIMER_IP_VERSION_1) {
+   fclk_name = alt_ck;
+   break;
+   }
+   dev_dbg(pdev-dev, %s: %d: invalid clk src.\n,
+   __func__, __LINE__);
+   return -EINVAL;
+   }
+
+   if (IS_ERR_OR_NULL(fclk)) {
+   dev_dbg(pdev-dev, %s: %d: clk_get() FAILED\n,
+   __func__, __LINE__);
+   return -EINVAL;
+   }
+
+   new_fclk = clk_get(pdev-dev, fclk_name);
+   if (IS_ERR_OR_NULL(new_fclk)) {
+   dev_dbg(pdev-dev, %s: %d: clk_get() %s FAILED\n,
+   __func__, __LINE__, fclk_name);
+   clk_put(fclk);
+   return -EINVAL;
+   }
+
+   ret = clk_set_parent(fclk, new_fclk);
+   if (IS_ERR_VALUE(ret)) {
+   dev_dbg(pdev-dev, %s: clk_set_parent() to %s FAILED\n,
+   __func__, fclk_name);
+   ret = -EINVAL;
+   }
+
+   clk_put(new_fclk);
+   clk_put(fclk);
+
+   return ret;
+}
+
+struct omap_device_pm_latency omap2_dmtimer_latency[] = {
+   {
+   .deactivate_func = omap_device_idle_hwmods,
+   .activate_func   = omap_device_enable_hwmods,
+   .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+   },
+};
+
+/**
+ * omap_timer_init - build and register timer device with an
+ * associated timer hwmod
+ * @oh:timer hwmod pointer to be used to build timer device
+ * @user:  parameter that can be passed from calling hwmod API
+ *
+ * Called by omap_hwmod_for_each_by_class to register each of the timer
+ * devices present in 

[PATCH v5 5/12] OMAP4: hwmod data: add dmtimer

2010-12-06 Thread Tarun Kanti DebBarma
From: Cousson, Benoit b-cous...@ti.com

Add dmtimer data.

Signed-off-by: Cousson, Benoit b-cous...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  624 
 1 files changed, 624 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7274db4..b1371df 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -22,6 +22,7 @@
 
 #include plat/omap_hwmod.h
 #include plat/cpu.h
+#include plat/dmtimer.h
 
 #include omap_hwmod_common_data.h
 
@@ -453,6 +454,615 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
 };
 
 /*
+ * 'timer' class
+ * general purpose timer module with accurate 1ms tick
+ * This class contains several variants: ['timer_1ms', 'timer']
+ */
+static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
+   .rev_offs   = 0x,
+   .sysc_offs  = 0x0010,
+   .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+  SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+  SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
+  SYSS_HAS_RESET_STATUS),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .clockact   = 0x2,
+   .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
+   .name = timer,
+   .sysc = omap44xx_timer_1ms_sysc,
+   .rev = OMAP_TIMER_IP_VERSION_1,
+};
+
+static struct omap_hwmod_class_sysconfig omap44xx_timer_sysc = {
+   .rev_offs   = 0x,
+   .sysc_offs  = 0x0010,
+   .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
+  SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
+   .name = timer,
+   .sysc = omap44xx_timer_sysc,
+   .rev = OMAP_TIMER_IP_VERSION_2,
+};
+
+/* timer1 */
+static struct omap_hwmod omap44xx_timer1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
+   { .irq = 37 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
+   {
+   .pa_start   = 0x4a318000,
+   .pa_end = 0x4a31807f,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_wkup - timer1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
+   .master = omap44xx_l4_wkup_hwmod,
+   .slave  = omap44xx_timer1_hwmod,
+   .clk= l4_wkup_clk_mux_ck,
+   .addr   = omap44xx_timer1_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap44xx_timer1_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {
+   omap44xx_l4_wkup__timer1,
+};
+
+static struct omap_hwmod omap44xx_timer1_hwmod = {
+   .name   = timer1,
+   .class  = omap44xx_timer_1ms_hwmod_class,
+   .mpu_irqs   = omap44xx_timer1_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer1_irqs),
+   .main_clk   = timer1_fck,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL,
+   },
+   },
+   .slaves = omap44xx_timer1_slaves,
+   .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves),
+   .omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* timer2 */
+static struct omap_hwmod omap44xx_timer2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {
+   { .irq = 38 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
+   {
+   .pa_start   = 0x48032000,
+   .pa_end = 0x4803207f,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_per - timer2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {
+   .master = omap44xx_l4_per_hwmod,
+   .slave  = omap44xx_timer2_hwmod,
+   .clk= l4_div_ck,
+   .addr   = omap44xx_timer2_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap44xx_timer2_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = {
+   omap44xx_l4_per__timer2,
+};
+
+static struct omap_hwmod omap44xx_timer2_hwmod = {
+   .name   = timer2,
+   .class  = omap44xx_timer_1ms_hwmod_class,
+   .mpu_irqs   = omap44xx_timer2_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_timer2_irqs),
+   .main_clk   = 

[PATCH v5 12/12] OMAP: dmtimer: add timeout to low-level routines

2010-12-06 Thread Tarun Kanti DebBarma
The low-level read and write access routines wait on
write-pending register in posted mode to make sure that
previous write is complete on respective registers.
This waiting is done in an infinite while loop. Now it
is being modified to use timeout instead.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/plat-omap/dmtimer.c |   33 +
 1 files changed, 25 insertions(+), 8 deletions(-)

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index d51a459..26e5af1 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -47,6 +47,7 @@
 #include linux/pm_runtime.h
 #include linux/err.h
 #include mach/hardware.h
+#include plat/common.h
 #include plat/dmtimer.h
 #include mach/irqs.h
 
@@ -159,6 +160,8 @@
 #define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
(_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR  WPSHIFT))
 
+#define MAX_WRITE_PEND_WAIT1 /* 10ms timeout delay */
+
 struct omap_dm_timer {
int irq;
struct clk *fclk;
@@ -185,14 +188,21 @@ static DEFINE_SPINLOCK(dm_timer_lock);
 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
 {
struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
+   int i = 0;
+
if (reg = OMAP_TIMER_WAKEUP_EN_REG)
reg += pdata-func_offset;
else if (reg = OMAP_TIMER_STAT_REG)
reg += pdata-intr_offset;
-   if (timer-posted)
-   while (readl(timer-io_base + (OMAP_TIMER_WRITE_PEND_REG  
0xff))
-(reg  WPSHIFT))
-   cpu_relax();
+
+   if (timer-posted) {
+   omap_test_timeout(!(readl(timer-io_base +
+   ((OMAP_TIMER_WRITE_PEND_REG +
+   pdata-func_offset)  0xff))  (reg  WPSHIFT)),
+   MAX_WRITE_PEND_WAIT, i);
+   WARN_ON(i == MAX_WRITE_PEND_WAIT);
+   }
+
return readl(timer-io_base + (reg  0xff));
 }
 
@@ -210,14 +220,21 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer 
*timer, u32 reg,
u32 value)
 {
struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
+   int i = 0;
+
if (reg = OMAP_TIMER_WAKEUP_EN_REG)
reg += pdata-func_offset;
else if (reg = OMAP_TIMER_STAT_REG)
reg += pdata-intr_offset;
-   if (timer-posted)
-   while (readl(timer-io_base + (OMAP_TIMER_WRITE_PEND_REG  
0xff))
-(reg  WPSHIFT))
-   cpu_relax();
+
+   if (timer-posted) {
+   omap_test_timeout(!(readl(timer-io_base +
+   ((OMAP_TIMER_WRITE_PEND_REG +
+   pdata-func_offset)  0xff))  (reg  WPSHIFT)),
+   MAX_WRITE_PEND_WAIT, i);
+   WARN_ON(i == MAX_WRITE_PEND_WAIT);
+   }
+
writel(value, timer-io_base + (reg  0xff));
 }
 
-- 
1.6.0.4

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[PATCH v5 9/12] OMAP: dmtimer: platform driver

2010-12-06 Thread Tarun Kanti DebBarma
From: Thara Gopinath th...@ti.com

Add dmtimer platform driver functions which include:
(1) platform driver initialization
(2) driver probe function
(3) driver remove function

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Reviewed-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/plat-omap/dmtimer.c |  156 +-
 1 files changed, 154 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 9bf6ac8..ddc875b 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -43,6 +43,8 @@
 #include linux/delay.h
 #include linux/io.h
 #include linux/module.h
+#include linux/slab.h
+#include linux/err.h
 #include mach/hardware.h
 #include plat/dmtimer.h
 #include mach/irqs.h
@@ -167,6 +169,7 @@ struct omap_dm_timer {
unsigned enabled:1;
unsigned posted:1;
struct platform_device *pdev;
+   struct list_head node;
 };
 
 static int dm_timer_count;
@@ -270,7 +273,8 @@ static struct omap_dm_timer *dm_timers;
 static const char **dm_source_names;
 static struct clk **dm_source_clocks;
 
-static spinlock_t dm_timer_lock;
+static LIST_HEAD(omap_timer_list);
+static DEFINE_SPINLOCK(dm_timer_lock);
 
 /*
  * Reads timer registers in posted and non-posted mode. The posted mode bit
@@ -702,6 +706,155 @@ int omap_dm_timers_active(void)
 }
 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 
+/**
+ * omap_dm_timer_probe - probe function called for every registered device
+ * @pdev:  pointer to current timer platform device
+ *
+ * Called by driver framework at the end of device registration for all
+ * timer devices.
+ */
+static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
+{
+   int ret;
+   unsigned long flags;
+   struct omap_dm_timer *timer;
+   struct resource *mem, *irq, *ioarea;
+   struct dmtimer_platform_data *pdata = pdev-dev.platform_data;
+
+   dev_dbg(pdev-dev, %s: +\n, __func__);
+
+   if (!pdata) {
+   dev_err(pdev-dev, %s: no platform data\n, __func__);
+   return -ENODEV;
+   }
+
+   spin_lock_irqsave(dm_timer_lock, flags);
+   list_for_each_entry(timer, omap_timer_list, node)
+   if (timer-pdev-id == pdev-id) {
+   timer-pdev = pdev;
+   spin_unlock_irqrestore(dm_timer_lock, flags);
+   return 0;
+   }
+   spin_unlock_irqrestore(dm_timer_lock, flags);
+
+   irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+   if (unlikely(!irq)) {
+   dev_err(pdev-dev, %s: no IRQ resource\n, __func__);
+   ret = -ENODEV;
+   goto err_free_pdev;
+   }
+
+   mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (unlikely(!mem)) {
+   dev_err(pdev-dev, %s: no memory resource\n, __func__);
+   ret = -ENODEV;
+   goto err_free_pdev;
+   }
+
+   ioarea = request_mem_region(mem-start, resource_size(mem),
+   pdev-name);
+   if (!ioarea) {
+   dev_err(pdev-dev, %s: region already claimed\n, __func__);
+   ret = -EBUSY;
+   goto err_free_pdev;
+   }
+
+   timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
+   if (!timer) {
+   dev_err(pdev-dev, %s: no memory for omap_dm_timer\n,
+   __func__);
+   ret = -ENOMEM;
+   goto err_release_ioregion;
+   }
+
+   timer-io_base = ioremap(mem-start, resource_size(mem));
+   if (!timer-io_base) {
+   dev_err(pdev-dev, %s: ioremap failed\n, __func__);
+   ret = -ENOMEM;
+   goto err_free_mem;
+   }
+
+   timer-irq = irq-start;
+   timer-pdev = pdev;
+   timer-reserved = 0;
+
+   /* add the timer element to the list */
+   spin_lock_irqsave(dm_timer_lock, flags);
+   list_add_tail(timer-node, omap_timer_list);
+   spin_unlock_irqrestore(dm_timer_lock, flags);
+
+   dev_dbg(pdev-dev,  bound to its driver\n);
+
+   return 0;
+
+err_free_mem:
+   kfree(timer);
+
+err_release_ioregion:
+   release_mem_region(mem-start, resource_size(mem));
+
+err_free_pdev:
+   platform_device_del(pdev);
+
+   return ret;
+}
+
+/**
+ * omap_dm_timer_remove - cleanup a registered timer device
+ * @pdev:  pointer to current timer platform device
+ *
+ * Called by driver framework whenever a timer device is unregistered.
+ * In addition to freeing platform resources it also deletes the timer
+ * entry from the local list.
+ */
+static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
+{
+   struct omap_dm_timer *timer, *tmp;
+   unsigned long flags;
+   int ret = -EINVAL;
+
+   spin_lock_irqsave(dm_timer_lock, flags);
+   

[PATCH v5 4/12] OMAP3: hwmod data: add dmtimer

2010-12-06 Thread Tarun Kanti DebBarma
From: Thara Gopinath th...@ti.com

Add dmtimer data.

Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |  676 
 1 files changed, 676 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index cb97ecf..89630c5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -18,6 +18,7 @@
 #include plat/cpu.h
 #include plat/dma.h
 #include plat/serial.h
+#include plat/dmtimer.h
 
 #include omap_hwmod_common_data.h
 
@@ -280,6 +281,668 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
+/* timer class */
+static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
+   .rev_offs   = 0x,
+   .sysc_offs  = 0x0010,
+   .syss_offs  = 0x0014,
+   .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+   SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .clockact   = 0x2,
+   .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
+   .name = timer,
+   .sysc = omap3xxx_timer_1ms_sysc,
+   .rev = OMAP_TIMER_IP_VERSION_1,
+};
+
+static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
+   .rev_offs   = 0x,
+   .sysc_offs  = 0x0010,
+   .syss_offs  = 0x0014,
+   .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
+  SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
+   .name = timer,
+   .sysc = omap3xxx_timer_sysc,
+   .rev =  OMAP_TIMER_IP_VERSION_1,
+};
+
+/* timer1 */
+static struct omap_hwmod omap3xxx_timer1_hwmod;
+static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = {
+   { .irq = INT_24XX_GPTIMER1, },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {
+   {
+   .pa_start   = 0x48318000,
+   .pa_end = 0x48318000 + SZ_1K - 1,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_wkup - timer1 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = {
+   .master = omap3xxx_l4_wkup_hwmod,
+   .slave  = omap3xxx_timer1_hwmod,
+   .clk= gpt1_ick,
+   .addr   = omap3xxx_timer1_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap3xxx_timer1_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer1 master port */
+static struct omap_hwmod_ocp_if *omap3xxx_timer1_masters[] = {
+   omap3xxx_l4_wkup__timer1,
+};
+
+/* timer1 slave port */
+static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {
+   omap3xxx_l4_wkup__timer1,
+};
+
+/* timer1 hwmod */
+static struct omap_hwmod omap3xxx_timer1_hwmod = {
+   .name   = timer1,
+   .mpu_irqs   = omap3xxx_timer1_mpu_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs),
+   .main_clk   = gpt1_fck,
+   .prcm   = {
+   .omap2 = {
+   .prcm_reg_id = 1,
+   .module_bit = OMAP3430_EN_GPT1_SHIFT,
+   .module_offs = WKUP_MOD,
+   .idlest_reg_id = 1,
+   .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
+   },
+   },
+   .masters= omap3xxx_timer1_masters,
+   .masters_cnt= ARRAY_SIZE(omap3xxx_timer1_masters),
+   .slaves = omap3xxx_timer1_slaves,
+   .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves),
+   .class  = omap3xxx_timer_1ms_hwmod_class,
+   .omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* timer2 */
+static struct omap_hwmod omap3xxx_timer2_hwmod;
+static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = {
+   { .irq = INT_24XX_GPTIMER2, },
+};
+
+static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {
+   {
+   .pa_start   = 0x49032000,
+   .pa_end = 0x49032000 + SZ_1K - 1,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_per - timer2 */
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = {
+   .master = omap3xxx_l4_per_hwmod,
+   .slave  = omap3xxx_timer2_hwmod,
+   .clk= gpt2_ick,
+   .addr   = omap3xxx_timer2_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap3xxx_timer2_addrs),

[PATCH v5 0/12] dmtimer adaptation to platform_driver

2010-12-06 Thread Tarun Kanti DebBarma
dmtimer adaptation to platform_driver.

This patch series is adaptation of dmtimer code to platform driver
using omap_device and omap_hwmod abstraction.

Tested on following platforms:
OMAP4430, OMAP3430, OMAP3630, OMAP2430
OMAP2420 -- Image with omap2plus_defconfig in too large to download on N800.

Baseline:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

v5:
(1) In mach-omap2/dmtimer.c the two different init functions are merged
into a single one, viz: omap_timer_init(*oh, *user). Now this function is
used both during early init and later. The distinction between the two is
made by the *user field.

(2) Added timeout to low-level access routines in place of infinite while
loop which waits on write-pend register bit.

(3) Modified devices names from omap-timer.x to omap_timer.x

(4) Modified module description from OMAP DUAL MODE TIMER DRIVER to:
MODULE_DESCRIPTION(OMAP Dual-Mode Timer Driver);

(5) Use well-defined constants for new IP revision register constants instead
of hard-coded values.

(6) Use consistent naming mechanism by using _dm_timer_ instead of _dmtimer_
wherever applicable.

(7) Removed id field from omap_dm_timer{} since the same can be obtained from
pdev.

(8) clk_get() and clk_put() moved from probe() and remove() functions.
Now clk_get() is called when timer is acquired in the omap_dm_timer_prepare()
and clk_put() is called in omap_dm_timer_free().

(9) Modified the device name in mach-omap1/dmtimer.c to omap_timer

(10) Incorporated general comments:
(i) Redundant Copyright information.
(ii) Typos in comments.
(iii) Modify subjects for hwmod database related patches.
(iv) Remove redundant comments from hwmod database as they would be lost during
auto-generation in the future.
(v) replaced dev_dbg() with dev_err() wherever error condition is printed.

TODO:
(1) OFF Mode support

(2) Upgrade timeout implementation in low-level read/write access to return
error condition to EXPORT APIs. This is re-frained in the present implementation
because that would involve change to EXPORTED APIs. Besides, there is no clear
design as yet which is agreed upon by the community.

(3) Try to get rid of dmtimer list maintained separately in the driver. Instead
use the device list maintained by the device model. The devices can be accessed
using available API driver_find_device().

At present we are unable to use driver_find_device() because it does not look
into device list which is created during early boot.
Therefore, until suitable solutions are found we have to wait.

v4:
(1) clock aliases are renamed as 32k_ck, sys_ck and alt_ck
(2) incorporate missing clk_put() for corresponding clk_get()
(3) modified clk_get()/clk_put() to be called once once in platform driver.
(4) consistent header for new files
(5) check return value of omap_hwmod_for_each_by_class() in device init
routines.
(6) remove is_abe_timer field in dmtimer_platform_data structure. this is
no longer needed with new input clock source aliasing.
(7) proper splitting of patch series
(8) remove register map from hwmod database.
(9) remove clock source strings array from hwmod database and associated
structure declaration from plat/dmtimer.h. this is no longer needed.
(10) remove dev_attr from hwmod database. this is no longer needed.
(11) use register offsets to identify OMAP 4 registers instead of register map.
(12) remove clock source name strings from hwmod database.
(13) introduce new mechanism for getting struct clk associated with clock source
names. this is achieved by adding clock alisases for all supported clock 
sources.
(14) remove clock setup functions in mach-omap2 for populating struct clk
associated with all input clock sources because this is no longer needed with
above implementation.
(15) device names changed from dmtimer to omap-timer
(16) device index starts from 1 instead of 0
(17) remove .init_name from hwmod database. this is not needed.
(18) introduce separate functions for reading/writing interrupt registers 
instead of
doing all operations within a single function.

v3:
(1) multi-line comment error correction
(2) provision to allow any of the available dmtimers as early timers
instead of restricting them to millisecond timers only.
(3) in 'struct omap_dmtimer{}' is_initialized flag is redundant and
so must be removed. if the element is found in the list it is already
initialized.
(4) remove 'found' flag in omap_dm_timer_request() and
omap_dm_timer_request_specific() functions.
this is not needed with alternate implementation.
(5) use .init_name to initialize device names so that it can be identified
during early boot as well. This is to avoid duplicate functions for clock
manipulations during early boot and later.
(6) remove redundant functions from mach-omap2 which are created just to
call pm functions like: pm_runtime_get_sync(),pm_runtime_put_sync(),..
and instead call them directly from plat-omap function api's.
(7) timer clock source names made part of hwmod database. source_clock[]
of 

[PATCH v5 7/12] OMAP1: dmtimer: conversion to platform devices

2010-12-06 Thread Tarun Kanti DebBarma
From: Thara Gopinath th...@ti.com

Convert OMAP1 dmtimers into a platform devices and then registers with
device model framework so that it can be bound to corresponding driver.

Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap1/Makefile  |2 +-
 arch/arm/mach-omap1/dmtimer.c |  172 +
 arch/arm/plat-omap/dmtimer.c  |   46 +---
 3 files changed, 175 insertions(+), 45 deletions(-)
 create mode 100644 arch/arm/mach-omap1/dmtimer.c

diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 9a304d8..0001659 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o
-obj-y += clock.o clock_data.o opp_data.o
+obj-y += clock.o clock_data.o opp_data.o dmtimer.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
diff --git a/arch/arm/mach-omap1/dmtimer.c b/arch/arm/mach-omap1/dmtimer.c
new file mode 100644
index 000..2c42432
--- /dev/null
+++ b/arch/arm/mach-omap1/dmtimer.c
@@ -0,0 +1,172 @@
+/**
+ * OMAP1 Dual-Mode Timers - platform device registration
+ *
+ * Contains first level initialization routines which internally
+ * generates timer device information and registers with linux
+ * device model. It also has low level function to chnage the timer
+ * input clock source.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma tarun.ka...@ti.com
+ * Thara Gopinath th...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/io.h
+#include linux/err.h
+#include linux/slab.h
+#include mach/irqs.h
+#include plat/dmtimer.h
+#include plat/omap_device.h
+
+#define OMAP1610_GPTIMER1_BASE 0xfffb1400
+#define OMAP1610_GPTIMER2_BASE 0xfffb1c00
+#define OMAP1610_GPTIMER3_BASE 0xfffb2400
+#define OMAP1610_GPTIMER4_BASE 0xfffb2c00
+#define OMAP1610_GPTIMER5_BASE 0xfffb3400
+#define OMAP1610_GPTIMER6_BASE 0xfffb3c00
+#define OMAP1610_GPTIMER7_BASE 0xfffb7400
+#define OMAP1610_GPTIMER8_BASE 0xfffbd400
+
+#define OMAP1_DM_TIMER_COUNT   8
+
+static int omap1_dm_timer_set_src(struct platform_device *pdev,
+   int source)
+{
+   int n = (pdev-id)  1;
+   u32 l;
+
+   l = omap_readl(MOD_CONF_CTRL_1)  ~(0x03  n);
+   l |= source  n;
+   omap_writel(l, MOD_CONF_CTRL_1);
+
+   return 0;
+}
+
+int __init omap1_dm_timer_device_init(void)
+{
+   int i;
+   int ret;
+   struct dmtimer_platform_data *pdata;
+   struct platform_device *pdev;
+
+   pr_debug(%s: +\n, __func__);
+
+   if (!cpu_is_omap16xx())
+   return 0;
+
+   for (i = 1; i = OMAP1_DM_TIMER_COUNT; i++) {
+   struct resource res[2];
+   u32 base, irq;
+
+   switch (i) {
+   case 1:
+   base = OMAP1610_GPTIMER1_BASE;
+   irq = INT_1610_GPTIMER1;
+   break;
+   case 2:
+   base = OMAP1610_GPTIMER2_BASE;
+   irq = INT_1610_GPTIMER2;
+   break;
+   case 3:
+   base = OMAP1610_GPTIMER3_BASE;
+   irq = INT_1610_GPTIMER3;
+   break;
+   case 4:
+   base = OMAP1610_GPTIMER4_BASE;
+   irq = INT_1610_GPTIMER4;
+   break;
+   case 5:
+   base = OMAP1610_GPTIMER5_BASE;
+   irq = INT_1610_GPTIMER5;
+   break;
+   case 6:
+   base = OMAP1610_GPTIMER6_BASE;
+   irq = INT_1610_GPTIMER6;
+   break;
+   case 7:
+   base = OMAP1610_GPTIMER7_BASE;
+   irq = INT_1610_GPTIMER7;
+   break;
+   case 8:
+   base = OMAP1610_GPTIMER8_BASE;
+   irq = INT_1610_GPTIMER8;
+   break;
+   default:
+   /*
+* not supposd to reach here.
+* this is to remove warning.
+*/
+   return -EINVAL;
+ 

[PATCH v5 11/12] OMAP: dmtimer: pm_runtime support

2010-12-06 Thread Tarun Kanti DebBarma
Add pm_runtime support to dmtimer. Since dmtimer is used during
early boot before pm_runtime is initialized completely there are
provisions to enable/disable clocks directly in the code during
early boot.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
[p-bas...@ti.com: added pm_runtime logic in probe()]
Signed-off-by: Partha Basak p-bas...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/plat-omap/dmtimer.c |   40 ++--
 1 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index ee35a32..d51a459 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -44,6 +44,7 @@
 #include linux/io.h
 #include linux/module.h
 #include linux/slab.h
+#include linux/pm_runtime.h
 #include linux/err.h
 #include mach/hardware.h
 #include plat/dmtimer.h
@@ -353,10 +354,22 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_free);
 
 void omap_dm_timer_enable(struct omap_dm_timer *timer)
 {
+   struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
+
if (timer-enabled)
return;
 
-   clk_enable(timer-fclk);
+   if (unlikely(pdata-is_early_init)) {
+   clk_enable(timer-fclk);
+   timer-enabled = 1;
+   return;
+   }
+
+   if (pm_runtime_get_sync(timer-pdev-dev)) {
+   dev_err(timer-pdev-dev, %s: pm_runtime_get_sync() FAILED\n,
+   __func__);
+   return;
+   }
 
timer-enabled = 1;
 }
@@ -364,10 +377,22 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
 
 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 {
+   struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
+
if (!timer-enabled)
return;
 
-   clk_disable(timer-fclk);
+   if (unlikely(pdata-is_early_init)) {
+   clk_disable(timer-fclk);
+   timer-enabled = 0;
+   return;
+   }
+
+   if (pm_runtime_put_sync(timer-pdev-dev)) {
+   dev_err(timer-pdev-dev, %s: pm_runtime_put_sync() FAILED\n,
+   __func__);
+   return;
+   }
 
timer-enabled = 0;
 }
@@ -662,11 +687,22 @@ static int __devinit omap_dm_timer_probe(struct 
platform_device *pdev)
return -ENODEV;
}
 
+   /*
+* Early timers are already registered and in list.
+* What we need to do during second phase of probe
+* is to assign the newly allocated/configured pdev
+* to already registered timer-pdev. We also call
+* pm_runtime_enable() for each device because it
+* could not be called during early boot because
+* pm_runtime framework was not yet up and running.
+*/
spin_lock_irqsave(dm_timer_lock, flags);
list_for_each_entry(timer, omap_timer_list, node)
if (timer-pdev-id == pdev-id) {
timer-pdev = pdev;
spin_unlock_irqrestore(dm_timer_lock, flags);
+   pm_runtime_enable(pdev-dev);
+   dev_dbg(pdev-dev, pm_runtime ENABLED\n);
return 0;
}
spin_unlock_irqrestore(dm_timer_lock, flags);
-- 
1.6.0.4

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[PATCH v5 10/12] OMAP: dmtimer: switch-over to platform device driver

2010-12-06 Thread Tarun Kanti DebBarma
switch-over to platform device driver through following changes:
(a) call to dmtimer initialization routine from timer-gp.c is
removed (b) initiate dmtimer early initialization from omap2_init_common_hw
in io.c (c) modify plat-omap/dmtimer routines to use new register map and
platform data.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/clock2420_data.c  |2 +-
 arch/arm/mach-omap2/clock2430_data.c  |2 +-
 arch/arm/mach-omap2/clock3xxx_data.c  |2 +-
 arch/arm/mach-omap2/clock44xx_data.c  |2 +-
 arch/arm/mach-omap2/dmtimer.c |   40 
 arch/arm/mach-omap2/io.c  |2 +
 arch/arm/mach-omap2/timer-gp.c|1 -
 arch/arm/plat-omap/dmtimer.c  |  323 +
 arch/arm/plat-omap/include/plat/dmtimer.h |2 -
 9 files changed, 148 insertions(+), 228 deletions(-)

diff --git a/arch/arm/mach-omap2/clock2420_data.c 
b/arch/arm/mach-omap2/clock2420_data.c
index d140807..d4ad8ce 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1801,7 +1801,7 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL,   virt_prcm_set, virt_prcm_set, CK_242X),
/* general l4 interface ck, multi-parent functional clk */
CLK(NULL,   gpt1_ick, gpt1_ick,  CK_242X),
-   CLK(NULL,   gpt1_fck, gpt1_fck,  CK_242X),
+   CLK(omap_timer.1, fck,  gpt1_fck,  CK_242X),
CLK(NULL,   gpt2_ick, gpt2_ick,  CK_242X),
CLK(omap_timer.2, fck,  gpt2_fck,  CK_242X),
CLK(NULL,   gpt3_ick, gpt3_ick,  CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c 
b/arch/arm/mach-omap2/clock2430_data.c
index a29b042..0514514 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1905,7 +1905,7 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL,   virt_prcm_set, virt_prcm_set, CK_243X),
/* general l4 interface ck, multi-parent functional clk */
CLK(NULL,   gpt1_ick, gpt1_ick,  CK_243X),
-   CLK(NULL,   gpt1_fck, gpt1_fck,  CK_243X),
+   CLK(omap_timer.1, fck,  gpt1_fck,  CK_243X),
CLK(NULL,   gpt2_ick, gpt2_ick,  CK_243X),
CLK(omap_timer.2, fck,  gpt2_fck,  CK_243X),
CLK(NULL,   gpt3_ick, gpt3_ick,  CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c 
b/arch/arm/mach-omap2/clock3xxx_data.c
index 3d9c4ef..ec5997b 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3361,7 +3361,7 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL,   usbhost_48m_fck, usbhost_48m_fck, CK_3430ES2 | 
CK_AM35XX),
CLK(NULL,   usbhost_ick,  usbhost_ick,   CK_3430ES2 | CK_AM35XX),
CLK(NULL,   usim_fck, usim_fck,  CK_3430ES2),
-   CLK(NULL,   gpt1_fck, gpt1_fck,  CK_3XXX),
+   CLK(omap_timer.1, fck,  gpt1_fck,  CK_3XXX),
CLK(NULL,   wkup_32k_fck, wkup_32k_fck,  CK_3XXX),
CLK(NULL,   gpio1_dbck,   gpio1_dbck,CK_3XXX),
CLK(omap_wdt, fck,  wdt2_fck,  CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c 
b/arch/arm/mach-omap2/clock44xx_data.c
index be0737c..a62743e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -2921,7 +2921,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL,   smartreflex_core_fck, smartreflex_core_fck,  
CK_443X),
CLK(NULL,   smartreflex_iva_fck,  smartreflex_iva_fck,   
CK_443X),
CLK(NULL,   smartreflex_mpu_fck,  smartreflex_mpu_fck,   
CK_443X),
-   CLK(NULL,   gpt1_fck, timer1_fck,
CK_443X),
+   CLK(omap_timer.1, fck,  timer1_fck,CK_443X),
CLK(omap_timer.10,fck,  timer10_fck,   CK_443X),
CLK(omap_timer.11,fck,  timer11_fck,   CK_443X),
CLK(omap_timer.2, fck,  timer2_fck,CK_443X),
diff --git a/arch/arm/mach-omap2/dmtimer.c b/arch/arm/mach-omap2/dmtimer.c
index b639082..50509c7 100644
--- a/arch/arm/mach-omap2/dmtimer.c
+++ b/arch/arm/mach-omap2/dmtimer.c
@@ -172,3 +172,43 @@ static int __init omap_timer_init(struct omap_hwmod *oh, 
void *user)
 
return ret;
 }
+
+/**
+ * omap2_dm_timer_early_init - top level early timer initialization
+ * called in the last part of omap2_init_common_hw
+ *
+ * Uses dedicated hwmod api to parse through hwmod database for
+ * given class name and then build and register the timer device.
+ * At the end driver is registered and early probe initiated.
+ */
+void __init omap2_dm_timer_early_init(void)
+{
+   int early_init = 1; /* identify early init in 

[PATCH v5 2/12] OMAP2420: hwmod data: add dmtimer

2010-12-06 Thread Tarun Kanti DebBarma
From: Thara Gopinath th...@ti.com

Add dmtimer data.

Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_2420_data.c |  635 
 1 files changed, 635 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c 
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index adf6e36..6d2e527 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -16,6 +16,7 @@
 #include plat/cpu.h
 #include plat/dma.h
 #include plat/serial.h
+#include plat/dmtimer.h
 
 #include omap_hwmod_common_data.h
 
@@ -228,6 +229,626 @@ static struct omap_hwmod omap2420_iva_hwmod = {
.omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
+/* Timer Common */
+static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = {
+   .rev_offs   = 0x,
+   .sysc_offs  = 0x0010,
+   .syss_offs  = 0x0014,
+   .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+  SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+  SYSC_HAS_AUTOIDLE),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .clockact   = 0x2,
+   .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2420_timer_hwmod_class = {
+   .name = timer,
+   .sysc = omap2420_timer_sysc,
+   .rev = OMAP_TIMER_IP_VERSION_1,
+};
+
+/* timer1 */
+static struct omap_hwmod omap2420_timer1_hwmod;
+static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = {
+   { .irq = INT_24XX_GPTIMER1, },
+};
+
+static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
+   {
+   .pa_start   = 0x48028000,
+   .pa_end = 0x48028000 + SZ_1K - 1,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_wkup - timer1 */
+static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
+   .master = omap2420_l4_wkup_hwmod,
+   .slave  = omap2420_timer1_hwmod,
+   .clk= gpt1_ick,
+   .addr   = omap2420_timer1_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap2420_timer1_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer1 slave port */
+static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
+   omap2420_l4_wkup__timer1,
+};
+
+/* timer1 hwmod */
+static struct omap_hwmod omap2420_timer1_hwmod = {
+   .name   = timer1,
+   .mpu_irqs   = omap2420_timer1_mpu_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer1_mpu_irqs),
+   .main_clk   = gpt1_fck,
+   .prcm   = {
+   .omap2 = {
+   .prcm_reg_id = 1,
+   .module_bit = OMAP24XX_EN_GPT1_SHIFT,
+   .module_offs = WKUP_MOD,
+   .idlest_reg_id = 1,
+   .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
+   },
+   },
+   .slaves = omap2420_timer1_slaves,
+   .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
+   .class  = omap2420_timer_hwmod_class,
+   .omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+/* timer2 */
+static struct omap_hwmod omap2420_timer2_hwmod;
+static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
+   { .irq = INT_24XX_GPTIMER2, },
+};
+
+static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = {
+   {
+   .pa_start   = 0x4802a000,
+   .pa_end = 0x4802a000 + SZ_1K - 1,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_core - timer2 */
+static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
+   .master = omap2420_l4_core_hwmod,
+   .slave  = omap2420_timer2_hwmod,
+   .clk= gpt2_ick,
+   .addr   = omap2420_timer2_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap2420_timer2_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer2 slave port */
+static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
+   omap2420_l4_core__timer2,
+};
+
+/* timer2 hwmod */
+static struct omap_hwmod omap2420_timer2_hwmod = {
+   .name   = timer2,
+   .mpu_irqs   = omap2420_timer2_mpu_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer2_mpu_irqs),
+   .main_clk   = gpt2_fck,
+   .prcm   = {
+   .omap2 = {
+   .prcm_reg_id = 1,
+   .module_bit = OMAP24XX_EN_GPT2_SHIFT,
+   .module_offs = CORE_MOD,
+   .idlest_reg_id = 1,
+   .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
+   },
+   },
+   .slaves = omap2420_timer2_slaves,
+   .slaves_cnt = 

[PATCH v5 3/12] OMAP2430: hwmod data: add dmtimer

2010-12-06 Thread Tarun Kanti DebBarma
From: Thara Gopinath th...@ti.com

Add dmtimer data.

Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_2430_data.c |  634 
 1 files changed, 634 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c 
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 12d939e..891ff3a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -16,6 +16,7 @@
 #include plat/cpu.h
 #include plat/dma.h
 #include plat/serial.h
+#include plat/dmtimer.h
 
 #include omap_hwmod_common_data.h
 
@@ -228,6 +229,625 @@ static struct omap_hwmod omap2430_iva_hwmod = {
.omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
+/* Timer Common */
+static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = {
+   .rev_offs   = 0x,
+   .sysc_offs  = 0x0010,
+   .syss_offs  = 0x0014,
+   .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+  SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+  SYSC_HAS_AUTOIDLE),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .clockact   = 0x2,
+   .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2430_timer_hwmod_class = {
+   .name = timer,
+   .sysc = omap2430_timer_sysc,
+   .rev = OMAP_TIMER_IP_VERSION_1,
+};
+
+/* timer1 */
+static struct omap_hwmod omap2430_timer1_hwmod;
+static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = {
+   { .irq = INT_24XX_GPTIMER1, },
+};
+
+static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
+   {
+   .pa_start   = 0x49018000,
+   .pa_end = 0x49018000 + SZ_1K - 1,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_wkup - timer1 */
+static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
+   .master = omap2430_l4_wkup_hwmod,
+   .slave  = omap2430_timer1_hwmod,
+   .clk= gpt1_ick,
+   .addr   = omap2430_timer1_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap2430_timer1_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer1 slave port */
+static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
+   omap2430_l4_wkup__timer1,
+};
+
+/* timer1 hwmod */
+static struct omap_hwmod omap2430_timer1_hwmod = {
+   .name   = timer1,
+   .mpu_irqs   = omap2430_timer1_mpu_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer1_mpu_irqs),
+   .main_clk   = gpt1_fck,
+   .prcm   = {
+   .omap2 = {
+   .prcm_reg_id = 1,
+   .module_bit = OMAP24XX_EN_GPT1_SHIFT,
+   .module_offs = WKUP_MOD,
+   .idlest_reg_id = 1,
+   .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
+   },
+   },
+   .slaves = omap2430_timer1_slaves,
+   .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
+   .class  = omap2430_timer_hwmod_class,
+   .omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+/* timer2 */
+static struct omap_hwmod omap2430_timer2_hwmod;
+static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
+   { .irq = INT_24XX_GPTIMER2, },
+};
+
+static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = {
+   {
+   .pa_start   = 0x4802a000,
+   .pa_end = 0x4802a000 + SZ_1K - 1,
+   .flags  = ADDR_TYPE_RT
+   },
+};
+
+/* l4_core - timer2 */
+static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
+   .master = omap2430_l4_core_hwmod,
+   .slave  = omap2430_timer2_hwmod,
+   .clk= gpt2_ick,
+   .addr   = omap2430_timer2_addrs,
+   .addr_cnt   = ARRAY_SIZE(omap2430_timer2_addrs),
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer2 slave port */
+static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
+   omap2430_l4_core__timer2,
+};
+
+/* timer2 hwmod */
+static struct omap_hwmod omap2430_timer2_hwmod = {
+   .name   = timer2,
+   .mpu_irqs   = omap2430_timer2_mpu_irqs,
+   .mpu_irqs_cnt   = ARRAY_SIZE(omap2430_timer2_mpu_irqs),
+   .main_clk   = gpt2_fck,
+   .prcm   = {
+   .omap2 = {
+   .prcm_reg_id = 1,
+   .module_bit = OMAP24XX_EN_GPT2_SHIFT,
+   .module_offs = CORE_MOD,
+   .idlest_reg_id = 1,
+   .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
+   },
+   },
+   .slaves = omap2430_timer2_slaves,
+   .slaves_cnt = 

State of LDP3430 platform

2010-12-06 Thread Russell King - ARM Linux
As previously requested.

The following is the behaviour of the latest mainline kernel on the LDP3430
platform.

[ cut here ]
WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 
_omap_hwmod_enable+0x34/0x114()
omap_hwmod: wd_timer2: enabled state can only be entered from initialized, 
idle, or disabled state
Modules linked in:
---[ end trace 1b75b31a2719ed1c ]---
wd_timer2: Could not enable clocks for omap2_disable_wdt
...
Waiting 2sec before mounting root device...
mmc0: host does not support reading read-only switch. assuming write-enable.
mmc0: new high speed SD card at address 0002
mmcblk0: mmc0:0002 0 971 MiB
 mmcblk0: p1 p2
EXT3-fs: barriers not enabled
mmcblk0: retrying using single block read
kjournald starting.  Commit interval 5 seconds
EXT3-fs (mmcblk0p2): warning: mounting fs with errors, running e2fsck is 
recommended
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): recovery complete
EXT3-fs (mmcblk0p2): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
Freeing init memory: 144K
mmcblk0: retrying using single block read
INIT: version 2.86 booting
mmcblk0: retrying using single block read
modprobe: FATAL: Could not load /lib/modules/2.6.37-rc4+/modules.dep: No such 
file or directory

Error opening /dev/fb0: No such device
.udev/ already exists on the static /dev!
Starting the hotplug events dispatcher udevd
udevd (429): /proc/429/oom_adj is deprecated, please use 
/proc/429/oom_score_adj instead.
mmcblk0: retrying using single block read
mmcblk0: retrying using single block read
Synthesizing the initial hotplug events
spontaneous reboot

My guess is it's the watchdog which hwmod apparantly can't deal with.
Note also LDP framebuffer doesn't appear to work in this configuration:

CONFIG_OMAP2_VRAM=y
CONFIG_OMAP2_VRFB=y
CONFIG_OMAP2_DSS=y
CONFIG_OMAP2_VRAM_SIZE=2
CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS=y
CONFIG_OMAP2_DSS_DPI=y
# CONFIG_OMAP2_DSS_RFBI is not set
CONFIG_OMAP2_DSS_VENC=y
# CONFIG_OMAP2_DSS_SDI is not set
# CONFIG_OMAP2_DSS_DSI is not set
# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
CONFIG_FB_OMAP2=y
CONFIG_FB_OMAP2_DEBUG_SUPPORT=y
CONFIG_FB_OMAP2_NUM_FBS=3

#
# OMAP2/3 Display Device Drivers
#
CONFIG_PANEL_GENERIC=y
CONFIG_PANEL_SHARP_LS037V7DW01=m

With the FB_OMAP driver, it looks like the screen isn't being correctly
driven - the openhand logo appears in outline with green splodges in
places (but unfortunately, because of the reboot, it doesn't stay there
for long enough to get a photo of it.)


Full boot messages below (with FB_OMAP2):

Texas Instruments X-Loader 1.41mmc
Starting OS Bootloader from NAND ...


U-Boot 1.1.4 (May 19 2008 - 14:27:52)

OMAP3430-GP rev 2, CPU-OPP2 L3-133MHz
OMAP3430LAB 0.1 Version + mDDR (Boot NAND)
DRAM:  128 MB
NAND:256 MiB
In:serial
Out:   serial
Err:   serial
Battery levels: main 3863 mV, backup 2394 mV
LAN9x18 (0x9211) detected.
Read mac address: 00:08:EE:02:24:B2
start Auto negotiation... (take ~2sec)
Auto negotiation complete, 100BaseTX, full duplex
Hit any key to stop autoboot:  0
OMAP34XX LAB # setenv bootargs 'console=ttyO2,115200n8 noinitrd vmalloc=1G 
mem=128M root=/dev/mmcblk0p2 rw ip=none rootdelay=2 
video=omap24xxfb:rotation=270'
OMAP34XX LAB # dhcp; bootm
LAN9x18 (0x9211) detected.
Read mac address: 00:08:EE:02:24:B2
start Auto negotiation... (take ~2sec)
Auto negotiation complete, 100BaseTX, full duplex
BOOTP broadcast 1
DHCP client bound to address 192.168.0.251
TFTP from server 192.168.0.4; our IP address is 192.168.0.251
Filename '/var/boot/kernels/arm-0008ee0224b2'.
Load address: 0x8000
Loading: #
 #
 #
 #
 #
 #
done
Bytes transferred = 1872004 (1c9084 hex)
## Booting image at 8000 ...
   Image Name:   Linux-2.6.37-rc4+
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:1871940 Bytes =  1.8 MB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.37-rc4+ (r...@rmk-pc) (gcc version 4.3.5 (GCC) ) #53 Mon Dec 
6 12:32:53 GMT 2010
CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: OMAP LDP board
vmalloc area is too big, limiting to 864MB
Reserving 2097152 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
OMAP3430/3530 ES2.1 (l2cache iva sgx neon isp )
SRAM: Mapped pa 0x4020 to va 0xfe40 size: 0x1
pcpu-alloc: s0 r0 

RE: [PATCH v6 8/8] Input: omap4 - pm runtime

2010-12-06 Thread Datta, Shubhrajyoti

Kevin,
 -Original Message-
 From: linux-input-ow...@vger.kernel.org [mailto:linux-input-
 ow...@vger.kernel.org] On Behalf Of Kevin Hilman
 Sent: Thursday, September 30, 2010 7:21 PM
 To: Arce, Abraham
 Cc: linux-in...@vger.kernel.org; linux-omap@vger.kernel.org
 Subject: Re: [PATCH v6 8/8] Input: omap4 - pm runtime
 
 Abraham Arce x0066...@ti.com writes:
 
  Enable pm runtime in driver
 
 So power is enabled on probe and cut on _remove().  Did you consider
 doing any more fine grained PM for this device?  For example, cutting
 power after some inactivity timer and re-enabling on a
 keypress/interrupt?
My idea is that the clock needs to be on to get interrupts (OMAP4 the control 
is at module level and  ick/fclk level control is difficult). So disabling will 
prevent interrupts. 
The keypad is in wakeup domain which is always on. So the power impact may be 
minimal.

What do you think.
 
 Kevin
 
 
 
  Reviewed-by: Basak, Partha p-bas...@ti.com
  Signed-off-by: Abraham Arce x0066...@ti.com
  ---
   drivers/input/keyboard/omap4-keypad.c |7 +++
   1 files changed, 7 insertions(+), 0 deletions(-)
 
  diff --git a/drivers/input/keyboard/omap4-keypad.c
 b/drivers/input/keyboard/omap4-keypad.c
  index 45bd097..ed47e9a 100644
  --- a/drivers/input/keyboard/omap4-keypad.c
  +++ b/drivers/input/keyboard/omap4-keypad.c
  @@ -29,6 +29,7 @@
   #include linux/io.h
   #include linux/input.h
   #include linux/slab.h
  +#include linux/pm_runtime.h
 
   #include plat/omap4-keypad.h
 
  @@ -239,6 +240,9 @@ static int __devinit omap4_keypad_probe(struct
 platform_device *pdev)
  matrix_keypad_build_keymap(pdata-keymap_data, row_shift,
  input_dev-keycode, input_dev-keybit);
 
  +   pm_runtime_enable(pdev-dev);
  +   pm_runtime_get_sync(pdev-dev);
  +
  omap4_keypad_config(keypad_data);
 
  error = request_irq(keypad_data-irq, omap4_keypad_interrupt,
  @@ -277,6 +281,9 @@ static int __devexit omap4_keypad_remove(struct
 platform_device *pdev)
  struct omap4_keypad *keypad_data = platform_get_drvdata(pdev);
  struct resource *res;
 
  +   pm_runtime_put_sync(pdev-dev);
  +   pm_runtime_disable(pdev-dev);
  +
  free_irq(keypad_data-irq, keypad_data);
  input_unregister_device(keypad_data-input);
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[PATCH] omap1: htc_herald: Fix compilation warning.

2010-12-06 Thread Marek Belisko
Patch fix following compilation warning:
arch/arm/mach-omap1/board-htcherald.c:442:
warning: large integer implicitly truncated to unsigned type

Hopefully this is just a typo.

Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
---
 arch/arm/mach-omap1/board-htcherald.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap1/board-htcherald.c 
b/arch/arm/mach-omap1/board-htcherald.c
index 071af3e..cdbf3b1 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -439,7 +439,7 @@ static const struct ads7846_platform_data 
htcherald_ts_platform_data = {
.keep_vref_on   = 1,
.x_plate_ohms   = 496,
.gpio_pendown   = HTCHERALD_GPIO_TS,
-   .pressure_max   = 10,
+   .pressure_max   = 1,
.pressure_min   = 5000,
.x_min  = 528,
.x_max  = 3760,
-- 
1.7.1

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[PATCH] omap1: pm_bus: Fix compilation warning.

2010-12-06 Thread Marek Belisko
Fix following compilation warning:
arch/arm/mach-omap1/pm_bus.c: In function 'omap1_pm_runtime_resume':
arch/arm/mach-omap1/pm_bus.c:51: warning: unused variable 'ret'

Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
---
 arch/arm/mach-omap1/pm_bus.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index 8b66392..f97c6e9 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -48,7 +48,6 @@ static int omap1_pm_runtime_suspend(struct device *dev)
 
 static int omap1_pm_runtime_resume(struct device *dev)
 {
-   int ret = 0;
struct clk *iclk, *fclk;
 
dev_dbg(dev, %s\n, __func__);
-- 
1.7.1

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[PATCH] omap1: mailbox: Fix compilation warning.

2010-12-06 Thread Marek Belisko
Fix following compilation warning:
arch/arm/mach-omap1/mailbox.c: In function 'omap1_mbox_probe':
arch/arm/mach-omap1/mailbox.c:148: warning: unused variable 'i'

Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
---
 arch/arm/mach-omap1/mailbox.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index 1a85a42..1add133 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -145,7 +145,6 @@ static int __devinit omap1_mbox_probe(struct 
platform_device *pdev)
 {
struct resource *mem;
int ret;
-   int i;
struct omap_mbox **list;
 
list = omap1_mboxes;
-- 
1.7.1

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ITBOK sources for TI BeagleBoard

2010-12-06 Thread Elvis Dowson
Hi,
Where can I obtain the TI ITBOK (Is The Board OK) sources for TI 
BeagleBoard? I have the sources for the OMAP35x EVM but it doesn't execute so 
well, probably because it requires changes to work with BeagleBoard hardware. 
So I was wondering if someone has already adapted ITBOK for the BeagleBoard?

Elvis Dowson

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Re: [GIT PULL] OMAP: mailbox and iommu changes: for-next for v2.6.38

2010-12-06 Thread Kanigeri, Hari
Ruseell,

On Thu, Dec 2, 2010 at 9:43 AM, Guzman Lugo, Fernando
fernando.l...@ti.com wrote:
 On Thu, Dec 2, 2010 at 9:20 AM, Russell King - ARM Linux
 li...@arm.linux.org.uk wrote:
 On Thu, Dec 02, 2010 at 08:50:07AM -0600, Guzman Lugo, Fernando wrote:
 On Thu, Dec 2, 2010 at 6:33 AM, Russell King - ARM Linux
 li...@arm.linux.org.uk wrote:
  On Thu, Dec 02, 2010 at 06:07:23AM -0600, Kanigeri, Hari wrote:
  Hi Tony,
 
  The following changes since commit 
  e8a7e48bb248a1196484d3f8afa53bded2b24e71:
    Linus Torvalds (1):
          Linux 2.6.37-rc4
 
  are available in the git repository at:
 
    git://gitorious.org/iommu_mailbox/iommu_mailbox.git for_2.6.38
 
  Fernando Guzman Lugo (5):
        OMAP: mailbox: change full flag per mailbox queue instead of global
        omap: iovmm - no gap checking for fixed address
        omap: iovmm - add superpages support to fixed da address
        omap: iovmm - replace __iounmap with omap_iounmap
 
  This change is wrong.  Nothing should be directly referencing omap_iounmap
  nor for that matter omap_ioremap.  Both are implementation details of the
  standard ioremap/iounmap APIs.
 
  Use the official APIs rather than the implementation details behind them.

 if you see where the function is used, you will see that it is not
 calling the function, it is use as a parameter in unmap_vm_area(), if
 I used iounmap which is a macro there I will get a compilation error.

 Hmm, yes, because iounmap() is defined as a macro rather than iounmap.

 The solution to this is to fix iounmap and __arch_iounmap macros so
 they aren't macros which take arguments.  That will then allow them
 to be used in the way you desire.

 yes, that way it can be used in the function parameter. what is the
 right thing to do?
 1) You send your patch and then I send the new version of the patches.
 2) I make a new series of the patches with the change to iounmap and I
 include your patch in the series.


Can you please suggest the approach we take here ? So, either you send
your suggested change as a patch and Fernando's patch will be based on
it, or he can take a TODO action item to patch again if you plan to
send this change later.


Thank you,
Best regards,
Hari Kanigeri
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Re: [GIT PULL] OMAP: mailbox and iommu changes: for-next for v2.6.38

2010-12-06 Thread Russell King - ARM Linux
On Mon, Dec 06, 2010 at 09:16:23AM -0600, Kanigeri, Hari wrote:
 Ruseell,
 
 On Thu, Dec 2, 2010 at 9:43 AM, Guzman Lugo, Fernando
 fernando.l...@ti.com wrote:
  On Thu, Dec 2, 2010 at 9:20 AM, Russell King - ARM Linux
  li...@arm.linux.org.uk wrote:
  On Thu, Dec 02, 2010 at 08:50:07AM -0600, Guzman Lugo, Fernando wrote:
  On Thu, Dec 2, 2010 at 6:33 AM, Russell King - ARM Linux
  li...@arm.linux.org.uk wrote:
   On Thu, Dec 02, 2010 at 06:07:23AM -0600, Kanigeri, Hari wrote:
   Hi Tony,
  
   The following changes since commit 
   e8a7e48bb248a1196484d3f8afa53bded2b24e71:
     Linus Torvalds (1):
           Linux 2.6.37-rc4
  
   are available in the git repository at:
  
     git://gitorious.org/iommu_mailbox/iommu_mailbox.git for_2.6.38
  
   Fernando Guzman Lugo (5):
         OMAP: mailbox: change full flag per mailbox queue instead of 
   global
         omap: iovmm - no gap checking for fixed address
         omap: iovmm - add superpages support to fixed da address
         omap: iovmm - replace __iounmap with omap_iounmap
  
   This change is wrong.  Nothing should be directly referencing 
   omap_iounmap
   nor for that matter omap_ioremap.  Both are implementation details of 
   the
   standard ioremap/iounmap APIs.
  
   Use the official APIs rather than the implementation details behind 
   them.
 
  if you see where the function is used, you will see that it is not
  calling the function, it is use as a parameter in unmap_vm_area(), if
  I used iounmap which is a macro there I will get a compilation error.
 
  Hmm, yes, because iounmap() is defined as a macro rather than iounmap.
 
  The solution to this is to fix iounmap and __arch_iounmap macros so
  they aren't macros which take arguments.  That will then allow them
  to be used in the way you desire.
 
  yes, that way it can be used in the function parameter. what is the
  right thing to do?
  1) You send your patch and then I send the new version of the patches.
  2) I make a new series of the patches with the change to iounmap and I
  include your patch in the series.
 
 
 Can you please suggest the approach we take here ? So, either you send
 your suggested change as a patch and Fernando's patch will be based on
 it, or he can take a TODO action item to patch again if you plan to
 send this change later.

I've not yet decided myself what to do about it, which is why I haven't
replied or even committed the patch myself - I've had the hotplug/SMP/gic
stuff to concentrate on during the latter half of last week _and_ the
weekend, so I've not had time to get back to this yet.
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Re: State of LDP3430 platform

2010-12-06 Thread Tony Lindgren
* Russell King - ARM Linux li...@arm.linux.org.uk [101206 04:45]:

 [ cut here ]
 WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 
 _omap_hwmod_enable+0x34/0x114()
 omap_hwmod: wd_timer2: enabled state can only be entered from initialized, 
 idle, or disabled state
 Modules linked in:
 ---[ end trace 1b75b31a2719ed1c ]---
 wd_timer2: Could not enable clocks for omap2_disable_wdt

It seems like there's a problem handling a watchdog that's enabled
in the bootloader.. But that's not the only problem, looks like I'm
getting this on overo:

omap_device: omap_wdt.-1: new worst case activate latency 0: 122070
OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
omap_device: omap_wdt.-1: new worst case deactivate latency 0: 30517
twl4030_wdt twl4030_wdt: Failed to register misc device
twl4030_wdt: probe of twl4030_wdt failed with error -16

Regards,

Tony
 
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Re: [PATCH v5 0/12] dmtimer adaptation to platform_driver

2010-12-06 Thread G, Manjunath Kondaiah
On Tue, Dec 07, 2010 at 05:14:07AM +0530, Tarun Kanti DebBarma wrote:
 dmtimer adaptation to platform_driver.
 
 This patch series is adaptation of dmtimer code to platform driver
 using omap_device and omap_hwmod abstraction.
 
 Tested on following platforms:
 OMAP4430, OMAP3430, OMAP3630, OMAP2430
 OMAP2420 -- Image with omap2plus_defconfig in too large to download on N800.

How about omap1? The mainline code happily compiles and boots on osk5912
but this series is going to break omap1 build.

As per Tony's comments for GPIO and DMA hwmod, the changes should build and
boot for omap1 also.

-Manjunath

[...]
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Re: [PATCH v2 3/6] TI816X: Update common OMAP machine specific sources

2010-12-06 Thread Tony Lindgren
Hi,

Sorry for the delay.

* Pedanekar, Hemant hema...@ti.com [101130 17:36]:
 Tony Lindgren wrote on Tuesday, November 30, 2010 12:59 AM:
 
 Thanks for clarifications. I have some concerns though:
 1) I will eventually end up preceeding existing OMAP3 ckecks to have
 cpu_is_34xx() fail. Fo example, in above case, since cpu_is_omap34xx will
 be true for ti81xx (which we don't want), I need to update the code as:
 
   if (cpu_is_omap24xx() || (cpu_is_omap34xx()  !cpu_is_ti816x()) {
 OR
   if (cpu_is_omap24xx() || (cpu_is_omap34xx()  omap_has_idlest()) {
 
 Then proceed to have a TI816X specific handling in else if part with
 cpu_is_ti816x() check.

In places like that omap_has_idlest or similar should be the only test
needed to avoid having to patch all over the place to add new processors.
  
 2) Various module base addresses part of global data are different compared to
 OMAP3/4 - e.g., .tap, .ctrl, .prm etc are different. This means I will still
 need separate global data in arch/arm/mach-omap2/common.c as present for
 OMAP3/4 and have it set up in omap2_set_globals_ti816x().

Yes that we're already handling.
 
 3) Differences in PRCM, PLL mean we need a separate clock data files such as
 clock816x_data.c, clockdomains816x.h, powerdomains816x.h etc. In fact, future
 SoCs in 816x (or rather, 81xx) series will share the same organization and we
 will be adding to these files instead of growing omap3xxx_data.c etc. Of 
 course,
 I see some special handling done depending upon cpu_is_ and features in
 omap3xxx_clk_init() - but will similar approach scale with TI816X which has
 completely different clock data?

Those patches should be separate patches on top of the minimal supoort
to boot to console. 
 
 Similarly, we will also need to add TI816X specific hwmods.
 
 4) TI816X series shares similarity with OMAP4 too - e.g., various IPs are 
 same,
 CM module is closer to OMAP4 than OMAP3. Thus, regaring (1) above, I could use
 OMAP4 code instead of adding new else if. Of course, again, there are above
 mentioned differences too.

We really want to use same code for the shared modules so using feature
based detection is the way to go.
 
 With all this, won't it be better if we add TI816X (or TI81XX) series to exist
 on similar lines with OMAP3/4?

It depends, to me it still sounds like it should be done based on the
features. If necessary we can initialize more things with set_globals.
 
 Please let me know your thoughts on the above. I can send v3 patch set
 incorporating your suggestion of plugging TI816X into OMAP3.

Well let's start with the absolute minimal patches to get those
integrated.
 
 Also, the patch set submitted doesn't have complete set of files yet
 (particularly PRCM/clock code), please have a look at code hosted on Arago.
 Below is the link to mach-omap2 folder (2.6.34 at the moment)
 http://arago-project.org/git/people/?p=sriram/ti-psp-omap.git;a=tree;f=arch/arm/mach-omap2;h=7f2c48b8cb3213b3850d0b6ea242c0c53fa5d6fa;hb=refs/heads/ti816x-master

Those you might want to post also for people to look at even if
we don't know yet how we should deal with them.

Regards,

Tony
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Re: [PATCH v5 2/12] OMAP2420: hwmod data: add dmtimer

2010-12-06 Thread G, Manjunath Kondaiah
On Tue, Dec 07, 2010 at 05:14:09AM +0530, Tarun Kanti DebBarma wrote:
 From: Thara Gopinath th...@ti.com
 
 Add dmtimer data.
 
 Signed-off-by: Thara Gopinath th...@ti.com
 Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
 Acked-by: Cousson, Benoit b-cous...@ti.com
 Reviewed-by: Varadarajan, Charulatha ch...@ti.com
 ---
  arch/arm/mach-omap2/omap_hwmod_2420_data.c |  635 
 
  1 files changed, 635 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c 
 b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
 index adf6e36..6d2e527 100644
 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
 +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
 @@ -16,6 +16,7 @@
  #include plat/cpu.h
  #include plat/dma.h
  #include plat/serial.h
 +#include plat/dmtimer.h
  
  #include omap_hwmod_common_data.h
  
 @@ -228,6 +229,626 @@ static struct omap_hwmod omap2420_iva_hwmod = {
   .omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
  };
  
 +/* Timer Common */
 +static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = {
 + .rev_offs   = 0x,
 + .sysc_offs  = 0x0010,
 + .syss_offs  = 0x0014,
 + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
 +SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
 +SYSC_HAS_AUTOIDLE),
 + .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
 + .clockact   = 0x2,
 + .sysc_fields= omap_hwmod_sysc_type1,
 +};
 +
 +static struct omap_hwmod_class omap2420_timer_hwmod_class = {
 + .name = timer,
 + .sysc = omap2420_timer_sysc,
 + .rev = OMAP_TIMER_IP_VERSION_1,

You are using this macro here and defined the same in v5-6-12*
This will break build. Define this macro in the same patch.

 +};
 +
 +/* timer1 */
 +static struct omap_hwmod omap2420_timer1_hwmod;
 +static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = {
 + { .irq = INT_24XX_GPTIMER1, },

For a given platform, irq numbers are constants. You can replace this
assignment as:

{.irq = xx, }, /* INT_24XX_GPTIMER1 */

GPIO has followed the same convention. I2C and UART needs cleanup for
this.


 +};
 +
 +static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
 + {
 + .pa_start   = 0x48028000,
 + .pa_end = 0x48028000 + SZ_1K - 1,
 + .flags  = ADDR_TYPE_RT
 + },
 +};
 +
 +/* l4_wkup - timer1 */
 +static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
 + .master = omap2420_l4_wkup_hwmod,
 + .slave  = omap2420_timer1_hwmod,
 + .clk= gpt1_ick,
 + .addr   = omap2420_timer1_addrs,
 + .addr_cnt   = ARRAY_SIZE(omap2420_timer1_addrs),
 + .user   = OCP_USER_MPU | OCP_USER_SDMA,
 +};
 +
 +/* timer1 slave port */
 +static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
 + omap2420_l4_wkup__timer1,
 +};
 +
 +/* timer1 hwmod */
 +static struct omap_hwmod omap2420_timer1_hwmod = {
 + .name   = timer1,
 + .mpu_irqs   = omap2420_timer1_mpu_irqs,
 + .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer1_mpu_irqs),
 + .main_clk   = gpt1_fck,
 + .prcm   = {
 + .omap2 = {
 + .prcm_reg_id = 1,
 + .module_bit = OMAP24XX_EN_GPT1_SHIFT,
 + .module_offs = WKUP_MOD,
 + .idlest_reg_id = 1,
 + .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
 + },
 + },
 + .slaves = omap2420_timer1_slaves,
 + .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
 + .class  = omap2420_timer_hwmod_class,
 + .omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 +};
 +
 +/* timer2 */
 +static struct omap_hwmod omap2420_timer2_hwmod;
 +static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
 + { .irq = INT_24XX_GPTIMER2, },
 +};
 +
 +static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = {
 + {
 + .pa_start   = 0x4802a000,
 + .pa_end = 0x4802a000 + SZ_1K - 1,
 + .flags  = ADDR_TYPE_RT
 + },
 +};
 +
 +/* l4_core - timer2 */
 +static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
 + .master = omap2420_l4_core_hwmod,
 + .slave  = omap2420_timer2_hwmod,
 + .clk= gpt2_ick,
 + .addr   = omap2420_timer2_addrs,
 + .addr_cnt   = ARRAY_SIZE(omap2420_timer2_addrs),
 + .user   = OCP_USER_MPU | OCP_USER_SDMA,
 +};
 +
 +/* timer2 slave port */
 +static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
 + omap2420_l4_core__timer2,
 +};
 +
 +/* timer2 hwmod */
 +static struct omap_hwmod omap2420_timer2_hwmod = {
 + .name   = timer2,
 + .mpu_irqs   = omap2420_timer2_mpu_irqs,
 + .mpu_irqs_cnt   = ARRAY_SIZE(omap2420_timer2_mpu_irqs),
 + .main_clk   = gpt2_fck,
 + .prcm   

Re: [PATCH v5 6/12] OMAP: dmtimer: infrastructure to support hwmod

2010-12-06 Thread G, Manjunath Kondaiah
On Tue, Dec 07, 2010 at 05:14:13AM +0530, Tarun Kanti DebBarma wrote:
 (1) Add new fields and data structures to support dmtimer conversion
 to platform driver.
 (2) Constants to identify IP revision so that Highlander IP in OMAP 4

s/OMAP 4/OMAP4

 can be distinguished.
 (3) field to identify OMAP4 abe timers.
 (4) Interface function to support early boot.
 
 Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
 Signed-off-by: Thara Gopinath th...@ti.com
 Reviewed-by: Cousson, Benoit b-cous...@ti.com
 Reviewed-by: Varadarajan, Charulatha ch...@ti.com
 ---
  arch/arm/mach-omap2/dmtimer.h |   30 
 +
  arch/arm/plat-omap/dmtimer.c  |7 ++
  arch/arm/plat-omap/include/plat/dmtimer.h |   30 
 +
  3 files changed, 67 insertions(+), 0 deletions(-)
  create mode 100644 arch/arm/mach-omap2/dmtimer.h
 
 diff --git a/arch/arm/mach-omap2/dmtimer.h b/arch/arm/mach-omap2/dmtimer.h
 new file mode 100644
 index 000..75cca6c
 --- /dev/null
 +++ b/arch/arm/mach-omap2/dmtimer.h
 @@ -0,0 +1,30 @@
 +/**
 + * OMAP Dual-Mode Timers - early initialization interface
 + *
 + * Function interface called first to start dmtimer early initialization.
 + *
 + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 + * Tarun Kanti DebBarma tarun.ka...@ti.com
 + * Thara Gopinath th...@ti.com
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 + * This program is distributed as is WITHOUT ANY WARRANTY of any
 + * kind, whether express or implied; without even the implied warranty
 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + */
 +#ifndef __ASM_ARCH_DMTIMER_H
 +#define __ASM_ARCH_DMTIMER_H
 +
 +/*
 + * dmtimer is required during early part of boot sequence even before
 + * device model and pm_runtime if fully up and running. This function
 + * provides hook to omap2_init_common_hw() which is triggered from
 + * start_kernel()-init_irq() of kernel initialization sequence.
 + */
 +void __init omap2_dm_timer_early_init(void);
 +
 +#endif
 diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
 index 1d706cf..7fdf107 100644
 --- a/arch/arm/plat-omap/dmtimer.c
 +++ b/arch/arm/plat-omap/dmtimer.c
 @@ -3,6 +3,12 @@
   *
   * OMAP Dual-Mode Timers
   *
 + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 + * Tarun Kanti DebBarma tarun.ka...@ti.com
 + * Thara Gopinath th...@ti.com
 + *
 + * dmtimer adaptation to platform_driver.
 + *
   * Copyright (C) 2005 Nokia Corporation
   * OMAP2 support by Juha Yrjola
   * API improvements and OMAP2 clock framework support by Timo Teras
 @@ -160,6 +166,7 @@ struct omap_dm_timer {
   unsigned reserved:1;
   unsigned enabled:1;
   unsigned posted:1;
 + struct platform_device *pdev;
  };
  
  static int dm_timer_count;
 diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h 
 b/arch/arm/plat-omap/include/plat/dmtimer.h
 index dfa3aff..b90b906 100644
 --- a/arch/arm/plat-omap/include/plat/dmtimer.h
 +++ b/arch/arm/plat-omap/include/plat/dmtimer.h
 @@ -3,6 +3,12 @@
   *
   * OMAP Dual-Mode Timers
   *
 + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 + * Tarun Kanti DebBarma tarun.ka...@ti.com
 + * Thara Gopinath th...@ti.com
 + *
 + * Platform device conversion and hwmod support.
 + *
   * Copyright (C) 2005 Nokia Corporation
   * Author: Lauri Leukkunen lauri.leukku...@nokia.com
   * PWM and clock framwork support by Timo Teras.
 @@ -29,6 +35,8 @@
  #ifndef __ASM_ARCH_DMTIMER_H
  #define __ASM_ARCH_DMTIMER_H
  
 +#include linux/platform_device.h
 +
  /* clock sources */
  #define OMAP_TIMER_SRC_SYS_CLK   0x00
  #define OMAP_TIMER_SRC_32_KHZ0x01
 @@ -44,11 +52,33 @@
  #define OMAP_TIMER_TRIGGER_OVERFLOW  0x01
  #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE  0x02
  
 +/*
 + * IP revision identifier so that Highlander IP
 + * in OMAP 4 can be distinguished.
 + */
 +#define OMAP_TIMER_IP_VERSION_1  0x1
 +#define OMAP_TIMER_IP_VERSION_2  0x2

As mentioned in earlier patches, introduce these defines where you are
using.

 +
 +/*
 + * OMAP 4 IP revision has different register offsets

s/OMAP 4/OMAP4/gc

-Manjunath
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Re: [PATCH v2] musb: am35x: fix compile error due to control apis

2010-12-06 Thread Sergei Shtylyov

Hello.

Gupta, Ajay Kumar wrote:


As the control.h have been moved to new location and it's
uses are not allowed to drivers directly so moving the phy
control, interrupt clear and reset functionality to board
files.



I'm not fond of the whole approach. I'm not sure why accesses to the
control registers are such a no-no, taking into account that one needs to
access such regisyter to clear the interrupt...



I think Tony is the right person to answer this :)


   Yeah, I thought he must be reading linux-omap...


Signed-off-by: Ajay Kumar Guptaajay.gu...@ti.com

[...]



diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c



[...]



+   regval= ~AM35XX_USBOTGSS_SW_RST;
+   omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+
+   regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);

Why read it and ignore the result?



This is due to recommendation for OMAPs as discussed at below
Link,
http://markmail.org/message/s3lp7xlyq7zxnjtc#query:+page:1+mid:kfia4ld4xgzek6kq+state:results


   There is recommendation to read back the interrupt status register, which 
this register isn't. Anyway, a comment wouldn't hurt...



Thanks,
Ajay


WBR, Sergei
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Re: State of LDP3430 platform

2010-12-06 Thread Russell King - ARM Linux
On Mon, Dec 06, 2010 at 07:59:59AM -0800, Tony Lindgren wrote:
 * Russell King - ARM Linux li...@arm.linux.org.uk [101206 04:45]:
 
  [ cut here ]
  WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 
  _omap_hwmod_enable+0x34/0x114()
  omap_hwmod: wd_timer2: enabled state can only be entered from initialized, 
  idle, or disabled state
  Modules linked in:
  ---[ end trace 1b75b31a2719ed1c ]---
  wd_timer2: Could not enable clocks for omap2_disable_wdt
 
 It seems like there's a problem handling a watchdog that's enabled
 in the bootloader.. But that's not the only problem, looks like I'm
 getting this on overo:
 
 omap_device: omap_wdt.-1: new worst case activate latency 0: 122070
 OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
 omap_device: omap_wdt.-1: new worst case deactivate latency 0: 30517
 twl4030_wdt twl4030_wdt: Failed to register misc device
 twl4030_wdt: probe of twl4030_wdt failed with error -16

-16 = -EBUSY, which is probably because you have two watchdogs.  The
watchdog subsystem has one minor device number, so you can only have
one watchdog registered.
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[PATCH v2 0/3] ARM: omap: Thumb-2 kernel compatibility fixes

2010-12-06 Thread Dave Martin
These patches enable the omap kernel to build and work in
Thumb-2 (CONFIG_THUMB2_KERNEL).

They may make useful reading for all low-level BSP maintainers,
since in general similar issues tend to crop up whenever migrating
code to support Thumb-2.

Tested on: omap3 (Beagle xM A2)
Not tested on any other platforms yet.

Dave Martin (3):
  ARM: omap: Enable low-level omap3 PM code to work with
CONFIG_THUMB2_KERNEL
  ARM: omap4: Correct definition of do_wfi() for CONFIG_THUMB2_KERNEL
  ARM: omap4: Convert END() to ENDPROC() for correct linkage with
CONFIG_THUMB2_KERNEL

 arch/arm/mach-omap2/include/mach/omap4-common.h |5 +++
 arch/arm/mach-omap2/omap-headsmp.S  |2 +-
 arch/arm/mach-omap2/omap44xx-smc.S  |8 ++--
 arch/arm/mach-omap2/pm.h|2 +
 arch/arm/mach-omap2/pm34xx.c|   13 ++--
 arch/arm/mach-omap2/sleep34xx.S |   37 +--
 arch/arm/mach-omap2/sram34xx.S  |   34 +++-
 arch/arm/plat-omap/include/plat/sram.h  |1 +
 arch/arm/plat-omap/sram.c   |   10 +-
 9 files changed, 90 insertions(+), 22 deletions(-)

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[PATCH v2 3/3] ARM: omap4: Convert END() to ENDPROC() for correct linkage with CONFIG_THUMB2_KERNEL

2010-12-06 Thread Dave Martin
almost all code for v7+ platforms) is deprecated/incorrect.

ENDPROC() tags the affected symbol as a function symbol, which will
ensure that link-time fixups don't accidentally switch to the
wrong instruction set.

omap_secondary_startup might still need to be changed to ARM,
depending on the compatibility status of bootloaders.

Signed-off-by: Dave Martin dave.mar...@linaro.org
---
KernelVersion: 2.6.37-rc4

 arch/arm/mach-omap2/omap-headsmp.S |2 +-
 arch/arm/mach-omap2/omap44xx-smc.S |8 
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/omap-headsmp.S 
b/arch/arm/mach-omap2/omap-headsmp.S
index 6ae937a..4ee6aec 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -45,5 +45,5 @@ hold: ldr r12,=0x103
 * should now contain the SVC stack for this core
 */
b   secondary_startup
-END(omap_secondary_startup)
+ENDPROC(omap_secondary_startup)
 
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S 
b/arch/arm/mach-omap2/omap44xx-smc.S
index 1980dc3..e69d37d 100644
--- a/arch/arm/mach-omap2/omap44xx-smc.S
+++ b/arch/arm/mach-omap2/omap44xx-smc.S
@@ -29,7 +29,7 @@ ENTRY(omap_smc1)
dsb
smc #0
ldmfd   sp!, {r2-r12, pc}
-END(omap_smc1)
+ENDPROC(omap_smc1)
 
 ENTRY(omap_modify_auxcoreboot0)
stmfd   sp!, {r1-r12, lr}
@@ -37,7 +37,7 @@ ENTRY(omap_modify_auxcoreboot0)
dsb
smc #0
ldmfd   sp!, {r1-r12, pc}
-END(omap_modify_auxcoreboot0)
+ENDPROC(omap_modify_auxcoreboot0)
 
 ENTRY(omap_auxcoreboot_addr)
stmfd   sp!, {r2-r12, lr}
@@ -45,7 +45,7 @@ ENTRY(omap_auxcoreboot_addr)
dsb
smc #0
ldmfd   sp!, {r2-r12, pc}
-END(omap_auxcoreboot_addr)
+ENDPROC(omap_auxcoreboot_addr)
 
 ENTRY(omap_read_auxcoreboot0)
stmfd   sp!, {r2-r12, lr}
@@ -54,4 +54,4 @@ ENTRY(omap_read_auxcoreboot0)
smc #0
mov r0, r0, lsr #9
ldmfd   sp!, {r2-r12, pc}
-END(omap_read_auxcoreboot0)
+ENDPROC(omap_read_auxcoreboot0)
-- 
1.7.1

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[PATCH v2 2/3] ARM: omap4: Correct definition of do_wfi() for CONFIG_THUMB2_KERNEL

2010-12-06 Thread Dave Martin
For the Thumb-2 case, the wfi mnemonic is used, since in this
case the tools will necessarily be new enough to support it.

Signed-off-by: Dave Martin dave.mar...@linaro.org
---
KernelVersion: 2.6.37-rc4

 arch/arm/mach-omap2/include/mach/omap4-common.h |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h 
b/arch/arm/mach-omap2/include/mach/omap4-common.h
index 2744dfe..c6b1320 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -17,8 +17,13 @@
  * wfi used in low power code. Directly opcode is used instead
  * of instruction to avoid mulit-omap build break
  */
+#ifdef CONFIG_THUMB2_KERNEL
+#define do_wfi()   \
+   __asm__ __volatile__ (wfi : : : memory)
+#else
 #define do_wfi()   \
__asm__ __volatile__ (.word0xe320f003 : : : memory)
+#endif
 
 #ifdef CONFIG_CACHE_L2X0
 extern void __iomem *l2cache_base;
-- 
1.7.1

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[PATCH v2 1/3] ARM: omap: Enable low-level omap3 PM code to work with CONFIG_THUMB2_KERNEL

2010-12-06 Thread Dave Martin
sleep34xx.S, sram34xx.S:

  * Added ENDPROC() directives for all exported function symbols.
Without these, exported function symbols are not correctly
identified as Thumb by the linker, causing incorrect linkage.
This is needed to avoid some calls to the functions ending up
with the CPU in the wrong instruction set.

  * Added .align directives where needed to ensure that .word won't
be misaligned.  (Note that ENTRY() implies .align; no extra
.align has been added for these cases.)

  * Exported new base address symbols for functions which get
copied to sram by code outside sleep34xx.S (applies to
save_secure_ram_context and omap32xx_cpu_suspend), and fix up
the relevant address arithmetic so that these will be copied
and called correctly by the Thumb code in the rest of the
kernel.

  * Explicitly build a few parts of sleep34xx.S as ARM.

  * lock_scratchpad_sem is kept as ARM because of the need to
synchronise with hardware (?) using the SWP instruction.

  * save_secure_ram_context and omap34xx_cpu_suspend are built
as ARM in case the Secure World firmware expects to decode
the comment field from the SMC (aka smi) instructions.

This can be undone later if the firmware is confirmed as
able to decode the Thumb SMC encoding (or ignores the
comment field).

  * es3_sdrc_fix should presumably only be called from the
low-level wakeup code.  To minimise the diff, switched this
to ARM and demoted it to be a local symbol, since I believe
it shouldn't be called from outside anyway.

 To prevent future maintainence problems, it would probably be
 a good idea to demote _all_ functions which aren't called
 externally to local.  (i.e., everything except for
 get_es3_restore_pointer, get_restore_pointer,
 omap34xx_cpu_suspend and save_secure_ram_context).

 For now, I've left these as-is to minimise disruption.

   * Use a separate base register instead of PC-relative stores in
 sram34xx.S.  This isn't permitted in Thumb-2, but at least
 some versions of gas will silently output non-working code,
 leading to unpredictable run-time behaviour.

pm34xx.c, pm.h, sram.c, sram.h:

  * Resolve some memory addressing issues where a function symbol's
value is assumed to be equal to the start address of the
function body for the purpose of copying some low-level code
from sleep34xx.S to SRAM.

This assumption breaks for Thumb, since Thumb functions symbols
have bit 0 set to indicate the Thumb-ness.  This would result
in a non-working, off-by-one copy of the function body.

Tested on Beagle xM A2:
  * CONFIG_THUMB2_KERNEL  !CONFIG_SMP_ON_UP
  * CONFIG_THUMB2_KERNEL  CONFIG_SMP_ON_UP
  * !CONFIG_THUMB2_KERNEL  !CONFIG_SMP_ON_UP
  * !CONFIG_THUMB2_KERNEL  CONFIG_SMP_ON_UP

Signed-off-by: Dave Martin dave.mar...@linaro.org
---
KernelVersion: 2.6.37-rc4

 arch/arm/mach-omap2/pm.h   |2 +
 arch/arm/mach-omap2/pm34xx.c   |   13 --
 arch/arm/mach-omap2/sleep34xx.S|   37 +--
 arch/arm/mach-omap2/sram34xx.S |   34 +---
 arch/arm/plat-omap/include/plat/sram.h |1 +
 arch/arm/plat-omap/sram.c  |   10 +++-
 6 files changed, 80 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 0d75bfd..c333bfd 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -80,7 +80,9 @@ extern void save_secure_ram_context(u32 *addr);
 extern void omap3_save_scratchpad_contents(void);
 
 extern unsigned int omap24xx_idle_loop_suspend_sz;
+extern char *const omap34xx_cpu_suspend_base;
 extern unsigned int omap34xx_suspend_sz;
+extern char *const save_secure_ram_context_base;
 extern unsigned int save_secure_ram_context_sz;
 extern unsigned int omap24xx_cpu_suspend_sz;
 extern unsigned int omap34xx_cpu_suspend_sz;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0ec8a04..93f0ee8 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -982,11 +982,18 @@ static int __init clkdms_setup(struct clockdomain *clkdm, 
void *unused)
 
 void omap_push_sram_idle(void)
 {
-   _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend,
+   _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend_base,
omap34xx_cpu_suspend_sz);
-   if (omap_type() != OMAP2_DEVICE_TYPE_GP)
-   _omap_save_secure_sram = omap_sram_push(save_secure_ram_context,
+   _omap_sram_idle += (char *)omap34xx_cpu_suspend -
+   omap34xx_cpu_suspend_base;
+
+   if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
+   _omap_save_secure_sram = omap_sram_push(
+   save_secure_ram_context_base,
save_secure_ram_context_sz);
+   

Re: [PATCH 1/2] ARM: implement support for read-mostly sections

2010-12-06 Thread Catalin Marinas
On 5 December 2010 23:04, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
 On Sun, Dec 05, 2010 at 10:18:27PM +, Catalin Marinas wrote:
 On 5 December 2010 11:43, Russell King - ARM Linux
 li...@arm.linux.org.uk wrote:
  diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
  index cead889..1581f6d 100644
  --- a/arch/arm/kernel/vmlinux.lds.S
  +++ b/arch/arm/kernel/vmlinux.lds.S
  @@ -167,6 +167,7 @@ SECTIONS
 
                 NOSAVE_DATA
                 CACHELINE_ALIGNED_DATA(32)
  +               READ_MOSTLY_DATA(32)

 Should we change the alignments to 64?

 When we have some way to tell vmlinux.lds.S what the cache line size is.

I haven't tried but can we not use CONFIG_ARM_L1_CACHE_SHIFT?

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Re: [PATCH v2] musb: am35x: fix compile error due to control apis

2010-12-06 Thread Tony Lindgren
* Sergei Shtylyov sshtyl...@mvista.com [101206 09:04]:
 Hello.
 
 Gupta, Ajay Kumar wrote:
 
 As the control.h have been moved to new location and it's
 uses are not allowed to drivers directly so moving the phy
 control, interrupt clear and reset functionality to board
 files.
 
 I'm not fond of the whole approach. I'm not sure why accesses to the
 control registers are such a no-no, taking into account that one needs to
 access such regisyter to clear the interrupt...

Because drivers should arch independent and any tinkering of the
platform level registers will lead into pains later on that
I end up having to deal with.

To me it seem you just init to separate out the transceiver,
right?
 
 I think Tony is the right person to answer this :)
 
Yeah, I thought he must be reading linux-omap...

I do yeah.. Might take a while to respond sometimes though :)

Tony
 
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Re: [PATCH v5 7/12] OMAP1: dmtimer: conversion to platform devices

2010-12-06 Thread G, Manjunath Kondaiah
On Tue, Dec 07, 2010 at 05:14:14AM +0530, Tarun Kanti DebBarma wrote:
 From: Thara Gopinath th...@ti.com
 
 Convert OMAP1 dmtimers into a platform devices and then registers with
 device model framework so that it can be bound to corresponding driver.
 
 Signed-off-by: Thara Gopinath th...@ti.com
 Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
 Reviewed-by: Cousson, Benoit b-cous...@ti.com
 Reviewed-by: Varadarajan, Charulatha ch...@ti.com
 ---
  arch/arm/mach-omap1/Makefile  |2 +-
  arch/arm/mach-omap1/dmtimer.c |  172 
 +
  arch/arm/plat-omap/dmtimer.c  |   46 +---
  3 files changed, 175 insertions(+), 45 deletions(-)
  create mode 100644 arch/arm/mach-omap1/dmtimer.c
 
 diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
 index 9a304d8..0001659 100644
 --- a/arch/arm/mach-omap1/Makefile
 +++ b/arch/arm/mach-omap1/Makefile
 @@ -4,7 +4,7 @@
  
  # Common support
  obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o
 -obj-y += clock.o clock_data.o opp_data.o
 +obj-y += clock.o clock_data.o opp_data.o dmtimer.o
  
  obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
  
 diff --git a/arch/arm/mach-omap1/dmtimer.c b/arch/arm/mach-omap1/dmtimer.c
 new file mode 100644
 index 000..2c42432
 --- /dev/null
 +++ b/arch/arm/mach-omap1/dmtimer.c
 @@ -0,0 +1,172 @@
 +/**
 + * OMAP1 Dual-Mode Timers - platform device registration
 + *
 + * Contains first level initialization routines which internally
 + * generates timer device information and registers with linux
 + * device model. It also has low level function to chnage the timer
 + * input clock source.
 + *
 + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 + * Tarun Kanti DebBarma tarun.ka...@ti.com
 + * Thara Gopinath th...@ti.com
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 + * This program is distributed as is WITHOUT ANY WARRANTY of any
 + * kind, whether express or implied; without even the implied warranty
 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + */
 +
 +#include linux/clk.h
 +#include linux/io.h
 +#include linux/err.h
 +#include linux/slab.h
 +#include mach/irqs.h
 +#include plat/dmtimer.h
 +#include plat/omap_device.h
 +
 +#define OMAP1610_GPTIMER1_BASE   0xfffb1400
 +#define OMAP1610_GPTIMER2_BASE   0xfffb1c00
 +#define OMAP1610_GPTIMER3_BASE   0xfffb2400
 +#define OMAP1610_GPTIMER4_BASE   0xfffb2c00
 +#define OMAP1610_GPTIMER5_BASE   0xfffb3400
 +#define OMAP1610_GPTIMER6_BASE   0xfffb3c00
 +#define OMAP1610_GPTIMER7_BASE   0xfffb7400
 +#define OMAP1610_GPTIMER8_BASE   0xfffbd400
 +
 +#define OMAP1_DM_TIMER_COUNT 8
 +
 +static int omap1_dm_timer_set_src(struct platform_device *pdev,
 + int source)
 +{
 + int n = (pdev-id)  1;
 + u32 l;
 +
 + l = omap_readl(MOD_CONF_CTRL_1)  ~(0x03  n);
 + l |= source  n;
 + omap_writel(l, MOD_CONF_CTRL_1);
 +
 + return 0;
 +}
 +
 +int __init omap1_dm_timer_device_init(void)
 +{
 + int i;
 + int ret;
 + struct dmtimer_platform_data *pdata;
 + struct platform_device *pdev;
 +
 + pr_debug(%s: +\n, __func__);
 +
 + if (!cpu_is_omap16xx())
 + return 0;

Wondering how it is handled for other omap1's

/*
 * Macros to group OMAP into cpu classes.
 * These can be used in most places.
 * cpu_is_omap7xx():True for OMAP730, OMAP850
 * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
 * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
...

 +
 + for (i = 1; i = OMAP1_DM_TIMER_COUNT; i++) {
 + struct resource res[2];
 + u32 base, irq;
 +
 + switch (i) {
 + case 1:
 + base = OMAP1610_GPTIMER1_BASE;
 + irq = INT_1610_GPTIMER1;
 + break;
 + case 2:
 + base = OMAP1610_GPTIMER2_BASE;
 + irq = INT_1610_GPTIMER2;
 + break;
 + case 3:
 + base = OMAP1610_GPTIMER3_BASE;
 + irq = INT_1610_GPTIMER3;
 + break;
 + case 4:
 + base = OMAP1610_GPTIMER4_BASE;
 + irq = INT_1610_GPTIMER4;
 + break;
 + case 5:
 + base = OMAP1610_GPTIMER5_BASE;
 + irq = INT_1610_GPTIMER5;
 + break;
 + case 6:
 + base = OMAP1610_GPTIMER6_BASE;
 + irq = INT_1610_GPTIMER6;
 + break;
 + case 7:
 + base = 

Re: UbiFS + HWECC(?) + BeagleBoard = fail

2010-12-06 Thread Luca Ceresoli
On Mon, 8 Nov 2010 13:08:44 +0200, Grazvydas Ignotas wrote:
On Sun, Nov 7, 2010 at 9:40 AM, [AvataR] public.ava...@x wrote:
 Hi. After moving to upstream 2.6.3{5,6,7} kernels, i forced to use jffs2
 instead of ubifs, because of lot CRC errors. If i use prefetch/dma, i
 can attach to ubi, make volume, write data, reboot - and got lots of CRC
 errors. Without prefetch i just couldn't do anything to ubi.

 Looks like hw/sw bug in ubi

Looks like Sukumar's recent changes broke subpage reads that are
needed for UBI to operate. You can try commenting out #define
CONFIG_MTD_NAND_OMAP_HWECC in drivers/mtd/nand/omap2.c and disabling
MTD_NAND_OMAP_PREFETCH, with that it mostly works for me but sometimes
spits out ECC error or two.

I think this is the same bug reported back in august in
http://www.spinics.net/lists/linux-omap/msg34452.html, right?

I've been hit by this as well, and it seems to be still there, at least in

commit afd2d11e00520b7440003987be2ee4aab7c32901
Merge: 7fd1cff 734b4c7
Author: Tony Lindgren t...@atomide.com
Date:   Wed Dec 1 13:56:37 2010 -0800

Merge branch 'devel-gpio'

While I thank you for you proposed solution, I see it does not work here.
In fact I commented the #define CONFIG_MTD_NAND_OMAP_HWECC and left
MTD_NAND_OMAP_PREFETCH disabled as it previously was, and got compilation
errors:

drivers/mtd/nand/omap2.c:1: warning: data definition has no type or storage 
class
drivers/mtd/nand/omap2.c:1: warning: type defaults to 'int' in declaration of 
'B1'
drivers/mtd/nand/omap2.c:1: error: expected identifier or '(' before numeric 
constant
drivers/mtd/nand/omap2.c:1:9: error: invalid suffix c on integer constant
drivers/mtd/nand/omap2.c:1: error: expected identifier or '(' before numeric 
constant

As it looks to me like a very serious and very ancient bug, I wonder if I
missed something.

Or is any patch around to fix this?

Any pointer would be greatly appreciated.

Thanks,
Luca Ceresoli



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Re: State of LDP3430 platform

2010-12-06 Thread Tony Lindgren
* Russell King - ARM Linux li...@arm.linux.org.uk [101206 09:12]:
 On Mon, Dec 06, 2010 at 07:59:59AM -0800, Tony Lindgren wrote:
  * Russell King - ARM Linux li...@arm.linux.org.uk [101206 04:45]:
  
   [ cut here ]
   WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 
   _omap_hwmod_enable+0x34/0x114()
   omap_hwmod: wd_timer2: enabled state can only be entered from 
   initialized, idle, or disabled state
   Modules linked in:
   ---[ end trace 1b75b31a2719ed1c ]---
   wd_timer2: Could not enable clocks for omap2_disable_wdt
  
  It seems like there's a problem handling a watchdog that's enabled
  in the bootloader.. But that's not the only problem, looks like I'm
  getting this on overo:
  
  omap_device: omap_wdt.-1: new worst case activate latency 0: 122070
  OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
  omap_device: omap_wdt.-1: new worst case deactivate latency 0: 30517
  twl4030_wdt twl4030_wdt: Failed to register misc device
  twl4030_wdt: probe of twl4030_wdt failed with error -16
 
 -16 = -EBUSY, which is probably because you have two watchdogs.  The
 watchdog subsystem has one minor device number, so you can only have
 one watchdog registered.

Yeah that's it. Looks like omap2plus_defconfig has:

CONFIG_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_TWL4030_WATCHDOG=y

Any external watchdog(s) should be set up to be secondary watchdogs
kicked by the omap watchdog as discussed earlier.

Regards,

Tony
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Re: [PATCH v2 1/3] ARM: omap: Enable low-level omap3 PM code to work with CONFIG_THUMB2_KERNEL

2010-12-06 Thread Catalin Marinas
On 6 December 2010 17:35, Dave Martin dave.mar...@linaro.org wrote:
  * Explicitly build a few parts of sleep34xx.S as ARM.

      * lock_scratchpad_sem is kept as ARM because of the need to
        synchronise with hardware (?) using the SWP instruction.

      * save_secure_ram_context and omap34xx_cpu_suspend are built
        as ARM in case the Secure World firmware expects to decode
        the comment field from the SMC (aka smi) instructions.

        This can be undone later if the firmware is confirmed as
        able to decode the Thumb SMC encoding (or ignores the
        comment field).

      * es3_sdrc_fix should presumably only be called from the
        low-level wakeup code.  To minimise the diff, switched this
        to ARM and demoted it to be a local symbol, since I believe
        it shouldn't be called from outside anyway.

I haven't checked the code but does this always work? The kernel isn't
built with interworking enabled, so it's either ARM or Thumb-2.

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Re: State of LDP3430 platform

2010-12-06 Thread Tony Lindgren
* Russell King - ARM Linux li...@arm.linux.org.uk [101206 04:45]:

 NET: Registered protocol family 16
 [ cut here ]
 WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 
 _omap_hwmod_enable+0x34/0x114()
 omap_hwmod: wd_timer2: enabled state can only be entered from initialized, 
 idle, or disabled state
 Modules linked in:
 ---[ end trace 1b75b31a2719ed1c ]---
 wd_timer2: Could not enable clocks for omap2_disable_wdt

Can you check if these patches posted by Paul earlier help?

OMAP: wd_timer: update integration code to use new hwmod change
https://patchwork.kernel.org/patch/327472/

OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
https://patchwork.kernel.org/patch/327492/

OMAP: wd_timer: remove old, dead probing code
https://patchwork.kernel.org/patch/327482/

Regards,

Tony
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Re: [PATCH v5 8/12] OMAP2+: dmtimer: convert to platform devices

2010-12-06 Thread G, Manjunath Kondaiah
On Tue, Dec 07, 2010 at 05:14:15AM +0530, Tarun Kanti DebBarma wrote:
 Add routines to converts dmtimers to platform devices. The device data
s/converts/convert
 is obtained from hwmod database of respective platform and is registered
 to device model after successful binding to driver. It also provides
 provision to access timers during early boot when pm_runtime framework
 is not completely up and running.
 
 Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
 Signed-off-by: Thara Gopinath th...@ti.com
 Reviewed-by: Cousson, Benoit b-cous...@ti.com
 Reviewed-by: Varadarajan, Charulatha ch...@ti.com
 ---
  arch/arm/mach-omap2/Makefile  |2 +-
  arch/arm/mach-omap2/dmtimer.c |  174 
 +
  2 files changed, 175 insertions(+), 1 deletions(-)
  create mode 100644 arch/arm/mach-omap2/dmtimer.c
 
 diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
 index 60e51bc..7700ccd 100644
 --- a/arch/arm/mach-omap2/Makefile
 +++ b/arch/arm/mach-omap2/Makefile
 @@ -4,7 +4,7 @@
  
  # Common support
  obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o 
 \
 -  common.o
 +  common.o dmtimer.o
  
  omap-2-3-common  = irq.o sdrc.o prm2xxx_3xxx.o
  hwmod-common = omap_hwmod.o \
 diff --git a/arch/arm/mach-omap2/dmtimer.c b/arch/arm/mach-omap2/dmtimer.c
 new file mode 100644
 index 000..b639082
 --- /dev/null
 +++ b/arch/arm/mach-omap2/dmtimer.c
 @@ -0,0 +1,174 @@
 +/**
 + * OMAP2PLUS Dual-Mode Timers - platform device registration
 + *
 + * Contains first level initialization routines which extracts timers
 + * information from hwmod database and registers with linux device model.
 + * It also has low level function to change the timer input clock source.
 + *
 + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 + * Tarun Kanti DebBarma tarun.ka...@ti.com
 + * Thara Gopinath th...@ti.com
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 + * This program is distributed as is WITHOUT ANY WARRANTY of any
 + * kind, whether express or implied; without even the implied warranty
 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + */
 +
 +#include linux/clk.h
 +#include linux/io.h
not required
 +#include linux/err.h
 +#include linux/slab.h
 +
 +#include plat/dmtimer.h
 +#include plat/omap_hwmod.h
not required
 +#include plat/omap_device.h
 +
 +static int early_timer_count __initdata = 1;
 +
 +/**
 + * omap2_dm_timer_set_src - change the timer input clock source
 + * @pdev:timer platform device pointer
 + * @timer_clk:   current clock source
 + * @source:  array index of parent clock source
 + */
 +static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
 +{
 + int ret;
 + struct dmtimer_platform_data *pdata = pdev-dev.platform_data;
 + struct clk *fclk = clk_get(pdev-dev, fck);
 + struct clk *new_fclk;
 + char *fclk_name = 32k_ck; /* default name */
 +
 + switch (source) {
 + case OMAP_TIMER_SRC_SYS_CLK:
 + fclk_name = sys_ck;
 + break;
 +
 + case OMAP_TIMER_SRC_32_KHZ:
 + fclk_name = 32k_ck;
 + break;
 +
 + case OMAP_TIMER_SRC_EXT_CLK:
 + if (pdata-timer_ip_type == OMAP_TIMER_IP_VERSION_1) {
 + fclk_name = alt_ck;
 + break;
 + }
 + dev_dbg(pdev-dev, %s: %d: invalid clk src.\n,
 + __func__, __LINE__);
 + return -EINVAL;
 + }
 +
 + if (IS_ERR_OR_NULL(fclk)) {
 + dev_dbg(pdev-dev, %s: %d: clk_get() FAILED\n,
 + __func__, __LINE__);
 + return -EINVAL;
 + }
 +
 + new_fclk = clk_get(pdev-dev, fclk_name);
 + if (IS_ERR_OR_NULL(new_fclk)) {
 + dev_dbg(pdev-dev, %s: %d: clk_get() %s FAILED\n,
 + __func__, __LINE__, fclk_name);
 + clk_put(fclk);
 + return -EINVAL;
 + }
 +
 + ret = clk_set_parent(fclk, new_fclk);
 + if (IS_ERR_VALUE(ret)) {
 + dev_dbg(pdev-dev, %s: clk_set_parent() to %s FAILED\n,
 + __func__, fclk_name);
 + ret = -EINVAL;
 + }
 +
 + clk_put(new_fclk);
 + clk_put(fclk);
 +
 + return ret;
 +}
 +
 +struct omap_device_pm_latency omap2_dmtimer_latency[] = {
 + {
 + .deactivate_func = omap_device_idle_hwmods,
 + .activate_func   = omap_device_enable_hwmods,
 + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
 + },
 +};
 +
 +/**
 + * omap_timer_init - build and register timer device with an
 + * associated timer hwmod
 + * @oh:  timer hwmod pointer to be used to build timer device
 + * @user: 

Re: State of LDP3430 platform

2010-12-06 Thread Paul Walmsley
On Mon, 6 Dec 2010, Tony Lindgren wrote:

 * Russell King - ARM Linux li...@arm.linux.org.uk [101206 04:45]:
 
  NET: Registered protocol family 16
  [ cut here ]
  WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 
  _omap_hwmod_enable+0x34/0x114()
  omap_hwmod: wd_timer2: enabled state can only be entered from initialized, 
  idle, or disabled state
  Modules linked in:
  ---[ end trace 1b75b31a2719ed1c ]---
  wd_timer2: Could not enable clocks for omap2_disable_wdt
 
 Can you check if these patches posted by Paul earlier help?
 
 OMAP: wd_timer: update integration code to use new hwmod change
 https://patchwork.kernel.org/patch/327472/
 
 OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
 https://patchwork.kernel.org/patch/327492/
 
 OMAP: wd_timer: remove old, dead probing code
 https://patchwork.kernel.org/patch/327482/

Just FYI, those will need this series (OMAP2+: hwmod core upgrades 
for 2.6.38: first set) applied first:

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38632.html


- Paul
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Re: [PATCH v2 1/3] ARM: omap: Enable low-level omap3 PM code to work with CONFIG_THUMB2_KERNEL

2010-12-06 Thread Dave Martin
Hi,

On Mon, Dec 6, 2010 at 6:17 PM, Catalin Marinas catalin.mari...@arm.com wrote:
 On 6 December 2010 17:35, Dave Martin dave.mar...@linaro.org wrote:
  * Explicitly build a few parts of sleep34xx.S as ARM.

      * lock_scratchpad_sem is kept as ARM because of the need to
        synchronise with hardware (?) using the SWP instruction.

      * save_secure_ram_context and omap34xx_cpu_suspend are built
        as ARM in case the Secure World firmware expects to decode
        the comment field from the SMC (aka smi) instructions.

        This can be undone later if the firmware is confirmed as
        able to decode the Thumb SMC encoding (or ignores the
        comment field).

      * es3_sdrc_fix should presumably only be called from the
        low-level wakeup code.  To minimise the diff, switched this
        to ARM and demoted it to be a local symbol, since I believe
        it shouldn't be called from outside anyway.

 I haven't checked the code but does this always work? The kernel isn't
 built with interworking enabled, so it's either ARM or Thumb-2.

Interworking is mandated by EABI, and when building for EABI there is
no such thing as non-interworking C code IIUC: i.e.,
-mno-thumb-interwork does nothing.  Certainly, calls via a function
pointer are assembled as BX instructions, and the linker fixes up
static function calls with the right instruction (BL/BX).

Provided the affected functions are only called from C code, and
providing that legacy tools/ABI aren't used, it should work.  I've
reviewed to make sure that this is the case, and the code as posted
executes correctly on Beagle xM (not including the omap4-specific
code, for which I have no board to test on).

CONFIG_THUMB2_KERNEL already depends on CONFIG_AEABI, so we should be
relatively safe on this point.  Without CONFIG_THUMB2_KERNEL,
everything is built as ARM, so we have no problem.

The two cases where we have to be careful are:

  * Where code assumes that f == base address of body of function f,
which would lead to off-by-one errors by code which tries to copy
function bodies and derive pointers to the copies, due to the setting
of bit 0 of the address to indicate Thumb.  The patch series fix the
instances of this error present in the upstream OMAP BSP, except for
instances in code specific to OMAP2 and earlier which can't usefully
be built for Thumb-2 anyway.

  * Where bootloaders / firmware may jump directly into locations in
the kernel, and assume ARM (or don't interwork correctly), or where
the firmware may implicitly decode instructions from the caller as ARM
(e.g., to examine the SMC instruction comment field).  The most
straightforward way to avoid such problems is to make all such entry
points ARM.  But we could get rid of that if the platform maintainers
believe it's safe.


I did experiment with sticking with pure ARM in the low-level
assembler, with explicit veneers to switch instruction set, but that
gets rather messy and shouldn't really be necessary.  I suspect it
would be harder to maintain also.

Pure Thumb on the other hand is unlikely to be possible in every case:
the OMAP BSP uses SWP, and I've conservatively made the assumption
that bootloaders / firmware may assume they're jumping into ARM code,
and may try to decode SMC instructions as ARM instructions -- these
may not be true in practice, but these are harder to test, and I'm not
in a position to check _every_ bootloader/firmware/kernel combination
...

Cheers
---Dave
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Re: [PATCH v5 9/12] OMAP: dmtimer: platform driver

2010-12-06 Thread G, Manjunath Kondaiah
On Tue, Dec 07, 2010 at 05:14:16AM +0530, Tarun Kanti DebBarma wrote:
 From: Thara Gopinath th...@ti.com
 
 Add dmtimer platform driver functions which include:
 (1) platform driver initialization
 (2) driver probe function
 (3) driver remove function
 
 Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
 Signed-off-by: Thara Gopinath th...@ti.com
 Reviewed-by: Cousson, Benoit b-cous...@ti.com
 Reviewed-by: Varadarajan, Charulatha ch...@ti.com
 ---
  arch/arm/plat-omap/dmtimer.c |  156 
 +-
  1 files changed, 154 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
 index 9bf6ac8..ddc875b 100644
 --- a/arch/arm/plat-omap/dmtimer.c
 +++ b/arch/arm/plat-omap/dmtimer.c
 @@ -43,6 +43,8 @@
  #include linux/delay.h
  #include linux/io.h
  #include linux/module.h
 +#include linux/slab.h
 +#include linux/err.h
  #include mach/hardware.h
not required. You can cleanup
  #include plat/dmtimer.h
  #include mach/irqs.h
not required. You can cleanup
 @@ -167,6 +169,7 @@ struct omap_dm_timer {
   unsigned enabled:1;
   unsigned posted:1;
   struct platform_device *pdev;
 + struct list_head node;
  };
  
  static int dm_timer_count;
 @@ -270,7 +273,8 @@ static struct omap_dm_timer *dm_timers;
  static const char **dm_source_names;
  static struct clk **dm_source_clocks;
  
 -static spinlock_t dm_timer_lock;
 +static LIST_HEAD(omap_timer_list);
 +static DEFINE_SPINLOCK(dm_timer_lock);
  
  /*
   * Reads timer registers in posted and non-posted mode. The posted mode bit
 @@ -702,6 +706,155 @@ int omap_dm_timers_active(void)
  }
  EXPORT_SYMBOL_GPL(omap_dm_timers_active);
  
 +/**
 + * omap_dm_timer_probe - probe function called for every registered device
 + * @pdev:pointer to current timer platform device
 + *
 + * Called by driver framework at the end of device registration for all
 + * timer devices.
 + */
 +static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
 +{
 + int ret;
 + unsigned long flags;
 + struct omap_dm_timer *timer;
 + struct resource *mem, *irq, *ioarea;
 + struct dmtimer_platform_data *pdata = pdev-dev.platform_data;
 +
 + dev_dbg(pdev-dev, %s: +\n, __func__);
 +
 + if (!pdata) {
 + dev_err(pdev-dev, %s: no platform data\n, __func__);
 + return -ENODEV;
 + }
 +
 + spin_lock_irqsave(dm_timer_lock, flags);
 + list_for_each_entry(timer, omap_timer_list, node)
 + if (timer-pdev-id == pdev-id) {
 + timer-pdev = pdev;
 + spin_unlock_irqrestore(dm_timer_lock, flags);
 + return 0;
 + }
 + spin_unlock_irqrestore(dm_timer_lock, flags);
 +
 + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 + if (unlikely(!irq)) {
 + dev_err(pdev-dev, %s: no IRQ resource\n, __func__);
 + ret = -ENODEV;
 + goto err_free_pdev;
 + }
 +
 + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 + if (unlikely(!mem)) {
 + dev_err(pdev-dev, %s: no memory resource\n, __func__);
 + ret = -ENODEV;
 + goto err_free_pdev;
 + }
 +
 + ioarea = request_mem_region(mem-start, resource_size(mem),
 + pdev-name);
 + if (!ioarea) {
 + dev_err(pdev-dev, %s: region already claimed\n, __func__);
 + ret = -EBUSY;
 + goto err_free_pdev;
 + }
 +
 + timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
 + if (!timer) {
 + dev_err(pdev-dev, %s: no memory for omap_dm_timer\n,
 + __func__);
 + ret = -ENOMEM;
 + goto err_release_ioregion;
 + }
 +
 + timer-io_base = ioremap(mem-start, resource_size(mem));
 + if (!timer-io_base) {
 + dev_err(pdev-dev, %s: ioremap failed\n, __func__);
 + ret = -ENOMEM;
 + goto err_free_mem;
 + }
 +
 + timer-irq = irq-start;
 + timer-pdev = pdev;
 + timer-reserved = 0;
 +
 + /* add the timer element to the list */
 + spin_lock_irqsave(dm_timer_lock, flags);
 + list_add_tail(timer-node, omap_timer_list);
 + spin_unlock_irqrestore(dm_timer_lock, flags);
 +
 + dev_dbg(pdev-dev,  bound to its driver\n);
 +
 + return 0;
 +
 +err_free_mem:
 + kfree(timer);
 +
 +err_release_ioregion:
 + release_mem_region(mem-start, resource_size(mem));
 +
 +err_free_pdev:
You can also free pdata?
 + platform_device_del(pdev);
 +
 + return ret;
 +}
 +
 +/**
 + * omap_dm_timer_remove - cleanup a registered timer device
 + * @pdev:pointer to current timer platform device
 + *
 + * Called by driver framework whenever a timer device is unregistered.
 + * In addition to freeing platform resources it also deletes the timer
 + * entry from the local list.
 + */
 +static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
 +{
 +  

Re: [PATCH v2 2/4] arm: omap4: usb: add platform init code for EHCI

2010-12-06 Thread Tony Lindgren
* Anand Gadiyar gadi...@ti.com [101130 13:56]:
 On 12/1/2010 3:10 AM, Tony Lindgren wrote:
  * Anand Gadiyar gadi...@ti.com [101129 09:16]:
  - Add platform init code for EHCI on OMAP4
  - Add pad configuration for PHY and TLL modes
 
  Signed-off-by: Anand Gadiyar gadi...@ti.com
  
  Looks OK to me. You might want to check if all these signals
  are unique though and do not have alternate paths.
  
  Acked-by: Tony Lindgren t...@atomide.com
 
 I've checked these manually - for EHCI, all signals are unique
 and come out on exactly one pad. With OHCI though, there are
 alternates for 3 signals of one port.

OK
 
 Also, with the mux framework, it tells us if there are
 duplicates and the framework cannot identify the pad from
 the signal name alone.

Yes I posted a series of patches showing how we can pass
the board specific pin configuration to the platform init
code, so that can be done for the OHCI pins later on.

Regards,

Tony
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Re: Trouble getting Logic OMAp35x modules to boot

2010-12-06 Thread Tony Lindgren
Hi,

* Peter Barada pet...@logicpd.com [101122 22:09]:
 
 Also, where in the kernel is the mux setup for the UARTs done?  I'd
 like to use UART2 and am not sure how to wire it into the
 kernel(i.e. setup the mux for it as those pins are in mode 7) and
 want to follow the same style as that for UART1/3..

I posted some patches to pass the board specific pins to serial.c
few days ago, can you please give that series a try?

The series subject is omap: Board specific muxing using hwmod.

Regards,

Tony
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Re: [RFC/PATCH v3 5/7] ARM: OMAP3: Update Camera ISP definitions for OMAP3630

2010-12-06 Thread Tony Lindgren
* Laurent Pinchart laurent.pinch...@ideasonboard.com [101124 18:45]:
 From: Tuukka Toivonen tuukka.o.toivo...@nokia.com
 
 Add new/changed base address definitions and resources for
 OMAP3630 ISP.
 
 The OMAP3430 CSI2PHY block is same as the OMAP3630 CSIPHY2
 block. But the later name is chosen as it gives more symmetry
 to the names.
 
 Signed-off-by: Tuukka Toivonen tuukka.o.toivo...@nokia.com
 Signed-off-by: Vimarsh Zutshi vimarsh.zut...@nokia.com

This looks safe to queue along with the other camera patches
when they're ready:

Acked-by: Tony Lindgren t...@atomide.com
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Re: [RFC/PATCH v3 6/7] omap3: Export omap3isp platform device structure

2010-12-06 Thread Tony Lindgren
* Felipe Balbi ba...@ti.com [101125 03:13]:
 Hi,
 
 On Thu, Nov 25, 2010 at 12:17:59PM +0100, Laurent Pinchart wrote:
 pass platform_data as an argument to this call ? Then remove the static
 inline and export this one ?
 
 Yes indeed, why ? :-)
 
 I guess things like that are difficult to spot when you've had your nose on
 the code for too long. Thanks for the review, I'll fix this.
 
 no problem :-)

Can you please also grep to make sure there are no other EXPORT_SYMBOL
being added to arch/arm/*omap*/ code in these patches?

Thanks,

Tony
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Re: [PATCH 1/3] tsc2005 driver support on rx51

2010-12-06 Thread Tony Lindgren
* Srikar ext-srikar.1.bhavanaray...@nokia.com [101125 07:40]:
 To support  tsc2005 driver on rx51,added tsc2005
 intialization data ,functions to enable/disable
 tsc2005 and loading driver on rx51.

  #include linux/input/matrix_keypad.h
  #include linux/spi/spi.h
  #include linux/wl12xx.h
 +#include linux/spi/tsc2005.h
  #include linux/i2c.h
  #include linux/i2c/twl.h
  #include linux/clk.h

This does not exist in mainline yet, please send this patch
along with the tsc2005 driver via the input list. For this one:

Acked-by: Tony Lindgren t...@atomide.com
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Re: [PATCH V4 2/2] omap4: platform changes for CMA3000

2010-12-06 Thread Tony Lindgren
* Hemanth V heman...@ti.com [101129 02:48]:
 From 8082870cc704d901d98cf0d6af90e45860927ceb Mon Sep 17 00:00:00 2001
 From: Hemanth V heman...@ti.com
 Date: Thu, 26 Aug 2010 17:49:12 +0530
 Subject: [PATCH] Platform changes for CMA3000 Accelerometer driver
 
 Update 4430 SDP board file with platform data for accelerometer driver
 and select the driver in kconfig
 
 Signed-off-by: Hemanth V heman...@ti.com
 ---
  arch/arm/mach-omap2/Kconfig |2 ++
  arch/arm/mach-omap2/board-4430sdp.c |   30 ++
  2 files changed, 32 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
 index a928fd6..e87c049 100644
 --- a/arch/arm/mach-omap2/Kconfig
 +++ b/arch/arm/mach-omap2/Kconfig
 @@ -255,6 +255,8 @@ config MACH_OMAP_4430SDP
   depends on ARCH_OMAP4
   select INPUT_TOUCHSCREEN
   select TOUCHSCREEN_SYNTM12XX
 + select INPUT_MISC
 + select INPUT_CMA3000
 + select INPUT_CMA3000_I2C
 

The better way is to patch omap2plus_defconfig so these get added
as modules.

Regards,

Tony
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Re: [GIT PULL] FOR TESTING ONLY

2010-12-06 Thread Tony Lindgren
* Felipe Balbi ba...@ti.com [101203 04:35]:
 On Thu, Dec 02, 2010 at 02:27:36PM -0800, Tony Lindgren wrote:
 
 Great, yeah I'll merge them into linux-omap master branch for testing
 probably later on today.
 
 Cool, I just made the updates Mike asked and it's now all good again
 :-p

It will get repulled the next time I rebuild l-o master branch.
 
 I'm hoping Greg will still accept these patches on monday for merge
 window, cross your fingers :-p
 
 for 2.6.39 I'll get them all to build together. Not quite there yet.
 TUSB6010 messed up the whole code with ifdefs, I need to check how to do
 that one properly.

It seems the right long term solution is to get drivers/dma dmaengine
to work for us for both system DMA and CPPI DMA. Well there are probably
other problems you're dealing with too..

Tony
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[PATCH] OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks

2010-12-06 Thread Paul Walmsley

After Charu's GPIO hwmod patches, GPIO initialization on N800 emits
the following messages for all GPIO banks:

omap_hwmod: gpio1: cannot be enabled (3)

This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask.
Fix this and also fix two other macros that had the same problem.

Thanks to Tony Lindgren t...@atomide.com for originally reporting
this bug.

Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Tony Lindgren t...@atomide.com
Cc: Charulatha Varadarajan ch...@ti.com
---
 arch/arm/mach-omap2/prcm-common.h |   11 ++-
 1 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/prcm-common.h 
b/arch/arm/mach-omap2/prcm-common.h
index a837824..87486f5 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -171,13 +171,14 @@
 #define OMAP24XX_EN_GPT1_MASK  (1  0)
 
 /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */
-#define OMAP24XX_ST_GPIOS_SHIFT(1  2)
-#define OMAP24XX_ST_GPIOS_MASK 2
-#define OMAP24XX_ST_GPT1_SHIFT (1  0)
-#define OMAP24XX_ST_GPT1_MASK  0
+#define OMAP24XX_ST_GPIOS_SHIFT2
+#define OMAP24XX_ST_GPIOS_MASK (1  2)
+#define OMAP24XX_ST_GPT1_SHIFT 0
+#define OMAP24XX_ST_GPT1_MASK  (1  0)
 
 /* CM_IDLEST_MDM and PM_WKST_MDM shared bits */
-#define OMAP2430_ST_MDM_SHIFT  (1  0)
+#define OMAP2430_ST_MDM_SHIFT  0
+#define OMAP2430_ST_MDM_MASK   (1  0)
 
 
 /* 3430 register bits shared between CM  PRM registers */
-- 
1.7.2.3

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[PATCH 3/9] TILER-DMM: Sample TCM implementation: Simple TILER Allocator (SiTA)

2010-12-06 Thread David Sin
From: Ravi Ramachandra r.ramachan...@ti.com

This patch implements a simple TILER Container Manager (TCM).

Signed-off-by: Ravi Ramachandra r.ramachan...@ti.com
Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 drivers/misc/tiler/tcm/Makefile|1 +
 drivers/misc/tiler/tcm/_tcm-sita.h |   61 +
 drivers/misc/tiler/tcm/tcm-sita.c  |  422 
 drivers/misc/tiler/tcm/tcm-sita.h  |   28 +++
 4 files changed, 512 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/tiler/tcm/Makefile
 create mode 100644 drivers/misc/tiler/tcm/_tcm-sita.h
 create mode 100644 drivers/misc/tiler/tcm/tcm-sita.c
 create mode 100644 drivers/misc/tiler/tcm/tcm-sita.h

diff --git a/drivers/misc/tiler/tcm/Makefile b/drivers/misc/tiler/tcm/Makefile
new file mode 100644
index 000..8434607
--- /dev/null
+++ b/drivers/misc/tiler/tcm/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_TI_TILER) += tcm-sita.o
diff --git a/drivers/misc/tiler/tcm/_tcm-sita.h 
b/drivers/misc/tiler/tcm/_tcm-sita.h
new file mode 100644
index 000..6e4d292
--- /dev/null
+++ b/drivers/misc/tiler/tcm/_tcm-sita.h
@@ -0,0 +1,61 @@
+/*
+ * SImple Tiler Allocator (SiTA) private structures.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _TCM_SITA_H
+#define _TCM_SITA_H
+
+#include ../tcm.h
+
+/* length between two coordinates */
+#define LEN(a, b) ((a)  (b) ? (a) - (b) + 1 : (b) - (a) + 1)
+
+enum criteria {
+   CR_MAX_NEIGHS   = 0x01,
+   CR_FIRST_FOUND  = 0x10,
+   CR_BIAS_HORIZONTAL  = 0x20,
+   CR_BIAS_VERTICAL= 0x40,
+   CR_DIAGONAL_BALANCE = 0x80
+};
+
+/* nearness to the beginning of the search field from 0 to 1000 */
+struct nearness_factor {
+   s32 x;
+   s32 y;
+};
+
+/*
+ * Statistics on immediately neighboring slots. Edge is the number of
+ * border segments that are also border segments of the scan field.  Busy
+ * refers to the number of neighbors that are occupied.
+ */
+struct neighbor_stats {
+   u16 edge;
+   u16 busy;
+};
+
+/* structure to keep the score of a potential allocation */
+struct score {
+   struct nearness_factor  f;
+   struct neighbor_stats   n;
+   struct tcm_area a;
+   u16neighs;  /* number of busy neighbors */
+};
+
+struct sita_pvt {
+   struct mutex mtx;
+   struct tcm_area ***map; /* pointers to the parent area for each slot */
+};
+
+#endif
diff --git a/drivers/misc/tiler/tcm/tcm-sita.c 
b/drivers/misc/tiler/tcm/tcm-sita.c
new file mode 100644
index 000..a7ceac4
--- /dev/null
+++ b/drivers/misc/tiler/tcm/tcm-sita.c
@@ -0,0 +1,422 @@
+/*
+ * SImple Tiler Allocator (SiTA): 2D and 1D allocation(reservation) algorithm
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/slab.h
+
+#include _tcm-sita.h
+#include tcm-sita.h
+
+#define TCM_ALG_NAME tcm_sita
+#include tcm-utils.h
+
+#define ALIGN_DOWN(value, align) ((value)  ~((align) - 1))
+
+/* Individual selection criteria for different scan areas */
+static s32 CR_L2R_T2B = CR_BIAS_HORIZONTAL;
+
+/*
+ * TCM API - Sita Implementation
+ */
+static s32 sita_reserve_2d(struct tcm *tcm, u16 h, u16 w, u8 align,
+  struct tcm_area *area);
+static s32 sita_free(struct tcm *tcm, struct tcm_area *area);
+static void sita_deinit(struct tcm *tcm);
+
+/*
+ * Main Scanner functions
+ */
+static s32 scan_areas_and_find_fit(struct tcm *tcm, u16 w, u16 h, u16 align,
+  struct tcm_area *area);
+
+static s32 scan_l2r_t2b(struct tcm *tcm, u16 w, u16 h, u16 align,
+   struct tcm_area *field, struct tcm_area *area);
+
+/*
+ * Support Infrastructure Methods
+ */
+static s32 is_area_free(struct tcm_area ***map, u16 x0, u16 y0, u16 w, u16 h);
+
+static s32 update_candidate(struct tcm *tcm, u16 x0, u16 y0, u16 w, u16 h,
+   struct tcm_area *field, s32 criteria,
+   struct score *best);
+
+static void 

[PATCH 0/9] TI DMM-TILER driver

2010-12-06 Thread David Sin
Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
=

Dynamic Memory Manager (DMM) is a hardware block made by Texas Instruments.
Within the DMM exists at least one TILER hardware component.  Its purpose is to
organize video/image memory in a 2-dimensional fashion to limit memory
bandwidth and facilitate 0 effort rotation and mirroring.  The TILER driver
facilitates allocating, freeing, as well as mapping 2D blocks (areas) in the
TILER container(s).  It also facilitates rotating and mirroring the allocated
blocks or its rectangular subsections.

TERMINOLOGY

slot

The basic TILER driver operates on blocks of slots.  A slot is the granularity
of the TILER hardware device.  For all current uses it is 4K, but could also be
16 or 64K.  The DMM-TILER TRM refers to this as page but we want to separate
this concept from the MMU pages.

page

The granularity of the MMU, used by the kernel.  This is 4K.

block

The TILER hardware component supports 1D and 2D blocks.  A 2D block is a
rectangular arrangement of slots with arbitrary width and height in a 2D
container.  A 1D block is a linear arrangement of slots with arbitrary length
 in a 1D container.  This TILER driver only supports 2D blocks.

container

The TILER driver supports an arbitrary TILER container size.  However, for
all current implementations it is 256 by 128 slots.  The container currently can
only be used as a 2D container.

reserved area

Each block resides within a reserved area in the container.  This area may
be larger than the actual set of slots that a block occupies.  The reason for
this is to protect access from one block into another.  Since TILER container is
mmap-ped into user space as individual pages, all slots that are spanned by
that page become visible to the user.  The tiler driver allows restricting the
granularity of the reserved area (default alignment) as well as the mapped
area (granularity).

Technical Reference Manual
=
http://focus.ti.com/pdfs/wtbu/OMAP4430_ES2.x_PUBLIC_TRM_vN.zip

Changes since RFC v2: https://lkml.org/lkml/2010/11/30/352
=
Randy Dunlap:
1) Clarify the meaning of 2^n when referring to TILER alignment and 
allocation granularity

Greg KH:
1) Move tiler.h to include/linux since it's not arch specific
2) Rename _tiler.h to tiler-geom.h (ick)
3) Use WARN_ON instead of BUG_ON
4) Export symbols as 'EXPORT_SYMBOL_GPL'
5) Remove comment from Kconfig file

Santosh Shilimkar:
1) Create separate DMM OMAP device file patch (#9)

Changes since RFC v1: http://www.spinics.net/lists/linux-omap/msg33867.html
=
Santosh Shilimkar:
1) Correct documentation location
2) Remove ioremap of RAM
3) Implement probe function and hwmod
4) Correct commenting style
5) Reduce use of barrier instances

Linus Walleij:
1) Define TCM acryonym

Russell King:
1) Implement probe function
2) Fix spelling mistake
3) Remove GFP_ATOMIC flag when calling dma_alloc_coherent for PAT array mem
4) Replace alloc_page and flush range calls with dma_alloc_coherent

Nishanth Menon:
1) Address infinite while loop when reading dmm register

Benoit Cousson:
1) Fix source file headers
2) Correct logical errors in device file

Kevin Hilman:
1) Move DMM/TILER source code into driver/misc/tiler until a recommendation
is made as to where it should go

List of pending items in proposed order:

* Determine driver source code location
 (Currently, resides in drivers/misc/tiler)
* Add area packing support (multiple blocks can reside in the same band/area)
 to optimize area use
* Add group-ID support (to specify which blocks can reside together in the
 same area)
* Add multiple search directions to TCM-SiTA
* Add 1D block support (including adding 1D search algo to TCM-SiTA)
* Optimize mutex handling (don.t hold mutex during memory
 allocation/mapping/cache flushing)
* Add block reference counting, support for sharing blocks
* Move all kernel-API-s to tiler-iface.c
* Support orphaned block support (in preparation for process cleanup support)
* Change block identification from physical address to key-ID pair
 (in preparation for user space support, and process security)
* Add support for process security (blocks from separate processes never
 reside in the same band)
* Support file interface (ioctl and mmap)
* Support for buffers (ordered list of blocks that are mapped to userspace
 together, such as YUV420sp)
* Support 1D user buffer mapping into TILER container
* Support for block pre-reservation (to further optimize area use)

David Sin (2):
  TILER-DMM: DMM-PAT driver for TI TILER
  TILER-DMM: Device support for OMAP

Lajos Molnar (6):
  TILER-DMM: Container manager interface and utility definitons
  TILER-DMM: TILER Memory Manager interface and implementation
  TILER-DMM: TILER interface file and documentation
  TILER-DMM: Geometry and view manipulation functions
  TILER-DMM: Main TILER driver implementation
  TILER-DMM: Linking TILER driver into the Linux kernel build

Ravi Ramachandra (1):
  TILER-DMM: Sample TCM implementation: 

[PATCH 5/9] TILER-DMM: TILER interface file and documentation

2010-12-06 Thread David Sin
From: Lajos Molnar mol...@ti.com

This patch contains the TILER interface file and the documentation.

Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 Documentation/arm/OMAP/TILER |  126 ++
 include/linux/tiler.h|  173 ++
 2 files changed, 299 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/arm/OMAP/TILER
 create mode 100644 include/linux/tiler.h

diff --git a/Documentation/arm/OMAP/TILER b/Documentation/arm/OMAP/TILER
new file mode 100644
index 000..2e94ad7
--- /dev/null
+++ b/Documentation/arm/OMAP/TILER
@@ -0,0 +1,126 @@
+Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
+
+Dynamic Memory Manager (DMM) is a hardware block made by Texas Instruments.
+Within the DMM exists at least one TILER hardware component.  Its purpose is to
+organize video/image memory in a 2-dimensional fashion to limit memory
+bandwidth and facilitate 0 effort rotation and mirroring.  The TILER driver
+facilitates allocating, freeing, as well as mapping 2D blocks (areas) in the
+TILER container(s).  It also facilitates rotating and mirroring the allocated
+blocks or its rectangular subsections.
+
+TERMINOLOGY
+
+slot
+
+The basic TILER driver operates on blocks of slots.  A slot is the granularity
+of the TILER hardware device.  For all current uses it is 4K, but could also be
+16 or 64K.  The DMM-TILER TRM refers to this as page but we want to separate
+this concept from the MMU pages.
+
+page
+
+The granularity of the MMU, used by the kernel.  This is 4K.
+
+block
+
+The TILER hardware component supports 1D and 2D blocks.  A 2D block is a
+rectangular arrangement of slots with arbitrary width and height in a 2D 
+container.  A 1D block is a linear arrangement of slots with arbitrary length
+ in a 1D container.  This TILER driver only supports 2D blocks.
+
+container
+
+The TILER driver supports an arbitrary TILER container size.  However, for
+all current implementations it is 256 by 128 slots.  The container currently 
can
+only be used as a 2D container.
+
+reserved area
+
+Each block resides within a reserved area in the container.  This area may
+be larger than the actual set of slots that a block occupies.  The reason for
+this is to protect access from one block into another.  Since TILER container 
is
+mmap-ped into user space as individual pages, all slots that are spanned by
+that page become visible to the user.  The tiler driver allows restricting the
+granularity of the reserved area (default alignment) as well as the mapped
+area (granularity).
+
+Using TILER driver KERNEL APIs:
+
+1. Allocating and freeing a 1080p YUV422 block
+
+struct tiler_block_t blk = {0};
+int res;
+
+blk.width = 1920;
+blk.height = 1080;
+res = tiler_alloc(blk, TILFMT_16BIT, 0, 0);
+
+tiler_free(blk);
+
+2. Allocating and freeing a 1080p YUV420p block
+
+struct tiler_block_t blk_Y = {0}, blk_UV = {0};
+int res;
+
+blk_Y.width = 1920;
+blk_Y.height = 1080;
+blk_UV.widht = 960;
+blk_UV.height = 540;
+res = tiler_alloc(blk_Y, TILFMT_8BIT, 0, 0) ? :
+tiler_alloc(blk_UV, TILFMT_16BIT, PAGE_SIZE,
+blk_y-phys  ~PAGE_MASK);
+
+tiler_free(blk_Y);
+tiler_free(blk_UV);
+
+Note how we allocated the UV block at the same in-page offset as the Y buffer.
+This facilitates mmap-ping both Y and UV blocks into userspace as one
+contiguous buffer.
+
+3. Mmap-ing YUV420p block into user space
+
+static int my_mmap(struct file *file, struct vm_area_struct *vma)
+{
+unsigned long size = (vma-vm_end - vma-vm_start);
+unsigned long start = vma-vm_start;
+
+if (size != tiler_size(blk_Y) + tiler_size(blk_UV))
+return -EINVAL;
+
+return tiler_mmap_blk(blk_Y, 0, tiler_size(blk_Y), vma, 0) ?
+: tiler_mmap_blk(blk_UV, 0, tiler_size(blk_UV), vma,
+tiler_size(blk_Y));
+}
+
+CONFIGURATIONS
+
+The TILER driver allows specifying a container manager (tcm) for each
+pixel format.  The same container manager can be specified for more than
+one pixel formats.
+
+Each container manager also operates on a Physical Address Translator PAT
+ instance.  One can also specify a virtual PAT (with a linear preassigned
+ memory space no actual PAT programming), but it is not implemented.
+
+PARAMETERS
+
+The TILER driver allows specifying:
+
+granularity (tiler.grain, CONFIG_TILER_GRANULARITY):
+
+Each block is mapped in width-chunks of granularity.
+
+default alignment (tiler.align, CONFIG_TILER_ALIGNMENT):
+
+Default alignment if aligment is not specified (0). Otherwise,
+blocks are allocated at an address aligned to the value given plus an
+offset within the 

[PATCH 7/9] TILER-DMM: Main TILER driver implementation

2010-12-06 Thread David Sin
From: Lajos Molnar mol...@ti.com

This patch contains the TILER driver and implementation of the TILER
block manipulation and mapping functions.

It also contains the makefile and config file for the TILER driver.

Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 drivers/misc/tiler/Kconfig   |   72 +++
 drivers/misc/tiler/Makefile  |7 +
 drivers/misc/tiler/tiler-iface.c |   66 ++
 drivers/misc/tiler/tiler-main.c  |  405 ++
 4 files changed, 550 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/tiler/Kconfig
 create mode 100644 drivers/misc/tiler/Makefile
 create mode 100644 drivers/misc/tiler/tiler-iface.c
 create mode 100644 drivers/misc/tiler/tiler-main.c

diff --git a/drivers/misc/tiler/Kconfig b/drivers/misc/tiler/Kconfig
new file mode 100644
index 000..eae4fb1
--- /dev/null
+++ b/drivers/misc/tiler/Kconfig
@@ -0,0 +1,72 @@
+config HAVE_TI_DMM
+   bool
+   default y
+   depends on ARCH_OMAP4
+
+menuconfig TI_DMM
+tristate TI DMM support
+default y
+depends on HAVE_TI_DMM
+help
+   DMM driver for TI chips.
+
+menuconfig TI_TILER
+tristate TI TILER support
+default y
+depends on TI_DMM
+help
+   TILER driver for TI chips.  The TI TILER device
+   enables video rotation on certain TI chips such as OMAP4 or
+   TI816x.  Video rotation will be limited without TILER support.
+
+config TILER_GRANULARITY
+int Allocation granularity
+range 1 4096
+default 128
+depends on TI_TILER
+help
+   This option sets the default TILER allocation granularity.  It can
+   be overriden by the tiler.grain boot argument.
+
+   The allocation granularity is the smallest TILER block size (in
+   bytes) managed distinctly by the TILER driver.  TILER blocks of any
+   size are managed in chunks of at least this size.
+
+   Must be a power of 2 in the range of 1 to 4096; however, the TILER
+   driver may use a larger supported granularity.
+
+   Supported values are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024,
+   2048, 4096.
+
+config TILER_ALIGNMENT
+int Allocation alignment
+range 1 4096
+default 4096
+depends on TI_TILER
+help
+   This option sets the default TILER allocation alignment.  It can
+   be overriden by the tiler.align boot argument.
+
+   Must be a power of 2 in the range of 1 to 4096; however, it is
+   naturally aligned to the TILER granularity.
+
+   Supported values are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024,
+   2048, 4096.
+
+config TILER_CACHE_LIMIT
+int Memory limit to cache free pages in MBytes
+range 0 128
+default 40
+depends on TI_TILER
+help
+   This option sets the minimum memory that TILER retains even if
+   there is less TILER allocated memory is use.  The unused memory is
+   instead stored in a cache to speed up allocation and freeing of
+   physical pages.
+
+   This option can be overriden by the tiler.cache boot argument.
+
+   While initially TILER will use less memory than this limit (0), it
+   will not release any memory used until it reaches this limit.
+   Thereafter, TILER will release any unused memory immediately as
+   long as there it is above this threshold.
diff --git a/drivers/misc/tiler/Makefile b/drivers/misc/tiler/Makefile
new file mode 100644
index 000..7dbc828
--- /dev/null
+++ b/drivers/misc/tiler/Makefile
@@ -0,0 +1,7 @@
+obj-$(CONFIG_TI_DMM) += dmm.o
+dmm-objs = dmm-main.o
+
+obj-$(CONFIG_TI_TILER) += tcm/
+
+obj-$(CONFIG_TI_TILER) += tiler.o
+tiler-objs = tiler-geom.o tiler-main.o tiler-iface.o tmm-pat.o
diff --git a/drivers/misc/tiler/tiler-iface.c b/drivers/misc/tiler/tiler-iface.c
new file mode 100644
index 000..02c95c5
--- /dev/null
+++ b/drivers/misc/tiler/tiler-iface.c
@@ -0,0 +1,66 @@
+/*
+ * TILER driver interace functions for TI TILER hardware block.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include linux/slab.h
+#include linux/mm.h
+#include linux/mm_types.h
+#include asm/mach/map.h
+
+#include tiler-geom.h
+
+/*
+ * Memory-Map Kernel APIs
+ */
+
+s32 tiler_mmap_blk(struct tiler_block_t *blk, u32 offs, u32 

[PATCH 9/9] TILER-DMM: Device support for OMAP

2010-12-06 Thread David Sin
Add DMM device support for OMAP utilizing the
OMAP HWMOD framework.

Signed-off-by: Hari Kanigeri h-kanige...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 arch/arm/mach-omap2/Makefile   |2 +
 arch/arm/mach-omap2/dmm-omap44xx.c |   80 
 2 files changed, 82 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/dmm-omap44xx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 60e51bc..fc682ea 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -194,3 +194,5 @@ obj-y   += $(smc91x-m) 
$(smc91x-y)
 
 smsc911x-$(CONFIG_SMSC911X):= gpmc-smsc911x.o
 obj-y  += $(smsc911x-m) $(smsc911x-y)
+
+obj-$(CONFIG_ARCH_OMAP4)   += dmm-omap44xx.o
diff --git a/arch/arm/mach-omap2/dmm-omap44xx.c 
b/arch/arm/mach-omap2/dmm-omap44xx.c
new file mode 100644
index 000..a84490c
--- /dev/null
+++ b/arch/arm/mach-omap2/dmm-omap44xx.c
@@ -0,0 +1,80 @@
+/*
+ * DMM driver support functions for TI OMAP processors.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/init.h
+#include linux/module.h
+#include mach/dmm.h
+#include plat/omap_device.h
+#include plat/omap_hwmod.h
+#include linux/errno.h
+#include linux/err.h
+
+static struct dmm *plat_data;
+static int pdata;
+
+#ifdef CONFIG_ARCH_OMAP4
+static struct dmm omap4_plat_data[] = {
+   {
+   .oh_name = dmm,
+   },
+};
+#define NUM_PDATA ARRAY_SIZE(omap4_plat_data)
+#else
+#define omap4_plat_data NULL
+#define NUM_PDATA 0
+#endif
+
+static struct omap_device_pm_latency omap_dmm_latency[] = {
+   [0] = {
+   .deactivate_func = omap_device_idle_hwmods,
+   .activate_func = omap_device_enable_hwmods,
+   .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+   },
+};
+
+static s32 __init dmm_omap_init(void)
+{
+   struct omap_hwmod *oh = NULL;
+   struct omap_device *od = NULL;
+   struct omap_device_pm_latency *ohl = NULL;
+   int ohlc = 0, i = 0;
+
+   plat_data = omap4_plat_data;
+   pdata = NUM_PDATA;
+
+   for (i = 0; i  pdata; i++) {
+   struct dmm *data = plat_data[i];
+
+   oh = omap_hwmod_lookup(data-oh_name);
+   if (!oh)
+   goto error;
+
+   data-base = oh-_mpu_rt_va;
+   ohl = omap_dmm_latency;
+   ohlc = ARRAY_SIZE(omap_dmm_latency);
+
+   od = omap_device_build(data-oh_name, i, oh, data,
+sizeof(*data), ohl, ohlc, false);
+   if (IS_ERR(od))
+   goto error;
+   }
+   return 0;
+error:
+   return -ENODEV;
+}
+
+MODULE_LICENSE(GPL v2);
+MODULE_AUTHOR(David Sin david...@ti.com);
+device_initcall(dmm_omap_init);
-- 
1.7.0.4

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[PATCH 6/9] TILER-DMM: Geometry and view manipulation functions

2010-12-06 Thread David Sin
From: Lajos Molnar mol...@ti.com

This patch contains information on TILER geometry, as well as
tiler_view_t object manipulation functions.

It also contains an internal TILER header file to share geometric
information with other TILER files.

Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 drivers/misc/tiler/tiler-geom.c |  362 +++
 drivers/misc/tiler/tiler-geom.h |   48 +
 2 files changed, 410 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/tiler/tiler-geom.c
 create mode 100644 drivers/misc/tiler/tiler-geom.h

diff --git a/drivers/misc/tiler/tiler-geom.c b/drivers/misc/tiler/tiler-geom.c
new file mode 100644
index 000..c94193b
--- /dev/null
+++ b/drivers/misc/tiler/tiler-geom.c
@@ -0,0 +1,362 @@
+/*
+ * TILER geometry functions for TI TILER hardware block.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include tiler-geom.h
+
+/* bits representing the same slot in DMM-TILER hw-block */
+#define SLOT_WIDTH_BITS6
+#define SLOT_HEIGHT_BITS   6
+
+/* bits reserved to describe coordinates in DMM-TILER hw-block */
+#define CONT_WIDTH_BITS14
+#define CONT_HEIGHT_BITS   13
+
+static struct tiler_geom geom[TILER_FORMATS] = {
+   {
+   .x_shft = 0,
+   .y_shft = 0,
+   },
+   {
+   .x_shft = 0,
+   .y_shft = 1,
+   },
+   {
+   .x_shft = 1,
+   .y_shft = 1,
+   },
+};
+
+/* tiler space addressing bitfields */
+#define MASK_XY_FLIP   (1  31)
+#define MASK_Y_INVERT  (1  30)
+#define MASK_X_INVERT  (1  29)
+#define SHIFT_ACC_MODE 27
+#define MASK_ACC_MODE  3
+
+/* calculated constants */
+#define TILER_PAGE (1  (SLOT_WIDTH_BITS + SLOT_HEIGHT_BITS))
+#define TILER_WIDTH(1  (CONT_WIDTH_BITS - SLOT_WIDTH_BITS))
+#define TILER_HEIGHT   (1  (CONT_HEIGHT_BITS - SLOT_HEIGHT_BITS))
+
+#define VIEW_SIZE  (1u  (CONT_WIDTH_BITS + CONT_HEIGHT_BITS))
+#define VIEW_MASK  (VIEW_SIZE - 1u)
+
+#define MASK(bits) ((1  (bits)) - 1)
+
+#define TILER_FMT(x)   ((enum tiler_fmt) \
+   ((x  SHIFT_ACC_MODE)  MASK_ACC_MODE))
+
+#define MASK_VIEW  (MASK_X_INVERT | MASK_Y_INVERT | MASK_XY_FLIP)
+
+/* location of the various tiler views in physical address space */
+#define TILVIEW_8BIT   0x6000u
+#define TILVIEW_16BIT  (TILVIEW_8BIT  + VIEW_SIZE)
+#define TILVIEW_32BIT  (TILVIEW_16BIT + VIEW_SIZE)
+#define TILVIEW_PAGE   (TILVIEW_32BIT + VIEW_SIZE)
+#define TILVIEW_END(TILVIEW_PAGE  + VIEW_SIZE)
+
+/* create tsptr by adding view orientation and access mode */
+#define TIL_ADDR(x, orient, a)\
+   ((u32) (x) | (orient) | ((a)  SHIFT_ACC_MODE))
+
+bool is_tiler_addr(u32 phys)
+{
+   return phys = TILVIEW_8BIT  phys  TILVIEW_END;
+}
+EXPORT_SYMBOL_GPL(is_tiler_addr);
+
+u32 tiler_bpp(const struct tiler_block_t *b)
+{
+   enum tiler_fmt fmt = tiler_fmt(b-phys);
+   WARN_ON(fmt == TILFMT_INVALID || fmt == TILFMT_PAGE);
+
+   return geom[fmt].bpp;
+}
+EXPORT_SYMBOL_GPL(tiler_bpp);
+
+/* return the stride of a tiler-block in tiler space */
+static inline s32 tiler_stride(u32 tsptr)
+{
+   enum tiler_fmt fmt = TILER_FMT(tsptr);
+
+   if (fmt == TILFMT_PAGE)
+   return 0;
+   else if (tsptr  MASK_XY_FLIP)
+   return 1  (CONT_HEIGHT_BITS + geom[fmt].x_shft);
+   else
+   return 1  (CONT_WIDTH_BITS + geom[fmt].y_shft);
+}
+
+u32 tiler_pstride(const struct tiler_block_t *b)
+{
+   enum tiler_fmt fmt = tiler_fmt(b-phys);
+   WARN_ON(fmt == TILFMT_INVALID);
+
+   /* return the virtual stride for page mode */
+   if (fmt == TILFMT_PAGE)
+   return tiler_vstride(b);
+
+   return tiler_stride(b-phys  ~MASK_VIEW);
+}
+EXPORT_SYMBOL_GPL(tiler_pstride);
+
+enum tiler_fmt tiler_fmt(u32 phys)
+{
+   if (!is_tiler_addr(phys))
+   return TILFMT_INVALID;
+
+   return TILER_FMT(phys);
+}
+EXPORT_SYMBOL_GPL(tiler_fmt);
+
+/* returns the tiler geometry information for a format */
+static const struct tiler_geom *get_geom(enum tiler_fmt fmt)
+{
+   if (fmt = TILFMT_MIN  fmt = TILFMT_MAX)
+   return geom + fmt;
+   return NULL;
+}
+
+/*
+ * Returns the natural x and y coordinates for a pixel in tiler space address.
+ * That is, the coordinates for the same pixel in 

[PATCH 2/9] TILER-DMM: Container manager interface and utility definitons

2010-12-06 Thread David Sin
From: Lajos Molnar mol...@ti.com

This patch defined the TILER Container Manager (TCM) interface and
provides utility methods for implementing a TCM.

Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
Signed-off-by: Ravi Ramachandra r.ramachan...@ti.com
---
 drivers/misc/tiler/tcm.h   |  171 
 drivers/misc/tiler/tcm/tcm-utils.h |   51 +++
 2 files changed, 222 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/tiler/tcm.h
 create mode 100644 drivers/misc/tiler/tcm/tcm-utils.h

diff --git a/drivers/misc/tiler/tcm.h b/drivers/misc/tiler/tcm.h
new file mode 100644
index 000..8968108
--- /dev/null
+++ b/drivers/misc/tiler/tcm.h
@@ -0,0 +1,171 @@
+/*
+ * TILER container manager specification and support functions for TI
+ * TILER driver.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef TCM_H
+#define TCM_H
+
+struct tcm;
+
+/* point */
+struct tcm_pt {
+   u16 x;
+   u16 y;
+};
+
+/* 2d area */
+struct tcm_area {
+   struct tcm*tcm; /* parent */
+   struct tcm_pt  p0;
+   struct tcm_pt  p1;
+};
+
+struct tcm {
+   u16 width, height;  /* container dimensions */
+
+   /*
+* 'pvt' structure shall contain any tcm details (attr) along with
+* linked list of allocated areas and mutex for mutually exclusive
+* access to the list.  It may also contain copies of width and height
+* to notice any changes to the publicly available width and height
+* fields.
+*/
+   void *pvt;
+
+   /* function table */
+   s32 (*reserve_2d)(struct tcm *tcm, u16 height, u16 width, u8 align,
+ struct tcm_area *area);
+   s32 (*free)  (struct tcm *tcm, struct tcm_area *area);
+   void (*deinit)   (struct tcm *tcm);
+};
+
+/*
+ * Since some basic parameter checking is done outside the TCM algorithms,
+ * TCM implementation do NOT have to check the following:
+ *
+ *   area pointer is NULL
+ *   width and height fits within container
+ *   number of pages is more than the size of the container
+ */
+
+/*
+ * Template for ALGO_NAME_tcm_init method.  Define as:
+ * TCM_INIT(ALGO_NAME_tcm_init)
+ *
+ * Allocates and initializes a tiler container manager.
+ *
+ * Pointer to the allocated and initialized container manager.
+ * NULL on failure.  DO NOT leak any memory on failure!
+ */
+#define TCM_INIT(name, attr_t) \
+struct tcm *name(u16 width, u16 height, typeof(attr_t) *attr);
+
+/*
+ * Deinitialize tiler container manager.
+ *
+ * The call should free as much memory as possible and meaningful
+ * even on failure.  Some error codes: -ENODEV: invalid manager.
+ */
+static inline void tcm_deinit(struct tcm *tcm)
+{
+   if (tcm)
+   tcm-deinit(tcm);
+}
+
+/*
+ * Reserves a 2D area in the container.
+ *
+ * The tcm field of the area will be set to NULL on failure.
+ * Some error codes: -ENODEV: invalid manager, -EINVAL:
+ * invalid area, -ENOMEM: not enough space for allocation.
+ */
+static inline s32 tcm_reserve_2d(struct tcm *tcm, u16 width, u16 height,
+u16 align, struct tcm_area *area)
+{
+   /* perform rudimentary error checking */
+   s32 res = (tcm  == NULL ? -ENODEV :
+   (area == NULL || width == 0 || height == 0 ||
+/* align must be a 2 power */
+align  (align - 1)) ? -EINVAL :
+   (height  tcm-height || width  tcm-width) ? -ENOMEM :
+   tcm-reserve_2d(tcm, height, width, align, area));
+
+   if (area)
+   area-tcm = res ? NULL : tcm;
+
+   return res;
+}
+
+/*
+ * Free a previously reserved area from the container.
+ *
+ * The tcm field of the area is set to NULL on success
+ * to avoid subsequent freeing.  This call will succeed
+ * even if supplying the area from a failed reserved call.
+ */
+static inline s32 tcm_free(struct tcm_area *area)
+{
+   s32 res = 0; /* free succeeds by default */
+
+   if (area  area-tcm) {
+   res = area-tcm-free(area-tcm, area);
+   if (res == 0)
+   area-tcm = NULL;
+   }
+
+   return res;
+}
+
+/* Verify if a tcm area is logically valid */
+static inline bool tcm_area_is_valid(struct tcm_area *area)
+{
+   return area  area-tcm 
+   /* coordinate bounds */
+   area-p1.x  area-tcm-width 
+   area-p1.y  area-tcm-height 
+   

[PATCH 8/9] TILER-DMM: Linking TILER driver into the Linux kernel build

2010-12-06 Thread David Sin
From: Lajos Molnar mol...@ti.com

This patch links the TILER driver into the Linux kernel build
and config system.

Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 drivers/misc/Kconfig  |1 +
 drivers/misc/Makefile |1 +
 2 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 4d073f1..1ebc655 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -457,5 +457,6 @@ source drivers/misc/eeprom/Kconfig
 source drivers/misc/cb710/Kconfig
 source drivers/misc/iwmc3200top/Kconfig
 source drivers/misc/ti-st/Kconfig
+source drivers/misc/tiler/Kconfig
 
 endif # MISC_DEVICES
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 98009cc..3716c49 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -42,3 +42,4 @@ obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o
 obj-$(CONFIG_PCH_PHUB) += pch_phub.o
 obj-y  += ti-st/
 obj-$(CONFIG_AB8500_PWM)   += ab8500-pwm.o
+obj-$(CONFIG_TI_TILER) += tiler/
-- 
1.7.0.4

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[PATCH 1/9] TILER-DMM: DMM-PAT driver for TI TILER

2010-12-06 Thread David Sin
This patch adds support for DMM-PAT initialization and programming.

Signed-off-by: David Sin david...@ti.com
Signed-off-by: Lajos Molnar mol...@ti.com
---
 arch/arm/mach-omap2/include/mach/dmm.h |   92 
 drivers/misc/tiler/dmm-main.c  |  187 
 2 files changed, 279 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/include/mach/dmm.h
 create mode 100644 drivers/misc/tiler/dmm-main.c

diff --git a/arch/arm/mach-omap2/include/mach/dmm.h 
b/arch/arm/mach-omap2/include/mach/dmm.h
new file mode 100644
index 000..33a1215
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/dmm.h
@@ -0,0 +1,92 @@
+/*
+ * Dynamic Memory Manager (DMM) driver support functions for
+ * TI DMM-TILER hardware block.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef DMM_H
+#define DMM_H
+
+#define DMM_TILER_OR__0   0x220
+#define DMM_TILER_OR__1   0x224
+#define DMM_PAT_VIEW__0   0x420
+#define DMM_PAT_VIEW__1   0x424
+#define DMM_PAT_VIEW_MAP__0   0x440
+#define DMM_PAT_VIEW_MAP_BASE 0x460
+#define DMM_PAT_IRQSTATUS_RAW 0x480
+#define DMM_PAT_IRQSTATUS 0x490
+#define DMM_PAT_STATUS__0 0x4C0
+#define DMM_PAT_DESCR__0  0x500
+#define DMM_PAT_AREA__0   0x504
+#define DMM_PAT_CTRL__0   0x508
+#define DMM_PAT_DATA__0   0x50C
+
+/*
+ * Physical Address Translator (PAT) refill programming mode
+ */
+enum pat_mode {
+   MANUAL,
+   AUTO
+};
+
+/*
+ * Area definition for DMM physical address translator
+ */
+struct pat_area {
+   s8 x0:8;
+   s8 y0:8;
+   s8 x1:8;
+   s8 y1:8;
+};
+
+/*
+ * DMM physical address translator control
+ */
+struct pat_ctrl {
+   s32 start:4;
+   s32 dir:4;
+   s32 lut_id:8;
+   s32 sync:12;
+   s32 ini:4;
+};
+
+/*
+ * Physical Address Translator (PAT) descriptor
+ */
+struct pat {
+   struct pat *next;
+   struct pat_area area;
+   struct pat_ctrl ctrl;
+   u32 data;
+};
+
+/*
+ * DMM device data
+ */
+struct dmm {
+   const char *oh_name;
+   void __iomem *base;
+   int irq;
+};
+
+/*
+ * Create and initialize the physical address translator
+ */
+struct dmm *dmm_pat_init(u32 id);
+
+/*
+ * Program the physical address translator
+ */
+int dmm_pat_refill(struct dmm *dmm, struct pat *desc, enum pat_mode mode);
+
+#endif
diff --git a/drivers/misc/tiler/dmm-main.c b/drivers/misc/tiler/dmm-main.c
new file mode 100644
index 000..f337bd9
--- /dev/null
+++ b/drivers/misc/tiler/dmm-main.c
@@ -0,0 +1,187 @@
+/*
+ * DMM driver support functions for TI OMAP processors.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/init.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/io.h
+#include linux/errno.h
+#include linux/slab.h
+#include linux/delay.h
+
+#include mach/dmm.h
+
+#define MASK(msb, lsb) (((1  ((msb) + 1 - (lsb))) - 1)  (lsb))
+#define SET_FLD(reg, msb, lsb, val) \
+(((reg)  ~MASK((msb), (lsb))) | (((val)  (lsb))  MASK((msb), (lsb
+#define MAX_RETRY_MS   1000
+
+static struct dmm *dmm;
+
+static int dmm_probe(struct platform_device *dev)
+{
+   if (dev)
+   dmm = dev-dev.platform_data;
+
+   if (dmm  dmm-base) {
+   writel(0x, dmm-base + DMM_TILER_OR__0);
+   writel(0x, dmm-base + DMM_TILER_OR__1);
+   return 0;
+   }
+   return -EFAULT;
+}
+
+static int dmm_remove(struct platform_device *dev)
+{
+   return 0;
+}
+
+static struct platform_driver dmm_driver = {
+   .probe = dmm_probe,
+   .remove = dmm_remove,
+   .driver = {
+   .owner = THIS_MODULE,
+   .name = dmm,
+   },
+};
+
+int dmm_pat_refill(struct dmm *dmm, struct pat *pd, enum pat_mode mode)
+{
+   void __iomem *r;
+   u32 v, i;
+
+   if (!dmm || !dmm-base || !pd)
+   return -EFAULT;
+
+   /* Only manual refill supported */
+   if (mode != MANUAL)
+   return -EFAULT;
+
+   /* Check 

[PATCH 4/9] TILER-DMM: TILER Memory Manager interface and implementation

2010-12-06 Thread David Sin
From: Lajos Molnar mol...@ti.com

This patch defines the TILER Memory Manager (TMM) interface and
provides implementation for a PAT-supporting TMM.

Signed-off-by: Lajos Molnar mol...@ti.com
Signed-off-by: David Sin david...@ti.com
---
 drivers/misc/tiler/tmm-pat.c |  266 ++
 drivers/misc/tiler/tmm.h |  103 
 2 files changed, 369 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/tiler/tmm-pat.c
 create mode 100644 drivers/misc/tiler/tmm.h

diff --git a/drivers/misc/tiler/tmm-pat.c b/drivers/misc/tiler/tmm-pat.c
new file mode 100644
index 000..682f549
--- /dev/null
+++ b/drivers/misc/tiler/tmm-pat.c
@@ -0,0 +1,266 @@
+/*
+ * DMM driver support functions for TI TILER hardware block.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/init.h
+#include linux/module.h
+#include linux/mm.h
+#include linux/mmzone.h
+#include asm/cacheflush.h
+#include linux/mutex.h
+#include linux/list.h
+#include linux/slab.h
+#include linux/dma-mapping.h
+
+#include tmm.h
+
+/* Page size granularity can be 4k, 16k, or 64k */
+#define DMM_PAGE SZ_4K
+
+/* Memory limit to cache free pages. TILER will eventually use this much */
+static u32 cache_limit = CONFIG_TILER_CACHE_LIMIT  20;
+module_param_named(cache, cache_limit, uint, 0644);
+MODULE_PARM_DESC(cache, Cache free pages if total memory is under this 
limit);
+
+/* global state - statically initialized */
+static LIST_HEAD(free_list);   /* page cache: list of free pages */
+static u32 total_mem;  /* total memory allocated (free  used) */
+static u32 refs;   /* number of tmm_pat instances */
+static DEFINE_MUTEX(mtx);  /* global mutex */
+
+/* The page struct pointer and physical address of each page.*/
+struct mem {
+   struct list_head list;
+   u32 *pg;/* page struct */
+   dma_addr_t pa;  /* physical address */
+};
+
+/* Used to keep track of mem per tmm_pat_get_pages call */
+struct fast {
+   struct list_head list;
+   struct mem **mem;   /* array of page info */
+   u32 *pa;/* array of physical addresses */
+   u32 num;/* number of pages */
+};
+
+/* TMM PAT private structure */
+struct dmm_mem {
+   struct list_head fast_list;
+   struct dmm *dmm;
+};
+
+/*
+ *  Frees pages in a fast structure.  Moves pages to the free list if there
+ *  areless pages used than max_to_keep.  Otherwise, it frees the pages
+ */
+static void free_fast(struct fast *f)
+{
+   s32 i = 0;
+
+   /* mutex is locked */
+   for (i = 0; i  f-num; i++) {
+   if (total_mem  cache_limit) {
+   /* cache free page if under the limit */
+   list_add(f-mem[i]-list, free_list);
+   } else {
+   /* otherwise, free */
+   total_mem -= PAGE_SIZE;
+   dma_free_coherent(NULL, DMM_PAGE, f-mem[i]-pg,
+   f-mem[i]-pa);
+   }
+   }
+   kfree(f-pa);
+   kfree(f-mem);
+   /* remove only if element was added */
+   if (f-list.next)
+   list_del(f-list);
+   kfree(f);
+}
+
+/* allocate and flush a page */
+static struct mem *alloc_mem(void)
+{
+   struct mem *m = kzalloc(sizeof(*m), GFP_KERNEL);
+   if (!m)
+   return NULL;
+
+   m-pg = dma_alloc_coherent(NULL, DMM_PAGE, m-pa, GFP_KERNEL);
+   if (!m-pg) {
+   kfree(m);
+   return NULL;
+   }
+   wmb();
+
+   return m;
+}
+
+static void free_page_cache(void)
+{
+   struct mem *m, *m_;
+
+   /* mutex is locked */
+   list_for_each_entry_safe(m, m_, free_list, list) {
+   dma_free_coherent(NULL, DMM_PAGE, m-pg, m-pa);
+   total_mem -= PAGE_SIZE;
+   list_del(m-list);
+   kfree(m);
+   }
+}
+
+static void tmm_pat_deinit(struct tmm *tmm)
+{
+   struct fast *f, *f_;
+   struct dmm_mem *pvt = (struct dmm_mem *) tmm-pvt;
+
+   mutex_lock(mtx);
+
+   /* free all outstanding used memory */
+   list_for_each_entry_safe(f, f_, pvt-fast_list, list)
+   free_fast(f);
+
+   /* if this is the last tmm_pat, free all memory */
+   if (--refs == 0)
+   free_page_cache();
+
+   mutex_unlock(mtx);
+}
+
+static u32 *tmm_pat_get_pages(struct tmm *tmm, u32 n)
+{
+   struct mem *m;
+

Re: [PATCH v3 00/12] staging: tidspbridge: various cleanups

2010-12-06 Thread Ionut Nicu
Hi Omar,

On Mon, 2010-12-06 at 02:59 -0600, Ramirez Luna, Omar wrote:
 Hi Ionut,
 
 On Sun, Nov 21, 2010 at 4:46 AM, Ionut Nicu ionut.n...@gmail.com wrote:
  This set of patches replaces some of the redundant components of
  the tidspbridge driver, such as:
 
  * wrapper functions for kmalloc/kfree
  * custom bitmap implementation
  * custom linked list implementation (list_head wrapper)
 
  with the standard linux kernel interfaces.
 
  The patches also do some code reorganization for increasing readability.
  Most of the changes reduce the code indentation level and simplify the code.
  No functional changes were done.
 
  There are many places in this driver that need this kind of cleanup, but
  these patches only fix the functions that were touched while converting
  the code to use linux bitmap and list_head.
 
 Thanks for your patches, I just fixed the style of some multiline
 comments before pushing, since these are very minor fixes I avoided
 the noise of resending the patches.
 
 Please remember to follow the Coding Style for multi line comments
 whenever you insert back those lines (even if the code was that way).
 

Thanks for your review. It's strange scripts/checkpatch.pl didn't
complain, so that's why I must have missed them.

   staging: tidspbridge: rmgr/node.c code cleanup
 
 Changes requested
 

I'll take care of the changes you requested in the other email and
resubmit it.

   staging: tidspbridge: rmgr code cleanup
 
 Doesn't apply because of patch staging: tidspbridge: rmgr/node.c code
 cleanup was not pushed.
 

I'll make a 2-patch series containing this one and the one above.

Thanks,
Ionut.

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Re: [PATCH 7/9] TILER-DMM: Main TILER driver implementation

2010-12-06 Thread Tony Lindgren
Hi,

* David Sin david...@ti.com [101206 14:09]:
 From: Lajos Molnar mol...@ti.com
 
 This patch contains the TILER driver and implementation of the TILER
 block manipulation and mapping functions.
 
 It also contains the makefile and config file for the TILER driver.

...
 +config TILER_GRANULARITY
 +int Allocation granularity
 +range 1 4096
 +default 128
...
 +config TILER_ALIGNMENT
 +int Allocation alignment
 +range 1 4096
 +default 4096
...
 +config TILER_CACHE_LIMIT
 +int Memory limit to cache free pages in MBytes
 +range 0 128
 +default 40
...

Do you really need these Kconfig options? To me it seems you
should pass these in platform_data.

Regards,

Tony
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Re: [PATCH] omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD

2010-12-06 Thread Tony Lindgren
* Chris Ball c...@laptop.org [101127 18:29]:
 Hi,
 
 On Sat, Nov 27, 2010 at 01:59:24AM +0200, Ohad Ben-Cohen wrote:
  This patch complements ed919b0 mmc: sdio: fix runtime PM anomalies by
  introducing MMC_CAP_POWER_OFF_CARD by declaring MMC_CAP_POWER_OFF_CARD
  on the ZOOM's wl1271 mmc slot.
  
  This is required in order not to break runtime PM support for the wl1271
  sdio driver.
  
  Signed-off-by: Ohad Ben-Cohen o...@wizery.com
 
 Looks good.  Tony, feel free to take this for .37 through your tree.
 
 Signed-off-by: Chris Ball c...@laptop.org

OK will merge thanks.

Tony
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Re: [PATCH] arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check

2010-12-06 Thread Tony Lindgren
* Vasiliy Kulikov seg...@openwall.com [101126 08:56]:
 clk_get() returns ERR_PTR() on error, not NULL.
 
 Signed-off-by: Vasiliy Kulikov seg...@openwall.com
 ---
  Cannot compile this driver, so it is not tested at all.

Thanks will merge this.

Tony

 
  arch/arm/plat-omap/counter_32k.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/arch/arm/plat-omap/counter_32k.c 
 b/arch/arm/plat-omap/counter_32k.c
 index 155fe43..c1e0d00 100644
 --- a/arch/arm/plat-omap/counter_32k.c
 +++ b/arch/arm/plat-omap/counter_32k.c
 @@ -164,7 +164,7 @@ static int __init omap_init_clocksource_32k(void)
   return -ENODEV;
  
   sync_32k_ick = clk_get(NULL, omap_32ksync_ick);
 - if (sync_32k_ick)
 + if (!IS_ERR(sync_32k_ick))
   clk_enable(sync_32k_ick);
  
   clocksource_32k.mult = clocksource_hz2mult(32768,
 -- 
 1.7.0.4
 
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[PATCH] OMAP2+: resolve section mismatch warnings in OMAP core code

2010-12-06 Thread Paul Walmsley

Resolve the following section mismatch warnings in the OMAP core code
when building omap2plus_defconfig:

WARNING: vmlinux.o(.text+0x2617c): Section mismatch in reference from the 
function zoom_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
WARNING: vmlinux.o(.text+0x26378): Section mismatch in reference from the 
function cm_t35_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
WARNING: vmlinux.o(.data+0x1f460): Section mismatch in reference from the 
variable h4_config to the (unknown reference) .init.data:(unknown)
WARNING: vmlinux.o(.data+0x1fc88): Section mismatch in reference from the 
variable sdp2430_config to the (unknown reference) .init.data:(unknown)
WARNING: vmlinux.o(.data+0x20258): Section mismatch in reference from the 
variable apollon_config to the (unknown reference) .init.data:(unknown)

Signed-off-by: Paul Walmsley p...@pwsan.com
---
 arch/arm/mach-omap2/board-2430sdp.c  |2 +-
 arch/arm/mach-omap2/board-apollon.c  |2 +-
 arch/arm/mach-omap2/board-cm-t35.c   |2 +-
 arch/arm/mach-omap2/board-h4.c   |2 +-
 arch/arm/mach-omap2/board-zoom-peripherals.c |6 +++---
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/board-2430sdp.c 
b/arch/arm/mach-omap2/board-2430sdp.c
index b527f8d..9ab8bb1 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -135,7 +135,7 @@ static inline void board_smc91x_init(void)
 
 #endif
 
-static struct omap_board_config_kernel sdp2430_config[] = {
+static struct omap_board_config_kernel sdp2430_config[] __initdata = {
{OMAP_TAG_LCD, sdp2430_lcd_config},
 };
 
diff --git a/arch/arm/mach-omap2/board-apollon.c 
b/arch/arm/mach-omap2/board-apollon.c
index 2c6db1a..5c432d8 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -270,7 +270,7 @@ static struct omap_lcd_config apollon_lcd_config __initdata 
= {
.ctrl_name  = internal,
 };
 
-static struct omap_board_config_kernel apollon_config[] = {
+static struct omap_board_config_kernel apollon_config[] __initdata = {
{ OMAP_TAG_LCD, apollon_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap2/board-cm-t35.c 
b/arch/arm/mach-omap2/board-cm-t35.c
index 63f764e..df16d69 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -594,7 +594,7 @@ static struct omap2_hsmmc_info mmc[] = {
{}  /* Terminator */
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
+static struct ehci_hcd_omap_platform_data ehci_pdata = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 929993b..5549f2c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -283,7 +283,7 @@ static struct omap_usb_config h4_usb_config __initdata = {
.hmc_mode   = 0x00, /* 0:dev|otg 1:disable 2:disable */
 };
 
-static struct omap_board_config_kernel h4_config[] = {
+static struct omap_board_config_kernel h4_config[] __initdata = {
{ OMAP_TAG_LCD, h4_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c 
b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 86c9b21..e58fe1e 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -196,7 +196,7 @@ struct wl12xx_platform_data omap_zoom_wlan_data __initdata 
= {
.board_ref_clock = 1,
 };
 
-static struct omap2_hsmmc_info mmc[] __initdata = {
+static struct omap2_hsmmc_info mmc[] = {
{
.name   = external,
.mmc= 1,
@@ -224,8 +224,8 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
{}  /* Terminator */
 };
 
-static int zoom_twl_gpio_setup(struct device *dev,
-   unsigned gpio, unsigned ngpio)
+static int zoom_twl_gpio_setup(struct device *dev, unsigned gpio,
+  unsigned ngpio)
 {
/* gpio + 0 is mmc0_cd (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
-- 
1.7.2.3

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[PATCH] MFD: TWL/TPS: fix twl_probe section mismatch warning in mfd/twl-core.c

2010-12-06 Thread Paul Walmsley

Fix the following section mismatch warning when building omap2plus_defconfig:

WARNING: vmlinux.o(.data+0x47d7c): Section mismatch in reference from the 
variable twl_driver to the function .init.text:twl_probe()

Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
 drivers/mfd/twl-core.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 35275ba..615cf38 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -969,7 +969,7 @@ static int twl_remove(struct i2c_client *client)
 }
 
 /* NOTE:  this driver only handles a single twl4030/tps659x0 chip */
-static int __init
+static int
 twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
int status;
-- 
1.7.2.3

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Re: [PATCH] OMAP2+: resolve section mismatch warnings in OMAP core code

2010-12-06 Thread Bryan Wu
Paul,

I did the similar patch several days ago.
https://patchwork.kernel.org/patch/367011/


On Tue, Dec 7, 2010 at 8:32 AM, Paul Walmsley p...@pwsan.com wrote:

 Resolve the following section mismatch warnings in the OMAP core code
 when building omap2plus_defconfig:

 WARNING: vmlinux.o(.text+0x2617c): Section mismatch in reference from the 
 function zoom_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
 WARNING: vmlinux.o(.text+0x26378): Section mismatch in reference from the 
 function cm_t35_twl_gpio_setup() to the (unknown reference) 
 .init.data:(unknown)
 WARNING: vmlinux.o(.data+0x1f460): Section mismatch in reference from the 
 variable h4_config to the (unknown reference) .init.data:(unknown)
 WARNING: vmlinux.o(.data+0x1fc88): Section mismatch in reference from the 
 variable sdp2430_config to the (unknown reference) .init.data:(unknown)
 WARNING: vmlinux.o(.data+0x20258): Section mismatch in reference from the 
 variable apollon_config to the (unknown reference) .init.data:(unknown)

 Signed-off-by: Paul Walmsley p...@pwsan.com
 ---
  arch/arm/mach-omap2/board-2430sdp.c          |    2 +-
  arch/arm/mach-omap2/board-apollon.c          |    2 +-
  arch/arm/mach-omap2/board-cm-t35.c           |    2 +-
  arch/arm/mach-omap2/board-h4.c               |    2 +-
  arch/arm/mach-omap2/board-zoom-peripherals.c |    6 +++---
  5 files changed, 7 insertions(+), 7 deletions(-)

 diff --git a/arch/arm/mach-omap2/board-2430sdp.c 
 b/arch/arm/mach-omap2/board-2430sdp.c
 index b527f8d..9ab8bb1 100644
 --- a/arch/arm/mach-omap2/board-2430sdp.c
 +++ b/arch/arm/mach-omap2/board-2430sdp.c
 @@ -135,7 +135,7 @@ static inline void board_smc91x_init(void)

  #endif

 -static struct omap_board_config_kernel sdp2430_config[] = {
 +static struct omap_board_config_kernel sdp2430_config[] __initdata = {
        {OMAP_TAG_LCD, sdp2430_lcd_config},
  };

 diff --git a/arch/arm/mach-omap2/board-apollon.c 
 b/arch/arm/mach-omap2/board-apollon.c
 index 2c6db1a..5c432d8 100644
 --- a/arch/arm/mach-omap2/board-apollon.c
 +++ b/arch/arm/mach-omap2/board-apollon.c
 @@ -270,7 +270,7 @@ static struct omap_lcd_config apollon_lcd_config 
 __initdata = {
        .ctrl_name      = internal,
  };

 -static struct omap_board_config_kernel apollon_config[] = {
 +static struct omap_board_config_kernel apollon_config[] __initdata = {
        { OMAP_TAG_LCD,         apollon_lcd_config },
  };

 diff --git a/arch/arm/mach-omap2/board-cm-t35.c 
 b/arch/arm/mach-omap2/board-cm-t35.c
 index 63f764e..df16d69 100644
 --- a/arch/arm/mach-omap2/board-cm-t35.c
 +++ b/arch/arm/mach-omap2/board-cm-t35.c
 @@ -594,7 +594,7 @@ static struct omap2_hsmmc_info mmc[] = {
        {}      /* Terminator */
  };

 -static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
 +static struct ehci_hcd_omap_platform_data ehci_pdata = {

How about move out the code of ehci init from cm_t35_twl_gpio_setup
like others did?

        .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
        .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
        .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
 diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
 index 929993b..5549f2c 100644
 --- a/arch/arm/mach-omap2/board-h4.c
 +++ b/arch/arm/mach-omap2/board-h4.c
 @@ -283,7 +283,7 @@ static struct omap_usb_config h4_usb_config __initdata = {
        .hmc_mode       = 0x00,         /* 0:dev|otg 1:disable 2:disable */
  };

 -static struct omap_board_config_kernel h4_config[] = {
 +static struct omap_board_config_kernel h4_config[] __initdata = {
        { OMAP_TAG_LCD,         h4_lcd_config },
  };

 diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c 
 b/arch/arm/mach-omap2/board-zoom-peripherals.c
 index 86c9b21..e58fe1e 100644
 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c
 +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
 @@ -196,7 +196,7 @@ struct wl12xx_platform_data omap_zoom_wlan_data 
 __initdata = {
        .board_ref_clock = 1,
  };

 -static struct omap2_hsmmc_info mmc[] __initdata = {
 +static struct omap2_hsmmc_info mmc[] = {
        {
                .name           = external,
                .mmc            = 1,
 @@ -224,8 +224,8 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
        {}      /* Terminator */
  };

 -static int zoom_twl_gpio_setup(struct device *dev,
 -               unsigned gpio, unsigned ngpio)
 +static int zoom_twl_gpio_setup(struct device *dev, unsigned gpio,
 +                              unsigned ngpio)
  {
        /* gpio + 0 is mmc0_cd (input/IRQ) */
        mmc[0].gpio_cd = gpio + 0;
 --
 1.7.2.3

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-- 
Bryan Wu bryan...@canonical.com
Kernel Developer    +86.138-1617-6545 Mobile
Ubuntu Kernel Team
Canonical Ltd.      www.canonical.com
Ubuntu - Linux for human beings | www.ubuntu.com
--
To 

Re: [PATCH] OMAP2+: resolve section mismatch warnings in OMAP core code

2010-12-06 Thread Paul Walmsley
On Tue, 7 Dec 2010, Bryan Wu wrote:

 Paul,
 
 I did the similar patch several days ago.
 https://patchwork.kernel.org/patch/367011/

Great, thanks Bryan, in that case yours should be used instead.

- Paul
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Re: [PATCH] MFD: TWL/TPS: fix twl_probe section mismatch warning in mfd/twl-core.c

2010-12-06 Thread Paul Walmsley
On Tue, 7 Dec 2010, Bryan Wu wrote:

 On Tue, Dec 7, 2010 at 8:35 AM, Paul Walmsley p...@pwsan.com wrote:
 
  Fix the following section mismatch warning when building 
  omap2plus_defconfig:
 
  WARNING: vmlinux.o(.data+0x47d7c): Section mismatch in reference from the 
  variable twl_driver to the function .init.text:twl_probe()
 
  Signed-off-by: Paul Walmsley p...@pwsan.com
  Cc: Samuel Ortiz sa...@linux.intel.com
  ---
   drivers/mfd/twl-core.c |    2 +-
   1 files changed, 1 insertions(+), 1 deletions(-)
 
  diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
  index 35275ba..615cf38 100644
  --- a/drivers/mfd/twl-core.c
  +++ b/drivers/mfd/twl-core.c
  @@ -969,7 +969,7 @@ static int twl_remove(struct i2c_client *client)
   }
 
   /* NOTE:  this driver only handles a single twl4030/tps659x0 chip */
  -static int __init
  +static int
 
 I think we might change __init to __devinit.
 
   twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
   {
         int                             status;
  --

That's fine with me.  Samuel et al, Bryan's already done a patch 
for this stuff:

https://patchwork.kernel.org/patch/367011/

so we should use that instead, if you're happy with it.  Samuel, maybe we 
could get an ack from you on it?


- Paul

[PATCH 06/14] OMAP4: powerdomain: Add pwrdm_clear_all_prev_pwrst

2010-12-06 Thread Paul Walmsley
From: Santosh Shilimkar santosh.shilim...@ti.com

Like OMAP3, OMAP4430 ES2 has additional bitfields in PWRSTST register
which help identify the previous power state entered by the
powerdomain.  Add pwrdm_clear_all_prev_pwrst to the OMAP4 powerdomains
implementation to support this.

Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
[p...@pwsan.com: clarified commit message]
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
 arch/arm/mach-omap2/powerdomain44xx.c |9 +
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomain44xx.c 
b/arch/arm/mach-omap2/powerdomain44xx.c
index 123a25f..2903c7c 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -55,6 +55,14 @@ static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain 
*pwrdm)
return 0;
 }
 
+static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
+{
+   prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
+   OMAP4430_LASTPOWERSTATEENTERED_MASK,
+   pwrdm-prcm_offs, OMAP4_PM_PWSTST);
+   return 0;
+}
+
 static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
 {
u32 v;
@@ -155,6 +163,7 @@ struct pwrdm_ops omap4_pwrdm_operations = {
.pwrdm_read_pwrst   = omap4_pwrdm_read_pwrst,
.pwrdm_read_prev_pwrst  = omap4_pwrdm_read_prev_pwrst,
.pwrdm_set_lowpwrstchange   = omap4_pwrdm_set_lowpwrstchange,
+   .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst,
.pwrdm_set_logic_retst  = omap4_pwrdm_set_logic_retst,
.pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
.pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,


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[PATCH 01/14] OMAP: powerdomain: Move static allocations from powerdomains.h to a .c file

2010-12-06 Thread Paul Walmsley
From: Rajendra Nayak rna...@t.com

powerdomains.h header today has only static definitions.  Adding any
function declarations into it and including it in multiple source file
is expected to cause issues.  Hence move all the static definitions
from powerdomains.h file into powerdomains_data.c file.

Also, create a new powerdomain section of the mach-omap2/Makefile, and
rearrange the prcm-common part of the Makefile, now that the
powerdomain code is in its own Makefile section.

Signed-off-by: Rajendra Nayak rna...@ti.com
[p...@pwsan.com: rearrange Makefile changes, tweaked commit message]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
 arch/arm/mach-omap2/Makefile  |   17 ++---
 arch/arm/mach-omap2/clockdomains.h|5 +
 arch/arm/mach-omap2/io.c  |3 +--
 arch/arm/mach-omap2/powerdomains_data.c   |   10 +-
 arch/arm/plat-omap/include/plat/powerdomain.h |1 +
 5 files changed, 22 insertions(+), 14 deletions(-)
 rename arch/arm/mach-omap2/{powerdomains.h = powerdomains_data.c} (97%)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 60e51bc..ddc0a6f 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -9,14 +9,13 @@ obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o 
timer-gp.o pm.o \
 omap-2-3-common= irq.o sdrc.o prm2xxx_3xxx.o
 hwmod-common   = omap_hwmod.o \
  omap_hwmod_common_data.o
-prcm-common= prcm.o powerdomain.o
 clock-common   = clock.o clock_common_data.o \
  clockdomain.o clkt_dpll.o \
  clkt_clksel.o
 
-obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(hwmod-common)
-obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(hwmod-common)
-obj-$(CONFIG_ARCH_OMAP4) += $(prcm-common) prm44xx.o $(hwmod-common)
+obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
+obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common)
+obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common)
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
@@ -65,9 +64,13 @@ endif
 endif
 
 # PRCM
-obj-$(CONFIG_ARCH_OMAP2)   += cm.o
-obj-$(CONFIG_ARCH_OMAP3)   += cm.o
-obj-$(CONFIG_ARCH_OMAP4)   += cm4xxx.o
+obj-$(CONFIG_ARCH_OMAP2)   += prcm.o cm.o
+obj-$(CONFIG_ARCH_OMAP3)   += prcm.o cm.o
+obj-$(CONFIG_ARCH_OMAP4)   += prcm.o cm4xxx.o
+
+# OMAP powerdomain framework
+powerdomain-common += powerdomain.o powerdomains_data.o
+obj-y  += $(powerdomain-common)
 
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common) clock2xxx.o \
diff --git a/arch/arm/mach-omap2/clockdomains.h 
b/arch/arm/mach-omap2/clockdomains.h
index 8fc19ff..2a3b10a 100644
--- a/arch/arm/mach-omap2/clockdomains.h
+++ b/arch/arm/mach-omap2/clockdomains.h
@@ -38,6 +38,11 @@
 #include plat/clockdomain.h
 #include cm.h
 #include prm.h
+#include cm-regbits-24xx.h
+#include cm-regbits-34xx.h
+#include cm-regbits-44xx.h
+#include prm-regbits-24xx.h
+#include prm-regbits-34xx.h
 
 /*
  * Clockdomain dependencies for wkdeps/sleepdeps
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 40562dd..b5b385d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -40,7 +40,6 @@
 
 #include plat/omap-pm.h
 #include plat/powerdomain.h
-#include powerdomains.h
 
 #include plat/clockdomain.h
 #include clockdomains.h
@@ -316,7 +315,7 @@ void __init omap2_init_common_hw(struct omap_sdrc_params 
*sdrc_cs0,
 {
u8 skip_setup_idle = 0;
 
-   pwrdm_init(powerdomains_omap);
+   pwrdm_fw_init();
clkdm_init(clockdomains_omap, clkdm_autodeps);
if (cpu_is_omap242x())
omap2420_hwmod_init();
diff --git a/arch/arm/mach-omap2/powerdomains.h 
b/arch/arm/mach-omap2/powerdomains_data.c
similarity index 97%
rename from arch/arm/mach-omap2/powerdomains.h
rename to arch/arm/mach-omap2/powerdomains_data.c
index 105cbca..475763e 100644
--- a/arch/arm/mach-omap2/powerdomains.h
+++ b/arch/arm/mach-omap2/powerdomains_data.c
@@ -18,9 +18,6 @@
  *Clock Domain Framework
  */
 
-#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS
-#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS
-
 /*
  * This file contains all of the powerdomains that have some element
  * of software control for the OMAP24xx and OMAP34xx chips.
@@ -49,6 +46,7 @@
  * address offset is different between the C55 and C64 DSPs.
  */
 
+#include linux/init.h
 #include plat/powerdomain.h
 
 #include prcm-common.h
@@ -149,5 +147,7 @@ static struct powerdomain *powerdomains_omap[] __initdata = 
{
NULL
 };
 
-
-#endif
+void pwrdm_fw_init(void)
+{
+   pwrdm_init(powerdomains_omap);
+}
diff --git 

[PATCH 09/14] OMAP3: control/PRCM: add omap3_ctrl_write_boot_mode()

2010-12-06 Thread Paul Walmsley
Get rid of the open-coded scratchpad write in mach-omap2/prcm.c and
replace it with an actual API, omap3_ctrl_write_boot_mode().  While
there, get rid of the gratuitous omap_writel().

There's not much documentation available for what should wind up in
the scratchpad here, so more documentation would be appreciated.
Also, at some point, we should formalize our treatment of the scratchpad;
right now, accesses to the scratchpad are not well-documented.

Signed-off-by: Paul Walmsley p...@pwsan.com
---
 arch/arm/mach-omap2/control.c |   31 +++
 arch/arm/mach-omap2/control.h |1 +
 arch/arm/mach-omap2/prcm.c|   10 +-
 3 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 1fa3294..9fda3d7 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -209,6 +209,37 @@ void omap4_ctrl_pad_writel(u32 val, u16 offset)
__raw_writel(val, OMAP4_CTRL_PAD_REGADDR(offset));
 }
 
+#ifdef CONFIG_ARCH_OMAP3
+
+/**
+ * omap3_ctrl_write_boot_mode - set scratchpad boot mode for the next boot
+ * @bootmode: 8-bit value to pass to some boot code
+ *
+ * Set the bootmode in the scratchpad RAM.  This is used after the
+ * system restarts.  Not sure what actually uses this - it may be the
+ * bootloader, rather than the boot ROM - contrary to the preserved
+ * comment below.  No return value.
+ */
+void omap3_ctrl_write_boot_mode(u8 bootmode)
+{
+   u32 l;
+
+   l = ('B'  24) | ('M'  16) | bootmode;
+
+   /*
+* Reserve the first word in scratchpad for communicating
+* with the boot ROM. A pointer to a data structure
+* describing the boot process can be stored there,
+* cf. OMAP34xx TRM, Initialization / Software Booting
+* Configuration.
+*
+* XXX This should use some omap_ctrl_writel()-type function
+*/
+   __raw_writel(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4));
+}
+
+#endif
+
 #if defined(CONFIG_ARCH_OMAP3)  defined(CONFIG_PM)
 /*
  * Clears the scratchpad contents in case of cold boot-
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index b6c6b7c..a9325ad 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -350,6 +350,7 @@ extern u32 *get_es3_restore_pointer(void);
 extern u32 omap3_arm_context[128];
 extern void omap3_control_save_context(void);
 extern void omap3_control_restore_context(void);
+extern void omap3_ctrl_write_boot_mode(u8 bootmode);
 
 #else
 #define omap_ctrl_base_get()   0
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index a51846e..2eca847 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -143,16 +143,8 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
 
prcm_offs = WKUP_MOD;
} else if (cpu_is_omap34xx()) {
-   u32 l;
-
prcm_offs = OMAP3430_GR_MOD;
-   l = ('B'  24) | ('M'  16) | (cmd ? (u8)*cmd : 0);
-   /* Reserve the first word in scratchpad for communicating
-* with the boot ROM. A pointer to a data structure
-* describing the boot process can be stored there,
-* cf. OMAP34xx TRM, Initialization / Software Booting
-* Configuration. */
-   omap_writel(l, OMAP343X_SCRATCHPAD + 4);
+   omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
} else if (cpu_is_omap44xx())
prcm_offs = OMAP4430_PRM_DEVICE_MOD;
else


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[PATCH 02/14] OMAP: powerdomain: Infrastructure to put arch specific code

2010-12-06 Thread Paul Walmsley
From: Rajendra Nayak rna...@ti.com

Put infrastructure in place, so arch specific func pointers
can be hooked up to the platform-independent part of the
framework.
This is in preparation of splitting the powerdomain framework into
platform-independent part (for all omaps) and platform-specific
parts.

Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
 arch/arm/mach-omap2/powerdomain.c |   11 +-
 arch/arm/mach-omap2/powerdomains_data.c   |2 +
 arch/arm/plat-omap/include/plat/powerdomain.h |   43 -
 3 files changed, 52 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomain.c 
b/arch/arm/mach-omap2/powerdomain.c
index 6527ec3..3aa3eb3 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -80,6 +80,8 @@ static u16 pwrstst_reg_offs;
 /* pwrdm_list contains all registered struct powerdomains */
 static LIST_HEAD(pwrdm_list);
 
+static struct pwrdm_ops *arch_pwrdm;
+
 /* Private functions */
 
 static struct powerdomain *_pwrdm_lookup(const char *name)
@@ -211,6 +213,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain 
*pwrdm, void *unused)
 /**
  * pwrdm_init - set up the powerdomain layer
  * @pwrdm_list: array of struct powerdomain pointers to register
+ * @custom_funcs: func pointers for arch specfic implementations
  *
  * Loop through the array of powerdomains @pwrdm_list, registering all
  * that are available on the current CPU. If pwrdm_list is supplied
@@ -218,7 +221,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain 
*pwrdm, void *unused)
  * registered.  No return value.  XXX pwrdm_list is not really a
  * list; it is an array.  Rename appropriately.
  */
-void pwrdm_init(struct powerdomain **pwrdm_list)
+void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops 
*custom_funcs)
 {
struct powerdomain **p = NULL;
 
@@ -234,6 +237,11 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
return;
}
 
+   if (!custom_funcs)
+   WARN(1, powerdomain: No custom pwrdm functions registered\n);
+   else
+   arch_pwrdm = custom_funcs;
+
if (pwrdm_list) {
for (p = pwrdm_list; *p; p++)
_pwrdm_register(*p);
@@ -1074,4 +1082,3 @@ int pwrdm_post_transition(void)
pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
return 0;
 }
-
diff --git a/arch/arm/mach-omap2/powerdomains_data.c 
b/arch/arm/mach-omap2/powerdomains_data.c
index 475763e..bf5b39b 100644
--- a/arch/arm/mach-omap2/powerdomains_data.c
+++ b/arch/arm/mach-omap2/powerdomains_data.c
@@ -149,5 +149,5 @@ static struct powerdomain *powerdomains_omap[] __initdata = 
{
 
 void pwrdm_fw_init(void)
 {
-   pwrdm_init(powerdomains_omap);
+   pwrdm_init(powerdomains_omap, NULL);
 }
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h 
b/arch/arm/plat-omap/include/plat/powerdomain.h
index e322b39..583758c 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -117,9 +117,50 @@ struct powerdomain {
 #endif
 };
 
+/**
+ * struct pwrdm_ops - Arch specfic function implementations
+ * @pwrdm_set_next_pwrst: Set the target power state for a pd
+ * @pwrdm_read_next_pwrst: Read the target power state set for a pd
+ * @pwrdm_read_pwrst: Read the current power state of a pd
+ * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
+ * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
+ * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
+ * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
+ * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
+ * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
+ * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
+ * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
+ * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
+ * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
+ * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
+ * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
+ * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
+ * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep 
sleep
+ * @pwrdm_wait_transition: Wait for a pd state transition to complete
+ */
+struct pwrdm_ops {
+   int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
+   int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
+   int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
+   int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
+   int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
+   int 

[PATCH 07/14] OMAP2+: powerdomains: move powerdomain static data to .c files

2010-12-06 Thread Paul Walmsley
Static data should be declared in .c files, not .h files.  It should be
possible to #include .h files at any point without creating multiple
copies of the same data.

We converted the clock data to .c files some time ago.  This patch does
the same for the powerdomain data.

Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
 arch/arm/mach-omap2/Makefile |   13 +-
 arch/arm/mach-omap2/io.c |   19 ++-
 arch/arm/mach-omap2/powerdomain2xxx_3xxx.c   |7 +
 arch/arm/mach-omap2/powerdomain44xx.c|1 
 arch/arm/mach-omap2/powerdomains.h   |9 +
 arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c |   81 +++
 arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h |   22 +++
 arch/arm/mach-omap2/powerdomains2xxx_data.c  |   43 --
 arch/arm/mach-omap2/powerdomains3xxx_data.c  |   43 --
 arch/arm/mach-omap2/powerdomains44xx_data.c  |   33 -
 arch/arm/mach-omap2/powerdomains_data.c  |  159 --
 arch/arm/plat-omap/include/plat/powerdomain.h|   13 +-
 12 files changed, 234 insertions(+), 209 deletions(-)
 create mode 100644 arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
 create mode 100644 arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.h
 rename arch/arm/mach-omap2/{powerdomains24xx.h = powerdomains2xxx_data.c} 
(78%)
 rename arch/arm/mach-omap2/{powerdomains34xx.h = powerdomains3xxx_data.c} 
(89%)
 rename arch/arm/mach-omap2/{powerdomains44xx.h = powerdomains44xx_data.c} 
(93%)
 delete mode 100644 arch/arm/mach-omap2/powerdomains_data.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b5c4fe8..609fa78 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -69,13 +69,18 @@ obj-$(CONFIG_ARCH_OMAP3)+= prcm.o cm.o
 obj-$(CONFIG_ARCH_OMAP4)   += prcm.o cm4xxx.o
 
 # OMAP powerdomain framework
-powerdomain-common += powerdomain.o powerdomains_data.o 
powerdomain-common.o
+powerdomain-common += powerdomain.o powerdomain-common.o
 obj-$(CONFIG_ARCH_OMAP2)   += $(powerdomain-common) \
-  powerdomain2xxx_3xxx.o
+  powerdomain2xxx_3xxx.o \
+  powerdomains2xxx_data.o \
+  powerdomains2xxx_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(powerdomain-common) \
-  powerdomain2xxx_3xxx.o
+  powerdomain2xxx_3xxx.o \
+  powerdomains3xxx_data.o \
+  powerdomains2xxx_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(powerdomain-common) \
-  powerdomain44xx.o
+  powerdomain44xx.o \
+  powerdomains44xx_data.o
 
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common) clock2xxx.o \
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index b5b385d..6336044 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -315,16 +315,23 @@ void __init omap2_init_common_hw(struct omap_sdrc_params 
*sdrc_cs0,
 {
u8 skip_setup_idle = 0;
 
-   pwrdm_fw_init();
-   clkdm_init(clockdomains_omap, clkdm_autodeps);
-   if (cpu_is_omap242x())
+   if (cpu_is_omap242x()) {
+   omap2xxx_powerdomains_init();
+   clkdm_init(clockdomains_omap, clkdm_autodeps);
omap2420_hwmod_init();
-   else if (cpu_is_omap243x())
+   } else if (cpu_is_omap243x()) {
+   omap2xxx_powerdomains_init();
+   clkdm_init(clockdomains_omap, clkdm_autodeps);
omap2430_hwmod_init();
-   else if (cpu_is_omap34xx())
+   } else if (cpu_is_omap34xx()) {
+   omap3xxx_powerdomains_init();
+   clkdm_init(clockdomains_omap, clkdm_autodeps);
omap3xxx_hwmod_init();
-   else if (cpu_is_omap44xx())
+   } else if (cpu_is_omap44xx()) {
+   omap44xx_powerdomains_init();
+   clkdm_init(clockdomains_omap, clkdm_autodeps);
omap44xx_hwmod_init();
+   }
 
/* The OPP tables have to be registered before a clk init */
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c 
b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index 6cdf678..838ac75 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -15,10 +15,15 @@
 #include linux/io.h
 #include linux/errno.h
 #include linux/delay.h
+
 #include plat/prcm.h
-#include prm.h
+
 #include prm-regbits-34xx.h
 #include 

[PATCH 03/14] OMAP: powerdomain: Arch specific funcs for state control

2010-12-06 Thread Paul Walmsley
From: Rajendra Nayak rna...@ti.com

Define the following architecture specific funtions for omap2/3/4
.pwrdm_set_next_pwrst
.pwrdm_read_next_pwrst
.pwrdm_read_pwrst
.pwrdm_read_prev_pwrst

Convert the platform-independent framework to call these functions.

Signed-off-by: Rajendra Nayak rna...@ti.com
[p...@pwsan.com: remove remaining static allocations in powerdomains.h file;
 remove path in file header comments, rearranged Makefile changes]
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
 arch/arm/mach-omap2/Makefile   |7 +++
 arch/arm/mach-omap2/powerdomain.c  |   33 ++-
 arch/arm/mach-omap2/powerdomain2xxx_3xxx.c |   62 
 arch/arm/mach-omap2/powerdomain44xx.c  |   55 +
 arch/arm/mach-omap2/powerdomains.h |   22 ++
 arch/arm/mach-omap2/powerdomains_data.c|8 +++-
 6 files changed, 175 insertions(+), 12 deletions(-)
 create mode 100644 arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
 create mode 100644 arch/arm/mach-omap2/powerdomain44xx.c
 create mode 100644 arch/arm/mach-omap2/powerdomains.h

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ddc0a6f..f8dcaf8 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -70,7 +70,12 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm4xxx.o
 
 # OMAP powerdomain framework
 powerdomain-common += powerdomain.o powerdomains_data.o
-obj-y  += $(powerdomain-common)
+obj-$(CONFIG_ARCH_OMAP2)   += $(powerdomain-common) \
+  powerdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)   += $(powerdomain-common) \
+  powerdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP4)   += $(powerdomain-common) \
+  powerdomain44xx.o
 
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common) clock2xxx.o \
diff --git a/arch/arm/mach-omap2/powerdomain.c 
b/arch/arm/mach-omap2/powerdomain.c
index 3aa3eb3..0ae1ebf 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -439,6 +439,8 @@ int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
  */
 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
@@ -448,11 +450,10 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 
pwrst)
pr_debug(powerdomain: setting next powerstate for %s to %0x\n,
 pwrdm-name, pwrst);
 
-   prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
-(pwrst  OMAP_POWERSTATE_SHIFT),
-pwrdm-prcm_offs, pwrstctrl_reg_offs);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_set_next_pwrst)
+   ret = arch_pwrdm-pwrdm_set_next_pwrst(pwrdm, pwrst);
 
-   return 0;
+   return ret;
 }
 
 /**
@@ -465,11 +466,15 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 
pwrst)
  */
 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
-   return prm_read_mod_bits_shift(pwrdm-prcm_offs,
-pwrstctrl_reg_offs, OMAP_POWERSTATE_MASK);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_read_next_pwrst)
+   ret = arch_pwrdm-pwrdm_read_next_pwrst(pwrdm);
+
+   return ret;
 }
 
 /**
@@ -482,11 +487,15 @@ int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
  */
 int pwrdm_read_pwrst(struct powerdomain *pwrdm)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
-   return prm_read_mod_bits_shift(pwrdm-prcm_offs,
-pwrstst_reg_offs, OMAP_POWERSTATEST_MASK);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_read_pwrst)
+   ret = arch_pwrdm-pwrdm_read_pwrst(pwrdm);
+
+   return ret;
 }
 
 /**
@@ -499,11 +508,15 @@ int pwrdm_read_pwrst(struct powerdomain *pwrdm)
  */
 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
-   return prm_read_mod_bits_shift(pwrdm-prcm_offs, OMAP3430_PM_PREPWSTST,
-   OMAP3430_LASTPOWERSTATEENTERED_MASK);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_read_prev_pwrst)
+   ret = arch_pwrdm-pwrdm_read_prev_pwrst(pwrdm);
+
+   return ret;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c 
b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
new file mode 100644
index 000..a25dd64
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -0,0 +1,62 @@
+/*
+ * OMAP2 and OMAP3 powerdomain control
+ *
+ * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009 Nokia Corporation
+ *
+ * 

[PATCH 04/14] OMAP: powerdomain: Arch specific funcs for logic control

2010-12-06 Thread Paul Walmsley
From: Rajendra Nayak rna...@ti.com

Define the following architecture specific funtions for omap2/3/4
.pwrdm_set_logic_retst
.pwrdm_read_logic_pwrst
.pwrdm_read_prev_logic_pwrst
.pwrdm_read_logic_retst

Convert the platform-independent framework to call these functions.

Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
 arch/arm/mach-omap2/powerdomain.c  |   51 
 arch/arm/mach-omap2/powerdomain2xxx_3xxx.c |   34 +++
 arch/arm/mach-omap2/powerdomain44xx.c  |   26 ++
 3 files changed, 82 insertions(+), 29 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomain.c 
b/arch/arm/mach-omap2/powerdomain.c
index 0ae1ebf..562a3fe 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -532,7 +532,7 @@ int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
  */
 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
 {
-   u32 v;
+   int ret = -EINVAL;
 
if (!pwrdm)
return -EINVAL;
@@ -543,17 +543,10 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 
pwrst)
pr_debug(powerdomain: setting next logic powerstate for %s to %0x\n,
 pwrdm-name, pwrst);
 
-   /*
-* The register bit names below may not correspond to the
-* actual names of the bits in each powerdomain's register,
-* but the type of value returned is the same for each
-* powerdomain.
-*/
-   v = pwrst  __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK);
-   prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
-pwrdm-prcm_offs, pwrstctrl_reg_offs);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_set_logic_retst)
+   ret = arch_pwrdm-pwrdm_set_logic_retst(pwrdm, pwrst);
 
-   return 0;
+   return ret;
 }
 
 /**
@@ -696,11 +689,15 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 
bank, u8 pwrst)
  */
 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
-   return prm_read_mod_bits_shift(pwrdm-prcm_offs, pwrstst_reg_offs,
-  OMAP3430_LOGICSTATEST_MASK);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_read_logic_pwrst)
+   ret = arch_pwrdm-pwrdm_read_logic_pwrst(pwrdm);
+
+   return ret;
 }
 
 /**
@@ -713,17 +710,15 @@ int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
  */
 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
-   /*
-* The register bit names below may not correspond to the
-* actual names of the bits in each powerdomain's register,
-* but the type of value returned is the same for each
-* powerdomain.
-*/
-   return prm_read_mod_bits_shift(pwrdm-prcm_offs, OMAP3430_PM_PREPWSTST,
-   OMAP3430_LASTLOGICSTATEENTERED_MASK);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_read_prev_logic_pwrst)
+   ret = arch_pwrdm-pwrdm_read_prev_logic_pwrst(pwrdm);
+
+   return ret;
 }
 
 /**
@@ -736,17 +731,15 @@ int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
  */
 int pwrdm_read_logic_retst(struct powerdomain *pwrdm)
 {
+   int ret = -EINVAL;
+
if (!pwrdm)
return -EINVAL;
 
-   /*
-* The register bit names below may not correspond to the
-* actual names of the bits in each powerdomain's register,
-* but the type of value returned is the same for each
-* powerdomain.
-*/
-   return prm_read_mod_bits_shift(pwrdm-prcm_offs, pwrstctrl_reg_offs,
-  OMAP3430_LOGICSTATEST_MASK);
+   if (arch_pwrdm  arch_pwrdm-pwrdm_read_logic_retst)
+   ret = arch_pwrdm-pwrdm_read_logic_retst(pwrdm);
+
+   return ret;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c 
b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index a25dd64..b7ea191 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -41,6 +41,17 @@ static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
OMAP2_PM_PWSTST, OMAP_POWERSTATEST_MASK);
 }
 
+static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
+{
+   u32 v;
+
+   v = pwrst  __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK);
+   prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
+   pwrdm-prcm_offs, OMAP2_PM_PWSTCTRL);
+
+   return 0;
+}
+
 /* Applicable only for OMAP3. Not supported on OMAP2 */
 static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
 {
@@ -48,10 +59,29 @@ static int omap3_pwrdm_read_prev_pwrst(struct powerdomain 
*pwrdm)
 

[PATCH 10/14] OMAP3: control/PRCM: move CONTROL_PADCONF_SYS_NIRQ save/restore to SCM code

2010-12-06 Thread Paul Walmsley
For some reason, the PRCM context save/restore code also saves and
restores a single System Control Module register,
CONTROL_PADCONF_SYS_NIRQ.  This is probably just an error -- the
register should be handled by SCM code -- so this patch moves it
there.

If this register really does need to be saved and restored before the
rest of the PRCM registers, the code to do so should live in the SCM
code, and the PM code should call this separate function.  This
register pertains to devices with a stacked modem, so this patch is
unlikely to affect most OMAP devices out there.

Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
 arch/arm/mach-omap2/control.c |5 +
 arch/arm/mach-omap2/prcm.c|5 -
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 9fda3d7..b260e1b 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -134,6 +134,7 @@ struct omap3_control_regs {
u32 sramldo4;
u32 sramldo5;
u32 csi;
+   u32 padconf_sys_nirq;
 };
 
 static struct omap3_control_regs control_context;
@@ -447,6 +448,8 @@ void omap3_control_save_context(void)
control_context.sramldo4 = omap_ctrl_readl(OMAP343X_CONTROL_SRAMLDO4);
control_context.sramldo5 = omap_ctrl_readl(OMAP343X_CONTROL_SRAMLDO5);
control_context.csi = omap_ctrl_readl(OMAP343X_CONTROL_CSI);
+   control_context.padconf_sys_nirq =
+   omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ);
return;
 }
 
@@ -503,6 +506,8 @@ void omap3_control_restore_context(void)
omap_ctrl_writel(control_context.sramldo4, OMAP343X_CONTROL_SRAMLDO4);
omap_ctrl_writel(control_context.sramldo5, OMAP343X_CONTROL_SRAMLDO5);
omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI);
+   omap_ctrl_writel(control_context.padconf_sys_nirq,
+OMAP343X_CONTROL_PADCONF_SYSNIRQ);
return;
 }
 #endif /* CONFIG_ARCH_OMAP3  CONFIG_PM */
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 2eca847..d27cdba 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -42,7 +42,6 @@ static void __iomem *cm2_base;
 #define MAX_MODULE_ENABLE_WAIT 10
 
 struct omap3_prcm_regs {
-   u32 control_padconf_sys_nirq;
u32 iva2_cm_clksel1;
u32 iva2_cm_clksel2;
u32 cm_sysconfig;
@@ -312,8 +311,6 @@ void __init omap2_set_globals_prcm(struct omap_globals 
*omap2_globals)
 #ifdef CONFIG_ARCH_OMAP3
 void omap3_prcm_save_context(void)
 {
-   prcm_context.control_padconf_sys_nirq =
-omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ);
prcm_context.iva2_cm_clksel1 =
 cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
prcm_context.iva2_cm_clksel2 =
@@ -466,8 +463,6 @@ void omap3_prcm_save_context(void)
 
 void omap3_prcm_restore_context(void)
 {
-   omap_ctrl_writel(prcm_context.control_padconf_sys_nirq,
-OMAP343X_CONTROL_PADCONF_SYSNIRQ);
cm_write_mod_reg(prcm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
 CM_CLKSEL1);
cm_write_mod_reg(prcm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,


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[PATCH 00/14] OMAP: PRCM/powerdomain/clockdomain patches for 2.6.38, part one

2010-12-06 Thread Paul Walmsley
This patch series, intended for 2.6.38:

- includes Rajendra's powerdomain changes to add OMAP4 support;

- allocates static powerdomain and clockdomain data in C files
  rather than header files (long overdue);

- begins the process of cleaning up mach-omap2/prcm.c;

- splits the OMAP4 PRCM header files into per-hwmod or per-PRCM partition
  files;

- renames the OMAP4 PRCM *_MOD macros to *_INST so the names actually have
  some meaning in regards to the hardware;

- moves the OMAP2/3-specific PRCM functions into OMAP2/3-specific files, in
  preparation for creating OMAP4-specific versions;

- moves the CM context save/restore file to CM-specific code, and
  removes the PRM context save/restore code - which should save a few
  microseconds in the off-mode save/restore path.

The series applies on top of v2.6.37-rc4.  It is available via git from
git://git.pwsan.com/linux-2.6 in the branch 'pwrdm_prcm_a_2.6.38'.

Kevin, I'd appreciate review and acks, if appropriate, on the patches
that touch code that you maintain.  Rajendra, Santosh, I've made some
minor changes to your patches; if you have the chance you might want
to take a look and comment if necessary.

Boot-tested on N800, OMAP35xx Beagle, and OMAP4430ES2 Panda.

A followup series that builds on this one will be sent tomorrow.


- Paul

---

pwrdm_prcm_a_2.6.38
   textdata bss dec hex filename
5707592  473984 5608864 11790440 b3e868 vmlinux.orig
5709988  473952 5608800 11792740 b3f164 vmlinux.patched

Paul Walmsley (8):
  OMAP2+: powerdomains: move powerdomain static data to .c files
  OMAP2+: clockdomains: move clockdomain static data to .c files
  OMAP3: control/PRCM: add omap3_ctrl_write_boot_mode()
  OMAP3: control/PRCM: move CONTROL_PADCONF_SYS_NIRQ save/restore to SCM 
code
  OMAP4: PRCM: reorganize existing OMAP4 PRCM header files
  OMAP4: PRCM: rename _MOD macros to _INST
  OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific 
files
  OMAP3: PRM/CM: separate CM context save/restore; remove PRM context 
save/restore

Rajendra Nayak (5):
  OMAP: powerdomain: Move static allocations from powerdomains.h to a .c 
file
  OMAP: powerdomain: Infrastructure to put arch specific code
  OMAP: powerdomain: Arch specific funcs for state control
  OMAP: powerdomain: Arch specific funcs for logic control
  OMAP: powerdomain: Arch specific funcs for mem control

Santosh Shilimkar (1):
  OMAP4: powerdomain: Add pwrdm_clear_all_prev_pwrst


 arch/arm/mach-omap2/Makefile |   44 +
 arch/arm/mach-omap2/clkt2xxx_apll.c  |2 
 arch/arm/mach-omap2/clkt2xxx_dpllcore.c  |2 
 arch/arm/mach-omap2/clkt2xxx_osc.c   |2 
 arch/arm/mach-omap2/clkt2xxx_sys.c   |2 
 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c |2 
 arch/arm/mach-omap2/clkt_dpll.c  |1 
 arch/arm/mach-omap2/clock.c  |4 
 arch/arm/mach-omap2/clock2420_data.c |4 
 arch/arm/mach-omap2/clock2430.c  |2 
 arch/arm/mach-omap2/clock2430_data.c |4 
 arch/arm/mach-omap2/clock34xx.c  |2 
 arch/arm/mach-omap2/clock3517.c  |2 
 arch/arm/mach-omap2/clock3xxx.c  |4 
 arch/arm/mach-omap2/clock3xxx_data.c |4 
 arch/arm/mach-omap2/clock44xx_data.c |   10 
 arch/arm/mach-omap2/clockdomain.c|5 
 arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c |   67 --
 arch/arm/mach-omap2/clockdomains44xx_data.c  |   46 +
 arch/arm/mach-omap2/cm-regbits-24xx.h|2 
 arch/arm/mach-omap2/cm-regbits-34xx.h|2 
 arch/arm/mach-omap2/cm-regbits-44xx.h|3 
 arch/arm/mach-omap2/cm.c |   68 --
 arch/arm/mach-omap2/cm.h |  137 
 arch/arm/mach-omap2/cm1_44xx.h   |  251 +++
 arch/arm/mach-omap2/cm2_44xx.h   |  648 +++
 arch/arm/mach-omap2/cm2xxx_3xxx.c|  393 
 arch/arm/mach-omap2/cm2xxx_3xxx.h|   70 +-
 arch/arm/mach-omap2/cm44xx.h |  668 
 arch/arm/mach-omap2/cm4xxx.c |2 
 arch/arm/mach-omap2/control.c|   40 +
 arch/arm/mach-omap2/control.h|1 
 arch/arm/mach-omap2/dpll3xxx.c   |4 
 arch/arm/mach-omap2/dsp.c|9 
 arch/arm/mach-omap2/io.c |   22 -
 arch/arm/mach-omap2/omap_hwmod.c |6 
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c   |4 
 arch/arm/mach-omap2/pm-debug.c   |4 
 arch/arm/mach-omap2/pm24xx.c |4 
 arch/arm/mach-omap2/pm34xx.c |8 
 arch/arm/mach-omap2/powerdomain-common.c |  111 +++
 

[PATCH 14/14] OMAP3: PRM/CM: separate CM context save/restore; remove PRM context save/restore

2010-12-06 Thread Paul Walmsley
The OMAP3 PRM module is in the WKUP powerdomain, which is always
powered when the chip is powered, so it shouldn't be necessary to save
and restore those PRM registers.  Remove the PRM register save/restore
code, which should save several microseconds during off-mode
entry/exit, since PRM register accesses are relatively slow.

While doing so, move the CM register save/restore code into
CM-specific code.  The CM module has been distinct from the PRM module
since 2430.

This patch includes some minor changes to pm34xx.c.

Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tero Kristo tero.kri...@nokia.com
Cc: Kalle Jokiniemi kalle.jokini...@digia.com
---
 arch/arm/mach-omap2/cm2xxx_3xxx.c  |  296 +
 arch/arm/mach-omap2/cm2xxx_3xxx.h  |7 +
 arch/arm/mach-omap2/pm34xx.c   |4 
 arch/arm/mach-omap2/prcm.c |  375 
 arch/arm/mach-omap2/prm2xxx_3xxx.c |1 
 arch/arm/plat-omap/include/plat/prcm.h |3 
 6 files changed, 304 insertions(+), 382 deletions(-)

diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c 
b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 5978ce4..1c98dfc 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -29,7 +29,6 @@ static const u8 cm_idlest_offs[] = {
CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
 };
 
-
 u32 cm_read_mod_reg(s16 module, u16 idx)
 {
return __raw_readl(cm_base + module + idx);
@@ -97,3 +96,298 @@ int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, 
u8 idlest_shift)
return (i  MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
 }
 
+/*
+ * Context save/restore code - OMAP3 only
+ */
+#ifdef CONFIG_ARCH_OMAP3
+struct omap3_cm_regs {
+   u32 iva2_cm_clksel1;
+   u32 iva2_cm_clksel2;
+   u32 cm_sysconfig;
+   u32 sgx_cm_clksel;
+   u32 dss_cm_clksel;
+   u32 cam_cm_clksel;
+   u32 per_cm_clksel;
+   u32 emu_cm_clksel;
+   u32 emu_cm_clkstctrl;
+   u32 pll_cm_autoidle2;
+   u32 pll_cm_clksel4;
+   u32 pll_cm_clksel5;
+   u32 pll_cm_clken2;
+   u32 cm_polctrl;
+   u32 iva2_cm_fclken;
+   u32 iva2_cm_clken_pll;
+   u32 core_cm_fclken1;
+   u32 core_cm_fclken3;
+   u32 sgx_cm_fclken;
+   u32 wkup_cm_fclken;
+   u32 dss_cm_fclken;
+   u32 cam_cm_fclken;
+   u32 per_cm_fclken;
+   u32 usbhost_cm_fclken;
+   u32 core_cm_iclken1;
+   u32 core_cm_iclken2;
+   u32 core_cm_iclken3;
+   u32 sgx_cm_iclken;
+   u32 wkup_cm_iclken;
+   u32 dss_cm_iclken;
+   u32 cam_cm_iclken;
+   u32 per_cm_iclken;
+   u32 usbhost_cm_iclken;
+   u32 iva2_cm_autoidle2;
+   u32 mpu_cm_autoidle2;
+   u32 iva2_cm_clkstctrl;
+   u32 mpu_cm_clkstctrl;
+   u32 core_cm_clkstctrl;
+   u32 sgx_cm_clkstctrl;
+   u32 dss_cm_clkstctrl;
+   u32 cam_cm_clkstctrl;
+   u32 per_cm_clkstctrl;
+   u32 neon_cm_clkstctrl;
+   u32 usbhost_cm_clkstctrl;
+   u32 core_cm_autoidle1;
+   u32 core_cm_autoidle2;
+   u32 core_cm_autoidle3;
+   u32 wkup_cm_autoidle;
+   u32 dss_cm_autoidle;
+   u32 cam_cm_autoidle;
+   u32 per_cm_autoidle;
+   u32 usbhost_cm_autoidle;
+   u32 sgx_cm_sleepdep;
+   u32 dss_cm_sleepdep;
+   u32 cam_cm_sleepdep;
+   u32 per_cm_sleepdep;
+   u32 usbhost_cm_sleepdep;
+   u32 cm_clkout_ctrl;
+};
+
+static struct omap3_cm_regs cm_context;
+
+void omap3_cm_save_context(void)
+{
+   cm_context.iva2_cm_clksel1 =
+   cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
+   cm_context.iva2_cm_clksel2 =
+   cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
+   cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
+   cm_context.sgx_cm_clksel =
+   cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
+   cm_context.dss_cm_clksel =
+   cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
+   cm_context.cam_cm_clksel =
+   cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
+   cm_context.per_cm_clksel =
+   cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
+   cm_context.emu_cm_clksel =
+   cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
+   cm_context.emu_cm_clkstctrl =
+   cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
+   cm_context.pll_cm_autoidle2 =
+   cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
+   cm_context.pll_cm_clksel4 =
+   cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
+   cm_context.pll_cm_clksel5 =
+   cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
+   cm_context.pll_cm_clken2 =
+   cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
+   cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
+   cm_context.iva2_cm_fclken =
+   cm_read_mod_reg(OMAP3430_IVA2_MOD, 

[PATCH 08/14] OMAP2+: clockdomains: move clockdomain static data to .c files

2010-12-06 Thread Paul Walmsley
Static data should be declared in .c files, not .h files.  It should be
possible to #include .h files at any point without creating multiple
copies of the same data.

We converted the clock data to .c files some time ago.  This patch does
the same for the clockdomain data.

Signed-off-by: Paul Walmsley p...@pwsan.com
---
 arch/arm/mach-omap2/Makefile |   10 +++-
 arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c |   58 +++---
 arch/arm/mach-omap2/clockdomains44xx_data.c  |   42 ++--
 arch/arm/mach-omap2/io.c |   10 ++--
 arch/arm/plat-omap/include/plat/clockdomain.h|   11 +++-
 5 files changed, 66 insertions(+), 65 deletions(-)
 rename arch/arm/mach-omap2/{clockdomains.h = clockdomains2xxx_3xxx_data.c} 
(95%)
 rename arch/arm/mach-omap2/{clockdomains44xx.h = clockdomains44xx_data.c} 
(90%)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 609fa78..78a2a5d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -10,8 +10,7 @@ omap-2-3-common   = irq.o sdrc.o 
prm2xxx_3xxx.o
 hwmod-common   = omap_hwmod.o \
  omap_hwmod_common_data.o
 clock-common   = clock.o clock_common_data.o \
- clockdomain.o clkt_dpll.o \
- clkt_clksel.o
+ clkt_dpll.o clkt_clksel.o
 
 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common)
@@ -82,6 +81,13 @@ obj-$(CONFIG_ARCH_OMAP4) += 
$(powerdomain-common) \
   powerdomain44xx.o \
   powerdomains44xx_data.o
 
+# PRCM clockdomain control
+obj-$(CONFIG_ARCH_OMAP2)   += clockdomain.o \
+  clockdomains2xxx_3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)   += clockdomain.o \
+  clockdomains2xxx_3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4)   += clockdomain.o \
+  clockdomains44xx_data.o
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common) clock2xxx.o \
   clkt2xxx_sys.o \
diff --git a/arch/arm/mach-omap2/clockdomains.h 
b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
similarity index 95%
rename from arch/arm/mach-omap2/clockdomains.h
rename to arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 2a3b10a..8dadf75 100644
--- a/arch/arm/mach-omap2/clockdomains.h
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2008-2009 Texas Instruments, Inc.
  * Copyright (C) 2008-2010 Nokia Corporation
  *
- * Written by Paul Walmsley and Jouni Högander
+ * Paul Walmsley, Jouni Högander
  *
  * This file contains clockdomains and clockdomain wakeup/sleep
  * dependencies for the OMAP2/3 chips.  Some notes:
@@ -32,8 +32,8 @@
  *from the Power domain framework
  */
 
-#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
-#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
+#include linux/kernel.h
+#include linux/io.h
 
 #include plat/clockdomain.h
 #include cm.h
@@ -89,8 +89,6 @@ static struct clkdm_dep gfx_sgx_wkdeps[] = {
 
 /* 24XX-specific possible dependencies */
 
-#ifdef CONFIG_ARCH_OMAP2
-
 /* Wakeup dependency source arrays */
 
 /* 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP */
@@ -170,8 +168,6 @@ static struct clkdm_dep core_24xx_wkdeps[] = {
{ NULL },
 };
 
-#endif
-
 
 /* 2430-specific possible wakeup dependencies */
 
@@ -430,8 +426,6 @@ static struct clkdm_dep gfx_sgx_sleepdeps[] = {
  * sys_clkout/sys_clkout2.
  */
 
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-
 /* This is an implicit clockdomain - it is never defined as such in TRM */
 static struct clockdomain wkup_clkdm = {
.name   = wkup_clkdm,
@@ -452,8 +446,6 @@ static struct clockdomain cm_clkdm = {
.omap_chip  = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 };
 
-#endif
-
 /*
  * 2420-only clockdomains
  */
@@ -836,8 +828,6 @@ static struct clockdomain dpll5_clkdm = {
 
 #endif   /* CONFIG_ARCH_OMAP3 */
 
-#include clockdomains44xx.h
-
 /*
  * Clockdomain hwsup dependencies (OMAP3 only)
  */
@@ -856,17 +846,10 @@ static struct clkdm_autodep clkdm_autodeps[] = {
}
 };
 
-/*
- * List of clockdomain pointers per platform
- */
-
-static struct clockdomain *clockdomains_omap[] = {
-
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+static struct clockdomain *clockdomains_omap2[] __initdata = {
wkup_clkdm,
cm_clkdm,
prm_clkdm,
-#endif
 
 #ifdef CONFIG_ARCH_OMAP2420
mpu_2420_clkdm,
@@ -908,35 +891,10 @@ static struct clockdomain *clockdomains_omap[] = {
dpll4_clkdm,
   

Re: [PATCH] MFD: TWL/TPS: fix twl_probe section mismatch warning in mfd/twl-core.c

2010-12-06 Thread Bryan Wu
On Tue, Dec 7, 2010 at 8:35 AM, Paul Walmsley p...@pwsan.com wrote:

 Fix the following section mismatch warning when building omap2plus_defconfig:

 WARNING: vmlinux.o(.data+0x47d7c): Section mismatch in reference from the 
 variable twl_driver to the function .init.text:twl_probe()

 Signed-off-by: Paul Walmsley p...@pwsan.com
 Cc: Samuel Ortiz sa...@linux.intel.com
 ---
  drivers/mfd/twl-core.c |    2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

 diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
 index 35275ba..615cf38 100644
 --- a/drivers/mfd/twl-core.c
 +++ b/drivers/mfd/twl-core.c
 @@ -969,7 +969,7 @@ static int twl_remove(struct i2c_client *client)
  }

  /* NOTE:  this driver only handles a single twl4030/tps659x0 chip */
 -static int __init
 +static int

I think we might change __init to __devinit.

  twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
  {
        int                             status;
 --

Thanks,
-- 
Bryan Wu bryan...@canonical.com
Kernel Developer    +86.138-1617-6545 Mobile
Ubuntu Kernel Team
Canonical Ltd.      www.canonical.com
Ubuntu - Linux for human beings | www.ubuntu.com
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Re: [PATCH] OMAP2+: resolve section mismatch warnings in OMAP core code

2010-12-06 Thread Bryan Wu
On Tue, Dec 7, 2010 at 9:38 AM, Paul Walmsley p...@pwsan.com wrote:
 On Tue, 7 Dec 2010, Bryan Wu wrote:

 Paul,

 I did the similar patch several days ago.
 https://patchwork.kernel.org/patch/367011/

 Great, thanks Bryan, in that case yours should be used instead.


Thanks, Paul. I guess you work very late today, -:D

-Bryan
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[PATCH] MAINTAINERS: OMAP: hwmod: update hwmod code, data maintainership

2010-12-06 Thread Paul Walmsley

Add myself and Benoît as co-maintainers of the OMAP hwmod core code.
(The OMAP hwmod code manages the integration of IP blocks on the OMAP SoC
family.)

Add Benoît as the maintainer of OMAP4-based SoC hwmod mode.

Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoît Cousson b-cous...@ti.com
---
 MAINTAINERS |   14 ++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index b3be8b3..b10a91c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4329,6 +4329,20 @@ M:   Deepak Saxena dsax...@plexity.net
 S: Maintained
 F: drivers/char/hw_random/omap-rng.c
 
+OMAP HWMOD SUPPORT
+M: Benoît Cousson b-cous...@ti.com
+M: Paul Walmsley p...@pwsan.com
+L: linux-omap@vger.kernel.org
+S: Maintained
+F: arch/arm/mach-omap2/omap_hwmod.c
+F: arch/arm/plat-omap/include/plat/omap_hwmod.h
+
+OMAP HWMOD DATA FOR OMAP4-BASED DEVICES
+M: Benoît Cousson b-cous...@ti.com
+L: linux-omap@vger.kernel.org
+S: Maintained
+F: arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+
 OMAP USB SUPPORT
 M: Felipe Balbi ba...@ti.com
 M: David Brownell dbrown...@users.sourceforge.net
-- 
1.7.2.3


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