[PATCH v5 0/3] OMAP 3 CSI-2 configuration
Hi all, This is an update to an old patchset for CSI-2 configuration for OMAP 3430 and 3630. The patches have been tested on the 3630 only so far, and I don't plan to test them on 3430 in the near future. I've made changes according to Laurent's suggestions to the patches, with the exception of alignment of a certain line. I think it's exactly as it should be. :-) I'm not quite certain about the comment regarding the control register state dependency to the CORE power domain, and why exactly this isn't an issue. We know the MPU must stay powered since the ISP can't wake up MPU, but how is this related to CORE? In the end it seems to work. If you think this should be changed and you also know how, please provide me the text. :-) /* * The PHY configuration is lost in off mode, that's not an * issue since the MPU power domain is forced on whilst the * ISP is in use. */ Comments, questions and other kind of feedback is very welcome. Kind regards, -- Sakari Ailus e-mail: sakari.ai...@iki.fi XMPP: sai...@retiisi.org.uk -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 2/3] omap3isp: Add PHY routing configuration
Add PHY routing configuration for both 3430 and 3630. Also add register bit
definitions of CSIRXFE and CAMERA_PHY_CTRL registers on OMAP 3430 and 3630,
respectively.
Signed-off-by: Sakari Ailus sakari.ai...@iki.fi
---
drivers/media/platform/omap3isp/ispcsiphy.c | 89 +++
drivers/media/platform/omap3isp/ispreg.h| 22 +++
2 files changed, 111 insertions(+), 0 deletions(-)
diff --git a/drivers/media/platform/omap3isp/ispcsiphy.c
b/drivers/media/platform/omap3isp/ispcsiphy.c
index 348f67e..c808b6a 100644
--- a/drivers/media/platform/omap3isp/ispcsiphy.c
+++ b/drivers/media/platform/omap3isp/ispcsiphy.c
@@ -32,6 +32,95 @@
#include ispreg.h
#include ispcsiphy.h
+static void csiphy_routing_cfg_3630(struct isp_csiphy *phy, u32 iface,
+ bool ccp2_strobe)
+{
+ u32 reg = isp_reg_readl(
+ phy-isp, OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL, 0);
+ u32 shift, mode;
+
+ switch (iface) {
+ case ISP_INTERFACE_CCP2B_PHY1:
+ reg = ~OMAP3630_CONTROL_CAMERA_PHY_CTRL_CSI1_RX_SEL_PHY2;
+ shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT;
+ break;
+ case ISP_INTERFACE_CSI2C_PHY1:
+ shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT;
+ mode = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_DPHY;
+ break;
+ case ISP_INTERFACE_CCP2B_PHY2:
+ reg |= OMAP3630_CONTROL_CAMERA_PHY_CTRL_CSI1_RX_SEL_PHY2;
+ shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT;
+ break;
+ case ISP_INTERFACE_CSI2A_PHY2:
+ shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT;
+ mode = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_DPHY;
+ break;
+ }
+
+ /* Select data/clock or data/strobe mode for CCP2 */
+ switch (iface) {
+ case ISP_INTERFACE_CCP2B_PHY1:
+ case ISP_INTERFACE_CCP2B_PHY2:
+ if (ccp2_strobe)
+ mode =
OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_CCP2_DATA_STROBE;
+ else
+ mode =
OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_CCP2_DATA_CLOCK;
+ }
+
+ reg = ~(OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_MASK shift);
+ reg |= mode shift;
+
+ isp_reg_writel(phy-isp, reg,
+ OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL, 0);
+}
+
+static void csiphy_routing_cfg_3430(struct isp_csiphy *phy, u32 iface, bool on,
+ bool ccp2_strobe)
+{
+ u32 csirxfe = OMAP343X_CONTROL_CSIRXFE_PWRDNZ
+ | OMAP343X_CONTROL_CSIRXFE_RESET;
+
+ /* Only the CCP2B on PHY1 is configurable. */
+ if (iface != ISP_INTERFACE_CCP2B_PHY1)
+ return;
+
+ if (!on) {
+ isp_reg_writel(phy-isp, 0,
+ OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE, 0);
+ return;
+ }
+
+ if (ccp2_strobe)
+ csirxfe |= OMAP343X_CONTROL_CSIRXFE_SELFORM;
+
+ isp_reg_writel(phy-isp, csirxfe,
+ OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE, 0);
+}
+
+/**
+ * Configure OMAP 3 CSI PHY routing.
+ *
+ * Note that the underlying routing configuration registers are part
+ * of the control (SCM) register space and part of the CORE power
+ * domain on both 3430 and 3630, so they will not hold their contents
+ * in off-mode.
+ *
+ * @phy: relevant phy device
+ * @iface: ISP_INTERFACE_*
+ * @on: power on or off
+ * @ccp2_strobe: false: data/clock, true: data/strobe
+ */
+static void csiphy_routing_cfg(struct isp_csiphy *phy, u32 iface, bool on,
+ bool ccp2_strobe)
+{
+ if (phy-isp-mmio_base[OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL]
+on)
+ return csiphy_routing_cfg_3630(phy, iface, ccp2_strobe);
+ if (phy-isp-mmio_base[OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE])
+ return csiphy_routing_cfg_3430(phy, iface, on, ccp2_strobe);
+}
+
/*
* csiphy_lanes_config - Configuration of CSIPHY lanes.
*
diff --git a/drivers/media/platform/omap3isp/ispreg.h
b/drivers/media/platform/omap3isp/ispreg.h
index e2c57f3..148108b 100644
--- a/drivers/media/platform/omap3isp/ispreg.h
+++ b/drivers/media/platform/omap3isp/ispreg.h
@@ -1583,4 +1583,26 @@
#define ISPCSIPHY_REG2_CCP2_SYNC_PATTERN_MASK \
(0x7f ISPCSIPHY_REG2_CCP2_SYNC_PATTERN_SHIFT)
+/*
-
+ * CONTROL registers for CSI-2 phy routing
+ */
+
+/* OMAP343X_CONTROL_CSIRXFE */
+#define OMAP343X_CONTROL_CSIRXFE_CSIB_INV (1 7)
+#define OMAP343X_CONTROL_CSIRXFE_RESENABLE (1 8)
+#define OMAP343X_CONTROL_CSIRXFE_SELFORM (1 10)
+#define OMAP343X_CONTROL_CSIRXFE_PWRDNZ(1 12)
+#define OMAP343X_CONTROL_CSIRXFE_RESET (1 13)
+
+/*
[PATCH v5 3/3] omap3isp: Configure CSI-2 phy based on platform data
Configure CSI-2 phy based on platform data in the ISP driver. For that, the
new V4L2_CID_IMAGE_SOURCE_PIXEL_RATE control is used. Previously the same
was configured from the board code.
Signed-off-by: Sakari Ailus sakari.ai...@iki.fi
Acked-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
drivers/media/platform/omap3isp/isp.h |3 -
drivers/media/platform/omap3isp/ispcsiphy.c | 153 +++
drivers/media/platform/omap3isp/ispcsiphy.h | 10 --
3 files changed, 83 insertions(+), 83 deletions(-)
diff --git a/drivers/media/platform/omap3isp/isp.h
b/drivers/media/platform/omap3isp/isp.h
index 6fed222..accb3b0 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -129,9 +129,6 @@ struct isp_reg {
struct isp_platform_callback {
u32 (*set_xclk)(struct isp_device *isp, u32 xclk, u8 xclksel);
- int (*csiphy_config)(struct isp_csiphy *phy,
-struct isp_csiphy_dphy_cfg *dphy,
-struct isp_csiphy_lanes_cfg *lanes);
};
/*
diff --git a/drivers/media/platform/omap3isp/ispcsiphy.c
b/drivers/media/platform/omap3isp/ispcsiphy.c
index c808b6a..48f8ba7 100644
--- a/drivers/media/platform/omap3isp/ispcsiphy.c
+++ b/drivers/media/platform/omap3isp/ispcsiphy.c
@@ -122,36 +122,6 @@ static void csiphy_routing_cfg(struct isp_csiphy *phy, u32
iface, bool on,
}
/*
- * csiphy_lanes_config - Configuration of CSIPHY lanes.
- *
- * Updates HW configuration.
- * Called with phy-mutex taken.
- */
-static void csiphy_lanes_config(struct isp_csiphy *phy)
-{
- unsigned int i;
- u32 reg;
-
- reg = isp_reg_readl(phy-isp, phy-cfg_regs, ISPCSI2_PHY_CFG);
-
- for (i = 0; i phy-num_data_lanes; i++) {
- reg = ~(ISPCSI2_PHY_CFG_DATA_POL_MASK(i + 1) |
-ISPCSI2_PHY_CFG_DATA_POSITION_MASK(i + 1));
- reg |= (phy-lanes.data[i].pol
- ISPCSI2_PHY_CFG_DATA_POL_SHIFT(i + 1));
- reg |= (phy-lanes.data[i].pos
- ISPCSI2_PHY_CFG_DATA_POSITION_SHIFT(i + 1));
- }
-
- reg = ~(ISPCSI2_PHY_CFG_CLOCK_POL_MASK |
-ISPCSI2_PHY_CFG_CLOCK_POSITION_MASK);
- reg |= phy-lanes.clk.pol ISPCSI2_PHY_CFG_CLOCK_POL_SHIFT;
- reg |= phy-lanes.clk.pos ISPCSI2_PHY_CFG_CLOCK_POSITION_SHIFT;
-
- isp_reg_writel(phy-isp, reg, phy-cfg_regs, ISPCSI2_PHY_CFG);
-}
-
-/*
* csiphy_power_autoswitch_enable
* @enable: Sets or clears the autoswitch function enable flag.
*/
@@ -196,43 +166,28 @@ static int csiphy_set_power(struct isp_csiphy *phy, u32
power)
}
/*
- * csiphy_dphy_config - Configure CSI2 D-PHY parameters.
- *
- * Called with phy-mutex taken.
+ * TCLK values are OK at their reset values
*/
-static void csiphy_dphy_config(struct isp_csiphy *phy)
-{
- u32 reg;
-
- /* Set up ISPCSIPHY_REG0 */
- reg = isp_reg_readl(phy-isp, phy-phy_regs, ISPCSIPHY_REG0);
-
- reg = ~(ISPCSIPHY_REG0_THS_TERM_MASK |
-ISPCSIPHY_REG0_THS_SETTLE_MASK);
- reg |= phy-dphy.ths_term ISPCSIPHY_REG0_THS_TERM_SHIFT;
- reg |= phy-dphy.ths_settle ISPCSIPHY_REG0_THS_SETTLE_SHIFT;
-
- isp_reg_writel(phy-isp, reg, phy-phy_regs, ISPCSIPHY_REG0);
-
- /* Set up ISPCSIPHY_REG1 */
- reg = isp_reg_readl(phy-isp, phy-phy_regs, ISPCSIPHY_REG1);
-
- reg = ~(ISPCSIPHY_REG1_TCLK_TERM_MASK |
-ISPCSIPHY_REG1_TCLK_MISS_MASK |
-ISPCSIPHY_REG1_TCLK_SETTLE_MASK);
- reg |= phy-dphy.tclk_term ISPCSIPHY_REG1_TCLK_TERM_SHIFT;
- reg |= phy-dphy.tclk_miss ISPCSIPHY_REG1_TCLK_MISS_SHIFT;
- reg |= phy-dphy.tclk_settle ISPCSIPHY_REG1_TCLK_SETTLE_SHIFT;
+#define TCLK_TERM 0
+#define TCLK_MISS 1
+#define TCLK_SETTLE14
- isp_reg_writel(phy-isp, reg, phy-phy_regs, ISPCSIPHY_REG1);
-}
-
-static int csiphy_config(struct isp_csiphy *phy,
-struct isp_csiphy_dphy_cfg *dphy,
-struct isp_csiphy_lanes_cfg *lanes)
+static int omap3isp_csiphy_config(struct isp_csiphy *phy)
{
+ struct isp_csi2_device *csi2 = phy-csi2;
+ struct isp_pipeline *pipe = to_isp_pipeline(csi2-subdev.entity);
+ struct isp_v4l2_subdevs_group *subdevs = pipe-external-host_priv;
+ struct isp_csiphy_lanes_cfg *lanes;
+ int csi2_ddrclk_khz;
unsigned int used_lanes = 0;
unsigned int i;
+ u32 reg;
+
+ if (subdevs-interface == ISP_INTERFACE_CCP2B_PHY1
+ || subdevs-interface == ISP_INTERFACE_CCP2B_PHY2)
+ lanes = subdevs-bus.ccp2.lanecfg;
+ else
+ lanes = subdevs-bus.csi2.lanecfg;
/* Clock and data lanes verification */
for (i = 0; i phy-num_data_lanes; i++) {
@@ -251,10 +206,61 @@ static int csiphy_config(struct isp_csiphy *phy,
if (lanes-clk.pos == 0 || used_lanes (1 lanes-clk.pos))
return
[PATCH v5 1/3] omap3isp: Add CSI configuration registers from control block to ISP resources
Add the registers used to configure the CSI-2 receiver PHY on OMAP3430 and
3630 and map them in the ISP driver. The register is part of the control
block but it only is needed by the ISP driver.
Signed-off-by: Sakari Ailus sakari.ai...@iki.fi
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/devices.c | 10 ++
drivers/media/platform/omap3isp/isp.c |6 --
drivers/media/platform/omap3isp/isp.h |2 ++
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c00c689..9e4d5da 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -201,6 +201,16 @@ static struct resource omap3isp_resources[] = {
.flags = IORESOURCE_MEM,
},
{
+ .start = OMAP343X_CTRL_BASE + OMAP343X_CONTROL_CSIRXFE,
+ .end= OMAP343X_CTRL_BASE + OMAP343X_CONTROL_CSIRXFE
+ 3,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP343X_CTRL_BASE +
OMAP3630_CONTROL_CAMERA_PHY_CTRL,
+ .end= OMAP343X_CTRL_BASE +
OMAP3630_CONTROL_CAMERA_PHY_CTRL + 3,
+ .flags = IORESOURCE_MEM,
+ },
+ {
.start = INT_34XX_CAM_IRQ,
.flags = IORESOURCE_IRQ,
}
diff --git a/drivers/media/platform/omap3isp/isp.c
b/drivers/media/platform/omap3isp/isp.c
index 6034dca..972e7b5 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -100,7 +100,8 @@ static const struct isp_res_mapping isp_res_maps[] = {
1 OMAP3_ISP_IOMEM_RESZ |
1 OMAP3_ISP_IOMEM_SBL |
1 OMAP3_ISP_IOMEM_CSI2A_REGS1 |
- 1 OMAP3_ISP_IOMEM_CSIPHY2,
+ 1 OMAP3_ISP_IOMEM_CSIPHY2 |
+ 1 OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
},
{
.isp_rev = ISP_REVISION_15_0,
@@ -117,7 +118,8 @@ static const struct isp_res_mapping isp_res_maps[] = {
1 OMAP3_ISP_IOMEM_CSI2A_REGS2 |
1 OMAP3_ISP_IOMEM_CSI2C_REGS1 |
1 OMAP3_ISP_IOMEM_CSIPHY1 |
- 1 OMAP3_ISP_IOMEM_CSI2C_REGS2,
+ 1 OMAP3_ISP_IOMEM_CSI2C_REGS2 |
+ 1 OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
},
};
diff --git a/drivers/media/platform/omap3isp/isp.h
b/drivers/media/platform/omap3isp/isp.h
index 8be7487..6fed222 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -72,6 +72,8 @@ enum isp_mem_resources {
OMAP3_ISP_IOMEM_CSI2C_REGS1,
OMAP3_ISP_IOMEM_CSIPHY1,
OMAP3_ISP_IOMEM_CSI2C_REGS2,
+ OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
+ OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
OMAP3_ISP_IOMEM_LAST
};
--
1.7.2.5
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Re: Errors at boot time from OMAP4430SDP (and a whinge about serial stuff)
On Fri, Oct 12, 2012 at 6:24 PM, Tony Lindgren t...@atomide.com wrote:
Error setting wl12xx data: -38
..
Ohad, can you please take a look?
Sure, -38 is -ENOSYS which is returned when the wl12xx driver isn't configured.
This isn't an error (it's a user decision, and it shouldn't elicit any
error) and the patch below (also attached) should make it go away on:
From 374f145568585c8d6a8d5e4b8b5d3e6baedd2f39 Mon Sep 17 00:00:00 2001
From: Ohad Ben-Cohen o...@wizery.com
Date: Sun, 14 Oct 2012 20:16:01 +0200
Subject: [PATCH] ARM: OMAP: don't print any error when wl12xx isn't
configured
Stop intimidating users with scary wlan error messages in case wl12xx
support wasn't even built.
In addition, when wl12xx_set_platform_data() fails, don't bother
registering wl12xx's fixed regulator device (on the relevant
boards).
While we're at it, extract the wlan init code to a dedicated function to
make (the relevant boards') init code look a bit nicer.
Reported-by: Russell King li...@arm.linux.org.uk
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
---
arch/arm/mach-davinci/board-da850-evm.c | 7 ++-
arch/arm/mach-omap2/board-4430sdp.c | 13 ++--
arch/arm/mach-omap2/board-omap3evm.c | 11 +-
arch/arm/mach-omap2/board-omap3pandora.c | 9 -
arch/arm/mach-omap2/board-omap4panda.c | 30 ++--
arch/arm/mach-omap2/board-zoom-peripherals.c | 20 ---
6 files changed, 76 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c
b/arch/arm/mach-davinci/board-da850-evm.c
index 32ee3f8..1b19415 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1404,8 +1404,13 @@ static __init int da850_wl12xx_init(void)
da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
ret = wl12xx_set_platform_data(da850_wl12xx_wlan_data);
+ /* bail out silently in case wl12xx isn't configured */
+ if (ret == -ENOSYS)
+ goto free_wlan_irq;
+
+ /* bail out verbosely on any other error */
if (ret) {
- pr_err(Could not set wl12xx data: %d\n, ret);
+ pr_err(error setting wl12xx data: %d\n, ret);
goto free_wlan_irq;
}
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 3669c12..d1dd81a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -826,9 +826,18 @@ static void __init omap4_sdp4430_wifi_init(void)
omap4_sdp4430_wifi_mux_init();
omap4_sdp4430_wlan_data.irq = gpio_to_irq(GPIO_WIFI_IRQ);
+
ret = wl12xx_set_platform_data(omap4_sdp4430_wlan_data);
- if (ret)
- pr_err(Error setting wl12xx data: %d\n, ret);
+ /* bail out silently in case wl12xx isn't configured */
+ if (ret == -ENOSYS)
+ return;
+
+ /* bail out verbosely on any other error */
+ if (ret) {
+ pr_err(error setting wl12xx data: %d\n, ret);
+ return;
+ }
+
ret = platform_device_register(omap_vwlan_device);
if (ret)
pr_err(Error registering wl12xx device: %d\n, ret);
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index b9b776b..7f72e44 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -637,9 +637,18 @@ static void __init omap3_evm_wl12xx_init(void)
/* WL12xx WLAN Init */
omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
+
ret = wl12xx_set_platform_data(omap3evm_wlan_data);
- if (ret)
+ /* bail out silently in case wl12xx isn't configured */
+ if (ret == -ENOSYS)
+ return;
+
+ /* bail out verbosely on any other error */
+ if (ret) {
pr_err(error setting wl12xx data: %d\n, ret);
+ return;
+ }
+
ret = platform_device_register(omap3evm_wlan_regulator);
if (ret)
pr_err(error registering wl12xx device: %d\n, ret);
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c
b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4a..bbc4001 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -549,8 +549,15 @@ static void __init pandora_wl1251_init(void)
pandora_wl1251_pdata.use_eeprom = true;
ret = wl12xx_set_platform_data(pandora_wl1251_pdata);
- if (ret 0)
+ /* bail out silently in case wl12xx isn't configured */
+ if (ret == -ENOSYS)
+ goto fail_irq;
+
+ /* bail out verbosely on any other error */
+ if (ret) {
+ pr_err(error setting wl12xx data: %d\n, ret);
goto fail_irq;
+ }
return;
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index bfcd397..cc5cdd6 100644
---
[PATCH] i2c: omap: revert i2c: omap: switch to threaded IRQ support
Commit 3b2f8f82dad7d1f79cdc8fc05bd1c94baf109bde (i2c: omap: switch to
threaded IRQ support) causes communication with I2C devices to fail
after system suspend/resume on all OMAP3 devices:
...
[ 40.228576] PM: noirq resume of devices complete after 3.723 msecs
[ 40.233184] PM: early resume of devices complete after 3.173 msecs
[ 40.242736] [sched_delayed] sched: RT throttling activated
[ 41.235046] omap_i2c omap_i2c.1: controller timed out
[ 41.235351] twl: i2c_read failed to transfer all messages
[ 41.235382] omap_hsmmc omap_hsmmc.0: could not set regulator OCR (-110)
[ 41.396453] mmc0: error -110 during resume (card was removed?)
[ 42.391754] omap_i2c omap_i2c.1: controller timed out
[ 42.391876] twl: i2c_write failed to transfer all messages
[ 42.391906] twl_rtc: Could not write TWLregister F - error -110
[ 43.391326] omap_i2c omap_i2c.1: controller timed out
[ 43.391479] twl: i2c_read failed to transfer all messages
[ 43.391510] twl_rtc: Could not read TWLregister D - error -110
[ 43.391540] twl_rtc twl_rtc: twl_rtc_read_time: reading CTRL_REG, error -110
[ 43.392364] PM: resume of devices complete after 3158.935 msecs
When the root filesystem is on MMC, as in the above example, the
card's voltage regulator is not re-enabled and the filesystem becomes
inaccessible after resume.
Fix by reverting the conversion to a threaded IRQ handler.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Felipe Balbi ba...@ti.com
Cc: Shubhrajyoti D shubhrajy...@ti.com
Cc: Wolfram Sang w.s...@pengutronix.de
Cc: Ben Dooks ben-li...@fluff.org
---
drivers/i2c/busses/i2c-omap.c | 44 +++--
1 file changed, 7 insertions(+), 37 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index db31eae..e001c2a 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -180,7 +180,6 @@ enum {
#define I2C_OMAP_ERRATA_I462 (1 1)
struct omap_i2c_dev {
- spinlock_t lock; /* IRQ synchronization */
struct device *dev;
void __iomem*base; /* virtual */
int irq;
@@ -865,35 +864,13 @@ static int omap_i2c_transmit_data(struct omap_i2c_dev
*dev, u8 num_bytes,
}
static irqreturn_t
-omap_i2c_isr(int irq, void *dev_id)
+omap_i2c_isr(int this_irq, void *dev_id)
{
struct omap_i2c_dev *dev = dev_id;
- irqreturn_t ret = IRQ_HANDLED;
- u16 mask;
- u16 stat;
-
- spin_lock(dev-lock);
- mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
- stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
-
- if (stat mask)
- ret = IRQ_WAKE_THREAD;
-
- spin_unlock(dev-lock);
-
- return ret;
-}
-
-static irqreturn_t
-omap_i2c_isr_thread(int this_irq, void *dev_id)
-{
- struct omap_i2c_dev *dev = dev_id;
- unsigned long flags;
u16 bits;
u16 stat;
int err = 0, count = 0;
- spin_lock_irqsave(dev-lock, flags);
do {
bits = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
@@ -907,7 +884,7 @@ omap_i2c_isr_thread(int this_irq, void *dev_id)
if (!stat) {
/* my work here is done */
- goto out;
+ return IRQ_HANDLED;
}
dev_dbg(dev-dev, IRQ (ISR = 0x%04x)\n, stat);
@@ -1016,8 +993,6 @@ omap_i2c_isr_thread(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
out:
- spin_unlock_irqrestore(dev-lock, flags);
-
return IRQ_HANDLED;
}
@@ -1062,6 +1037,7 @@ omap_i2c_probe(struct platform_device *pdev)
pdev-dev.platform_data;
struct device_node *node = pdev-dev.of_node;
const struct of_device_id *match;
+ irq_handler_t isr;
int irq;
int r;
@@ -1110,8 +1086,6 @@ omap_i2c_probe(struct platform_device *pdev)
dev-dev = pdev-dev;
dev-irq = irq;
- spin_lock_init(dev-lock);
-
platform_set_drvdata(pdev, dev);
init_completion(dev-cmd_complete);
@@ -1166,14 +1140,10 @@ omap_i2c_probe(struct platform_device *pdev)
/* reset ASAP, clearing any IRQs */
omap_i2c_init(dev);
- if (dev-rev OMAP_I2C_OMAP1_REV_2)
- r = devm_request_irq(pdev-dev, dev-irq, omap_i2c_omap1_isr,
- IRQF_NO_SUSPEND, pdev-name, dev);
- else
- r = devm_request_threaded_irq(pdev-dev, dev-irq,
- omap_i2c_isr, omap_i2c_isr_thread,
- IRQF_NO_SUSPEND | IRQF_ONESHOT,
- pdev-name, dev);
+ isr = (dev-rev OMAP_I2C_OMAP1_REV_2) ? omap_i2c_omap1_isr :
+ omap_i2c_isr;
+ r = devm_request_irq(pdev-dev,
[PATCH] ARM: vfp: fix save and restore when running on pre-VFPv3 and CONFIG_VFPv3 set
After commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 (ARM: vfp: fix
saving d16-d31 vfp registers on v6+ kernels), the OMAP 2430SDP board
started crashing during boot with omap2plus_defconfig:
[3.875122] mmcblk0: mmc0:e624 SD04G 3.69 GiB
[3.915954] mmcblk0: p1
[4.086639] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
[4.093719] Modules linked in:
[4.096954] CPU: 0Not tainted (3.6.0-02232-g759e00b #570)
[4.103149] PC is at vfp_reload_hw+0x1c/0x44
[4.107666] LR is at __und_usr_fault_32+0x0/0x8
It turns out that the context save/restore fix unmasked a latent bug
in commit 5aaf254409f8d58229107b59507a8235b715a960 (ARM: 6203/1: Make
VFPv3 usable on ARMv6). When CONFIG_VFPv3 is set, but the kernel is
booted on a pre-VFPv3 core, the code attempts to save and restore the
d16-d31 VFP registers. These are only present on non-D16 VFPv3+, so
this results in an undefined instruction exception. The code didn't
crash before commit 846a136 because the save and restore code was
only touching d0-d15, present on all VFP.
Fix by implementing a request from Russell King to add a new HWCAP
flag that affirmatively indicates the presence of the d16-d31
registers:
http://marc.info/?l=linux-arm-kernelm=135013547905283w=2
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King rmk+ker...@arm.linux.org.uk
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Dave Martin dave.mar...@linaro.org
Cc: Måns Rullgård mans.rullg...@linaro.org
---
Applies on v3.7-rc1.
arch/arm/include/asm/vfpmacros.h | 12 ++--
arch/arm/include/uapi/asm/hwcap.h |3 ++-
arch/arm/vfp/vfpmodule.c |9 ++---
3 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e4..77f40ea 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
#if __LINUX_ARM_ARCH__ = 6
ldr \tmp, =elf_hwcap@ may not have MVFR regs
ldr \tmp, [\tmp, #0]
- tst \tmp, #HWCAP_VFPv3D16
- ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
- addne \base, \base, #32*4 @ step over unused register
space
+ tst \tmp, #HWCAP_VFPD16
+ ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
+ addeq \base, \base, #32*4 @ step over unused register
space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature
Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
@@ -51,9 +51,9 @@
#if __LINUX_ARM_ARCH__ = 6
ldr \tmp, =elf_hwcap@ may not have MVFR regs
ldr \tmp, [\tmp, #0]
- tst \tmp, #HWCAP_VFPv3D16
- stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
- addne \base, \base, #32*4 @ step over unused register
space
+ tst \tmp, #HWCAP_VFPD16
+ stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
+ addeq \base, \base, #32*4 @ step over unused register
space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature
Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
diff --git a/arch/arm/include/uapi/asm/hwcap.h
b/arch/arm/include/uapi/asm/hwcap.h
index f254f65..b1555d0 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
#define HWCAP_THUMBEE (1 11)
#define HWCAP_NEON (1 12)
#define HWCAP_VFPv3(1 13)
-#define HWCAP_VFPv3D16 (1 14)
+#define HWCAP_VFPv3D16 (1 14) /* also set for VFPv4-D16 */
#define HWCAP_TLS (1 15)
#define HWCAP_VFPv4(1 16)
#define HWCAP_IDIVA(1 17)
#define HWCAP_IDIVT(1 18)
+#define HWCAP_VFPD16 (1 19) /* set if VFP has 32 regs (not 16) */
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32..f3e611c 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@ static int __init vfp_init(void)
elf_hwcap |= HWCAP_VFPv3;
/*
-* Check for VFPv3 D16. CPUs in this configuration
-* only have 16 x 64bit registers.
+* Check for VFPv3 D16 and VFPv4 D16. CPUs in
+* this configuration only have 16 x 64bit
+* registers.
*/
if (((fmrx(MVFR0) MVFR0_A_SIMD_MASK)) == 1)
- elf_hwcap |= HWCAP_VFPv3D16;
+ elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
+ else
+ elf_hwcap |= HWCAP_VFPD16;
Re: [PATCH] ARM: vfp: fix save and restore when running on pre-VFPv3 and CONFIG_VFPv3 set
On 15 October 2012 02:58, Paul Walmsley p...@pwsan.com wrote: Fix by implementing a request from Russell King to add a new HWCAP flag that affirmatively indicates the presence of the d16-d31 registers: [...] diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index f254f65..b1555d0 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h @@ -18,11 +18,12 @@ #define HWCAP_THUMBEE (1 11) #define HWCAP_NEON (1 12) #define HWCAP_VFPv3(1 13) -#define HWCAP_VFPv3D16 (1 14) +#define HWCAP_VFPv3D16 (1 14) /* also set for VFPv4-D16 */ #define HWCAP_TLS (1 15) #define HWCAP_VFPv4(1 16) #define HWCAP_IDIVA(1 17) #define HWCAP_IDIVT(1 18) +#define HWCAP_VFPD16 (1 19) /* set if VFP has 32 regs (not 16) */ #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) Please consider calling the new flag VFPD32 or so instead. The D16 suffix usually signifies an implementation with 16 registers, i.e. the opposite of what this flag does. Using the same tag to mean both things depending on whether there's a 'v3' before it is nothing but confusing. -- Mans Rullgard / mru -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3] ARM: vfp: fix save and restore when running on pre-VFPv3 and CONFIG_VFPv3 set
After commit 846a136881b8f73c1f74250bf6acfaa309cab1f2 (ARM: vfp: fix
saving d16-d31 vfp registers on v6+ kernels), the OMAP 2430SDP board
started crashing during boot with omap2plus_defconfig:
[3.875122] mmcblk0: mmc0:e624 SD04G 3.69 GiB
[3.915954] mmcblk0: p1
[4.086639] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
[4.093719] Modules linked in:
[4.096954] CPU: 0Not tainted (3.6.0-02232-g759e00b #570)
[4.103149] PC is at vfp_reload_hw+0x1c/0x44
[4.107666] LR is at __und_usr_fault_32+0x0/0x8
It turns out that the context save/restore fix unmasked a latent bug
in commit 5aaf254409f8d58229107b59507a8235b715a960 (ARM: 6203/1: Make
VFPv3 usable on ARMv6). When CONFIG_VFPv3 is set, but the kernel is
booted on a pre-VFPv3 core, the code attempts to save and restore the
d16-d31 VFP registers. These are only present on non-D16 VFPv3+, so
this results in an undefined instruction exception. The code didn't
crash before commit 846a136 because the save and restore code was
only touching d0-d15, present on all VFP.
Fix by implementing a request from Russell King to add a new HWCAP
flag that affirmatively indicates the presence of the d16-d31
registers:
http://marc.info/?l=linux-arm-kernelm=135013547905283w=2
and some feedback from Måns to clarify the name of the HWCAP flag.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King rmk+ker...@arm.linux.org.uk
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Dave Martin dave.mar...@linaro.org
Cc: Måns Rullgård mans.rullg...@linaro.org
---
Thanks for the suggestion, Måns; certainly a readability improvement.
arch/arm/include/asm/vfpmacros.h | 12 ++--
arch/arm/include/uapi/asm/hwcap.h |3 ++-
arch/arm/vfp/vfpmodule.c |9 ++---
3 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e4..301c1db 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
#if __LINUX_ARM_ARCH__ = 6
ldr \tmp, =elf_hwcap@ may not have MVFR regs
ldr \tmp, [\tmp, #0]
- tst \tmp, #HWCAP_VFPv3D16
- ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
- addne \base, \base, #32*4 @ step over unused register
space
+ tst \tmp, #HWCAP_VFPD32
+ ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
+ addeq \base, \base, #32*4 @ step over unused register
space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature
Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
@@ -51,9 +51,9 @@
#if __LINUX_ARM_ARCH__ = 6
ldr \tmp, =elf_hwcap@ may not have MVFR regs
ldr \tmp, [\tmp, #0]
- tst \tmp, #HWCAP_VFPv3D16
- stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
- addne \base, \base, #32*4 @ step over unused register
space
+ tst \tmp, #HWCAP_VFPD32
+ stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
+ addeq \base, \base, #32*4 @ step over unused register
space
#else
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature
Register 0
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
diff --git a/arch/arm/include/uapi/asm/hwcap.h
b/arch/arm/include/uapi/asm/hwcap.h
index f254f65..3688fd1 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
#define HWCAP_THUMBEE (1 11)
#define HWCAP_NEON (1 12)
#define HWCAP_VFPv3(1 13)
-#define HWCAP_VFPv3D16 (1 14)
+#define HWCAP_VFPv3D16 (1 14) /* also set for VFPv4-D16 */
#define HWCAP_TLS (1 15)
#define HWCAP_VFPv4(1 16)
#define HWCAP_IDIVA(1 17)
#define HWCAP_IDIVT(1 18)
+#define HWCAP_VFPD32 (1 19) /* set if VFP has 32 regs (not 16) */
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32..3b44e0d 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@ static int __init vfp_init(void)
elf_hwcap |= HWCAP_VFPv3;
/*
-* Check for VFPv3 D16. CPUs in this configuration
-* only have 16 x 64bit registers.
+* Check for VFPv3 D16 and VFPv4 D16. CPUs in
+* this configuration only have 16 x 64bit
+* registers.
*/
if (((fmrx(MVFR0) MVFR0_A_SIMD_MASK)) == 1)
- elf_hwcap |= HWCAP_VFPv3D16;
+ elf_hwcap |=
[PATCH] ARM: OMAP4: hwmod data: gpmc main clk
gpmc has been converted to a driver. It requests clock with
con-id fck, if not available, probe fails. Clock for gpmc
device with con-id fck is created (aliased) along with
hwmod device, and for that to happen, main_clk needs to be
specified in hwmod entry, add it for OMAP4.
Note that the corresponding clock is dummy.
Reported-by: Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d028..ce04002 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1363,6 +1363,7 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = {
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_gpmc_irqs,
.sdma_reqs = omap44xx_gpmc_sdma_reqs,
+ .main_clk = gpmc_ck,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET,
--
1.7.12
--
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RE: Errors at boot time from OMAP4430SDP (and a whinge about serial stuff)
Hi,
On Fri, Oct 12, 2012 at 21:54:52, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [121012 08:56]:
omap-gpmc omap-gpmc: error: clk_get
omap-gpmc: probe of omap-gpmc failed with error -2
I think Afzal posted something about this already? Looks
like this too could be sparse IRQ related regression..
Patch has been posted to resolve the issue,
ARM: OMAP4: hwmod data: gpmc main clk.
Regards
Afzal
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