Re: [PATCH 3/3] ARM: dts: AM33XX: Add memory resource to d_can node
On 11/14/2012 07:08 PM, AnilKumar Ch wrote: Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch anilku...@ti.com Acked-by: Marc Kleine-Budde m...@pengutronix.de -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions| Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917- | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | signature.asc Description: OpenPGP digital signature
Re: [PATCH 3/3] ARM: dts: AM33XX: Add memory resource to d_can node
On 11/21/2012 06:45 AM, AnilKumar, Chimata wrote: On Tue, Nov 20, 2012 at 15:56:32, Marc Kleine-Budde wrote: On 11/20/2012 11:23 AM, AnilKumar, Chimata wrote: On Tue, Nov 20, 2012 at 15:43:04, Marc Kleine-Budde wrote: On 11/14/2012 07:08 PM, AnilKumar Ch wrote: Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch anilku...@ti.com This does not apply to net-next/master: Applying: ARM: dts: AM33XX: Add memory resource to d_can node error: patch failed: arch/arm/boot/dts/am33xx.dtsi:227 error: arch/arm/boot/dts/am33xx.dtsi: patch does not apply Patch failed at 0003 ARM: dts: AM33XX: Add memory resource to d_can node Marc, Sorry about this DT changes are present in linux-omap. Could you please take the driver changes only and ACK on remaining will help. Will do - I'm currently looking at the driver. Hi Marc, Please ACK this patch as well. done :) Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions| Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917- | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | signature.asc Description: OpenPGP digital signature
Re: [PATCH v2] can: c_can: Add d_can raminit support
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current user of D_CAN driver) message RAM is
controlled through control module register for both instances. So
control module register details is required to initialization or
de-initialization of message RAM according to instance number.
Control module memory resource is obtained from D_CAN dt node and
instance number obtained from device tree aliases node.
This patch was tested on AM335x-EVM along with pinctrl data addition
patch, d_can dt aliases addition and control module data addition.
pinctrl data addition is not added to am335x-evm.dts (only supports
CPLD profile#0) because d_can1 is supported under CPLD profile#1.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
Changes from v1:
- Incorporated Marc's comments on v1
* sanity check moved to c_can_probe() from c_can_hw_raminit()
* device instance is assigned using conditional operator
* Changed warning to info to tell control module is not
used for raminit if there is no second IORESOURCE_MEM
- Dropped dt patches
* No changes from v1
* Those will go to linux-omap/master
drivers/net/can/c_can/c_can.c | 12
drivers/net/can/c_can/c_can.h |3 +++
drivers/net/can/c_can/c_can_platform.c | 33
+++-
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
index e5180df..c15830c 100644
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -233,6 +233,12 @@ static inline void c_can_pm_runtime_put_sync(const
struct c_can_priv *priv)
pm_runtime_put_sync(priv-device);
}
+static inline void c_can_reset_ram(const struct c_can_priv *priv, bool
enable)
+{
+ if (priv-ram_init)
+ priv-ram_init(priv, enable);
+}
+
static inline int get_tx_next_msg_obj(const struct c_can_priv *priv)
{
return (priv-tx_next C_CAN_NEXT_MSG_OBJ_MASK) +
@@ -1090,6 +1096,7 @@ static int c_can_open(struct net_device *dev)
struct c_can_priv *priv = netdev_priv(dev);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* open the can device */
err = open_candev(dev);
@@ -1118,6 +1125,7 @@ static int c_can_open(struct net_device *dev)
exit_irq_fail:
close_candev(dev);
exit_open_fail:
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return err;
}
@@ -1131,6 +1139,8 @@ static int c_can_close(struct net_device *dev)
c_can_stop(dev);
free_irq(dev-irq, dev);
close_candev(dev);
+
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1188,6 +1198,7 @@ int c_can_power_down(struct net_device *dev)
c_can_stop(dev);
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1206,6 +1217,7 @@ int c_can_power_up(struct net_device *dev)
WARN_ON(priv-type != BOSCH_D_CAN);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* Clear PDR and INIT bits */
val = priv-read_reg(priv, C_CAN_CTRL_EX_REG);
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index e5ed41d..419de5c 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -169,6 +169,9 @@ struct c_can_priv {
void *priv; /* for board-specific data */
u16 irqstatus;
enum c_can_dev_id type;
+ u32 __iomem *raminit_ctrlreg;
+ unsigned int instance;
+ void (*ram_init) (const struct c_can_priv *priv, bool enable);
};
struct net_device *alloc_c_can_dev(void);
diff --git a/drivers/net/can/c_can/c_can_platform.c
b/drivers/net/can/c_can/c_can_platform.c
index ee141613..d1c31c8 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -38,6 +38,8 @@
#include c_can.h
+#define CAN_RAMINIT_START_MASK(i)(1 (i))
+
/*
* 16-bit c_can registers can be arranged differently in the memory
* architecture of different implementations. For example: 16-bit
@@ -68,6 +70,21 @@ static void c_can_plat_write_reg_aligned_to_32bit(struct
c_can_priv *priv,
writew(val, priv-base + 2 * priv-regs[index]);
}
+static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
+{
+ u32 val;
+
+ val = readl(priv-raminit_ctrlreg);
+ if (enable) {
+ val = ~CAN_RAMINIT_START_MASK(priv-instance);
What's the point of clearing the bit first?
+ val |=
RE: [PATCH v2] can: c_can: Add d_can raminit support
On Wed, Nov 21, 2012 at 13:57:17, Marc Kleine-Budde wrote:
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current user of D_CAN driver) message RAM is
controlled through control module register for both instances. So
control module register details is required to initialization or
de-initialization of message RAM according to instance number.
Control module memory resource is obtained from D_CAN dt node and
instance number obtained from device tree aliases node.
This patch was tested on AM335x-EVM along with pinctrl data addition
patch, d_can dt aliases addition and control module data addition.
pinctrl data addition is not added to am335x-evm.dts (only supports
CPLD profile#0) because d_can1 is supported under CPLD profile#1.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
Changes from v1:
- Incorporated Marc's comments on v1
* sanity check moved to c_can_probe() from c_can_hw_raminit()
* device instance is assigned using conditional operator
* Changed warning to info to tell control module is not
used for raminit if there is no second IORESOURCE_MEM
- Dropped dt patches
* No changes from v1
* Those will go to linux-omap/master
drivers/net/can/c_can/c_can.c | 12
drivers/net/can/c_can/c_can.h |3 +++
drivers/net/can/c_can/c_can_platform.c | 33
+++-
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
index e5180df..c15830c 100644
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -233,6 +233,12 @@ static inline void c_can_pm_runtime_put_sync(const
struct c_can_priv *priv)
pm_runtime_put_sync(priv-device);
}
+static inline void c_can_reset_ram(const struct c_can_priv *priv, bool
enable)
+{
+ if (priv-ram_init)
+ priv-ram_init(priv, enable);
+}
+
static inline int get_tx_next_msg_obj(const struct c_can_priv *priv)
{
return (priv-tx_next C_CAN_NEXT_MSG_OBJ_MASK) +
@@ -1090,6 +1096,7 @@ static int c_can_open(struct net_device *dev)
struct c_can_priv *priv = netdev_priv(dev);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* open the can device */
err = open_candev(dev);
@@ -1118,6 +1125,7 @@ static int c_can_open(struct net_device *dev)
exit_irq_fail:
close_candev(dev);
exit_open_fail:
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return err;
}
@@ -1131,6 +1139,8 @@ static int c_can_close(struct net_device *dev)
c_can_stop(dev);
free_irq(dev-irq, dev);
close_candev(dev);
+
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1188,6 +1198,7 @@ int c_can_power_down(struct net_device *dev)
c_can_stop(dev);
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1206,6 +1217,7 @@ int c_can_power_up(struct net_device *dev)
WARN_ON(priv-type != BOSCH_D_CAN);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* Clear PDR and INIT bits */
val = priv-read_reg(priv, C_CAN_CTRL_EX_REG);
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index e5ed41d..419de5c 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -169,6 +169,9 @@ struct c_can_priv {
void *priv; /* for board-specific data */
u16 irqstatus;
enum c_can_dev_id type;
+ u32 __iomem *raminit_ctrlreg;
+ unsigned int instance;
+ void (*ram_init) (const struct c_can_priv *priv, bool enable);
};
struct net_device *alloc_c_can_dev(void);
diff --git a/drivers/net/can/c_can/c_can_platform.c
b/drivers/net/can/c_can/c_can_platform.c
index ee141613..d1c31c8 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -38,6 +38,8 @@
#include c_can.h
+#define CAN_RAMINIT_START_MASK(i) (1 (i))
+
/*
* 16-bit c_can registers can be arranged differently in the memory
* architecture of different implementations. For example: 16-bit
@@ -68,6 +70,21 @@ static void c_can_plat_write_reg_aligned_to_32bit(struct
c_can_priv *priv,
writew(val, priv-base + 2 * priv-regs[index]);
}
+static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
+{
+ u32 val;
+
+ val = readl(priv-raminit_ctrlreg);
+ if (enable) {
+ val = ~CAN_RAMINIT_START_MASK(priv-instance);
Re: [PATCH v2] can: c_can: Add d_can raminit support
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current user of D_CAN driver) message RAM is
controlled through control module register for both instances. So
control module register details is required to initialization or
de-initialization of message RAM according to instance number.
Control module memory resource is obtained from D_CAN dt node and
instance number obtained from device tree aliases node.
This patch was tested on AM335x-EVM along with pinctrl data addition
patch, d_can dt aliases addition and control module data addition.
pinctrl data addition is not added to am335x-evm.dts (only supports
CPLD profile#0) because d_can1 is supported under CPLD profile#1.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
[...]
@@ -178,6 +195,20 @@ static int __devinit c_can_plat_probe(struct
platform_device *pdev)
priv-can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
priv-read_reg = c_can_plat_read_reg_aligned_to_16bit;
priv-write_reg = c_can_plat_write_reg_aligned_to_16bit;
+
+ if (pdev-dev.of_node)
+ priv-instance = pdev-id 0 ?
+ of_alias_get_id(pdev-dev.of_node, d_can) :
+ pdev-id;
This wouldn't work with non DT kernels, what about:
if (pdev-dev.of_node)
priv-instance = of_alias_get_id(pdev-dev.of_node, d_can);
else
priv-instance = pdev-id;
Marc
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ priv-raminit_ctrlreg =
+ devm_request_and_ioremap(pdev-dev, res);
+ if (!priv-raminit_ctrlreg || priv-instance 0) {
+ dev_info(pdev-dev, control memory is not used for
raminit\n);
+ break;
+ }
+ priv-ram_init = c_can_hw_raminit;
break;
default:
ret = -EINVAL;
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions| Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917- |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
signature.asc
Description: OpenPGP digital signature
Re: [PATCH RESEND 02/10] ARM: dts: AM33XX: Add matrix keypad device tree data to am335x-evm
A == AnilKumar Ch anilku...@ti.com writes:
A Add matrix keypad device tree data to am335x-evm by adding all
A the necessary parameters like keymap, row column gpios and etc.
A Signed-off-by: AnilKumar Ch anilku...@ti.com
A ---
A arch/arm/boot/dts/am335x-evm.dts | 20
A 1 file changed, 20 insertions(+)
A diff --git a/arch/arm/boot/dts/am335x-evm.dts
b/arch/arm/boot/dts/am335x-evm.dts
A index 9199456..8076e66 100644
A --- a/arch/arm/boot/dts/am335x-evm.dts
A +++ b/arch/arm/boot/dts/am335x-evm.dts
A @@ -110,6 +110,26 @@
A regulator-name = lis3_reg;
A regulator-boot-on;
A };
A +
A + matrix_keypad: matrix_keypad@0 {
A + compatible = gpio-matrix-keypad;
A + debounce-delay-ms = 5;
A + col-scan-delay-us = 2;
A +
A + row-gpios = gpio2 25 0/* Bank1, pin25 */
A +gpio2 26 0/* Bank1, pin26 */
A +gpio2 27 0; /* Bank1, pin27 */
Sigh, can we PLEASE change am33xx.dtsi to use zero based index like the
TRM and get rid of this madness?
--
Bye, Peter Korsgaard
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RE: [PATCH v2] can: c_can: Add d_can raminit support
On Wed, Nov 21, 2012 at 14:18:56, Marc Kleine-Budde wrote:
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current user of D_CAN driver) message RAM is
controlled through control module register for both instances. So
control module register details is required to initialization or
de-initialization of message RAM according to instance number.
Control module memory resource is obtained from D_CAN dt node and
instance number obtained from device tree aliases node.
This patch was tested on AM335x-EVM along with pinctrl data addition
patch, d_can dt aliases addition and control module data addition.
pinctrl data addition is not added to am335x-evm.dts (only supports
CPLD profile#0) because d_can1 is supported under CPLD profile#1.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
[...]
@@ -178,6 +195,20 @@ static int __devinit c_can_plat_probe(struct
platform_device *pdev)
priv-can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
priv-read_reg = c_can_plat_read_reg_aligned_to_16bit;
priv-write_reg = c_can_plat_write_reg_aligned_to_16bit;
+
+ if (pdev-dev.of_node)
+ priv-instance = pdev-id 0 ?
+ of_alias_get_id(pdev-dev.of_node, d_can) :
+ pdev-id;
This wouldn't work with non DT kernels, what about:
if (pdev-dev.of_node)
priv-instance = of_alias_get_id(pdev-dev.of_node, d_can);
else
priv-instance = pdev-id;
I completely forgot this case, yes this is the correct way of doing it.
Thanks
AnilKumar
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ priv-raminit_ctrlreg =
+ devm_request_and_ioremap(pdev-dev, res);
+ if (!priv-raminit_ctrlreg || priv-instance 0) {
+ dev_info(pdev-dev, control memory is not used for
raminit\n);
+ break;
+ }
+ priv-ram_init = c_can_hw_raminit;
break;
default:
ret = -EINVAL;
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions| Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917- |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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[PATCH v3] can: c_can: Add d_can raminit support
From: AnilKumar Ch anilku...@ti.com
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current user of D_CAN driver) message RAM is
controlled through control module register for both instances. So
control module register details is required to initialization or
de-initialization of message RAM according to instance number.
Control module memory resource is obtained from D_CAN dt node and
instance number obtained from device tree aliases node.
This patch was tested on AM335x-EVM along with pinctrl data addition
patch, d_can dt aliases addition and control module data addition.
pinctrl data addition is not added to am335x-evm.dts (only supports
CPLD profile#0) because d_can1 is supported under CPLD profile#1.
Signed-off-by: AnilKumar Ch anilku...@ti.com
[mkl: fix instance for non DT in probe, cleaned up raminit]
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
---
Hello,
compile time tested only - please test on real HW.
changes since v2
- rename member in c_can_priv to raminit
(to be consistent with the rest of the driver)
- cleaned up c_can_hw_raminit()
- fix priv-instance for non DT platforms in c_can_plat_probe()
regards, Marc
drivers/net/can/c_can/c_can.c | 12
drivers/net/can/c_can/c_can.h |3 +++
drivers/net/can/c_can/c_can_platform.c | 28 +++-
3 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
index e5180df..5233b8f 100644
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -233,6 +233,12 @@ static inline void c_can_pm_runtime_put_sync(const struct
c_can_priv *priv)
pm_runtime_put_sync(priv-device);
}
+static inline void c_can_reset_ram(const struct c_can_priv *priv, bool enable)
+{
+ if (priv-raminit)
+ priv-raminit(priv, enable);
+}
+
static inline int get_tx_next_msg_obj(const struct c_can_priv *priv)
{
return (priv-tx_next C_CAN_NEXT_MSG_OBJ_MASK) +
@@ -1090,6 +1096,7 @@ static int c_can_open(struct net_device *dev)
struct c_can_priv *priv = netdev_priv(dev);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* open the can device */
err = open_candev(dev);
@@ -1118,6 +1125,7 @@ static int c_can_open(struct net_device *dev)
exit_irq_fail:
close_candev(dev);
exit_open_fail:
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return err;
}
@@ -1131,6 +1139,8 @@ static int c_can_close(struct net_device *dev)
c_can_stop(dev);
free_irq(dev-irq, dev);
close_candev(dev);
+
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1188,6 +1198,7 @@ int c_can_power_down(struct net_device *dev)
c_can_stop(dev);
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1206,6 +1217,7 @@ int c_can_power_up(struct net_device *dev)
WARN_ON(priv-type != BOSCH_D_CAN);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* Clear PDR and INIT bits */
val = priv-read_reg(priv, C_CAN_CTRL_EX_REG);
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index e5ed41d..d2e1c21 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -169,6 +169,9 @@ struct c_can_priv {
void *priv; /* for board-specific data */
u16 irqstatus;
enum c_can_dev_id type;
+ u32 __iomem *raminit_ctrlreg;
+ unsigned int instance;
+ void (*raminit) (const struct c_can_priv *priv, bool enable);
};
struct net_device *alloc_c_can_dev(void);
diff --git a/drivers/net/can/c_can/c_can_platform.c
b/drivers/net/can/c_can/c_can_platform.c
index ee14161..75c3f47 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -38,6 +38,8 @@
#include c_can.h
+#define CAN_RAMINIT_START_MASK(i) (1 (i))
+
/*
* 16-bit c_can registers can be arranged differently in the memory
* architecture of different implementations. For example: 16-bit
@@ -68,6 +70,18 @@ static void c_can_plat_write_reg_aligned_to_32bit(struct
c_can_priv *priv,
writew(val, priv-base + 2 * priv-regs[index]);
}
+static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
+{
+ u32 val;
+
+ val = readl(priv-raminit_ctrlreg);
+ if (enable)
+ val |= CAN_RAMINIT_START_MASK(priv-instance);
+ else
+ val = ~CAN_RAMINIT_START_MASK(priv-instance);
+ writel(val, priv-raminit_ctrlreg);
+}
+
static struct platform_device_id c_can_id_table[] = {
[BOSCH_C_CAN_PLATFORM]
Re: [PATCH 00/16] OMAP USB Host cleanup
Hi Tony, On 11/21/2012 01:13 AM, Tony Lindgren wrote: Hi Roger, * Kevin Hilman khil...@deeprootsystems.com [121119 15:24]: Roger Quadros rog...@ti.com writes: Kevin, On 11/16/2012 10:08 PM, Kevin Hilman wrote: Roger Quadros rog...@ti.com writes: Hi, This patchset addresses the following - Avoid addressing clocks one by one by name and use a for loop + bunch of cleanups. - Get number of channels/ports dynamically either from revision register or from platform data. Avoids getting clocks that are not present. - Add OMAP5 and HSIC mode (Not tested) - Save power on Panda when EHCI driver is not loaded. Seeing the clock changes/cleanups, I gave this a spin on OMAP3 (3530/Beagle, 3530/Overo, 3730/Beagle-xM, 3730/OveroSTORM) to see if it fixed up the problem where CORE does not hit retention in idle when USB host is enabled, even with no devices attached. Unfortunately, it didn't help. :( oh that's bad. But this series wasn't meant to fix that ;). Oh, sorry. Yeah, I didn't mean this as a nak. Just an opportunity to complain to the maintainers that a long-standing issue needs to be addressed. It seems that drivers/mfd/omap-usb-host.c is one of the last users of cpu_is_omap macros blocking enabling ARM multiplatform support for omap2+. Please fix that ASAP as early as possible in this patch series to remove the dependencies between core omap code development and driver development. Basically you need to remove #include plat/cpu.h and pass the revision information in platform data (and device tree compatible flag when that is supported). Okay I'll send a patch to fix that ASAP. Felipe, any comments on the patches in this series? regards, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3] can: c_can: Add d_can raminit support
On Wed, Nov 21, 2012 at 15:01:22, Marc Kleine-Budde wrote:
From: AnilKumar Ch anilku...@ti.com
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current user of D_CAN driver) message RAM is
controlled through control module register for both instances. So
control module register details is required to initialization or
de-initialization of message RAM according to instance number.
Control module memory resource is obtained from D_CAN dt node and
instance number obtained from device tree aliases node.
This patch was tested on AM335x-EVM along with pinctrl data addition
patch, d_can dt aliases addition and control module data addition.
pinctrl data addition is not added to am335x-evm.dts (only supports
CPLD profile#0) because d_can1 is supported under CPLD profile#1.
Signed-off-by: AnilKumar Ch anilku...@ti.com
[mkl: fix instance for non DT in probe, cleaned up raminit]
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
---
Hello,
compile time tested only - please test on real HW.
Hi Marc,
I tested this patch, its working.
Thanks
AnilKumar
changes since v2
- rename member in c_can_priv to raminit
(to be consistent with the rest of the driver)
- cleaned up c_can_hw_raminit()
- fix priv-instance for non DT platforms in c_can_plat_probe()
regards, Marc
drivers/net/can/c_can/c_can.c | 12
drivers/net/can/c_can/c_can.h |3 +++
drivers/net/can/c_can/c_can_platform.c | 28 +++-
3 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c
index e5180df..5233b8f 100644
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -233,6 +233,12 @@ static inline void c_can_pm_runtime_put_sync(const
struct c_can_priv *priv)
pm_runtime_put_sync(priv-device);
}
+static inline void c_can_reset_ram(const struct c_can_priv *priv, bool
enable)
+{
+ if (priv-raminit)
+ priv-raminit(priv, enable);
+}
+
static inline int get_tx_next_msg_obj(const struct c_can_priv *priv)
{
return (priv-tx_next C_CAN_NEXT_MSG_OBJ_MASK) +
@@ -1090,6 +1096,7 @@ static int c_can_open(struct net_device *dev)
struct c_can_priv *priv = netdev_priv(dev);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* open the can device */
err = open_candev(dev);
@@ -1118,6 +1125,7 @@ static int c_can_open(struct net_device *dev)
exit_irq_fail:
close_candev(dev);
exit_open_fail:
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return err;
}
@@ -1131,6 +1139,8 @@ static int c_can_close(struct net_device *dev)
c_can_stop(dev);
free_irq(dev-irq, dev);
close_candev(dev);
+
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1188,6 +1198,7 @@ int c_can_power_down(struct net_device *dev)
c_can_stop(dev);
+ c_can_reset_ram(priv, false);
c_can_pm_runtime_put_sync(priv);
return 0;
@@ -1206,6 +1217,7 @@ int c_can_power_up(struct net_device *dev)
WARN_ON(priv-type != BOSCH_D_CAN);
c_can_pm_runtime_get_sync(priv);
+ c_can_reset_ram(priv, true);
/* Clear PDR and INIT bits */
val = priv-read_reg(priv, C_CAN_CTRL_EX_REG);
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index e5ed41d..d2e1c21 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -169,6 +169,9 @@ struct c_can_priv {
void *priv; /* for board-specific data */
u16 irqstatus;
enum c_can_dev_id type;
+ u32 __iomem *raminit_ctrlreg;
+ unsigned int instance;
+ void (*raminit) (const struct c_can_priv *priv, bool enable);
};
struct net_device *alloc_c_can_dev(void);
diff --git a/drivers/net/can/c_can/c_can_platform.c
b/drivers/net/can/c_can/c_can_platform.c
index ee14161..75c3f47 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -38,6 +38,8 @@
#include c_can.h
+#define CAN_RAMINIT_START_MASK(i)(1 (i))
+
/*
* 16-bit c_can registers can be arranged differently in the memory
* architecture of different implementations. For example: 16-bit
@@ -68,6 +70,18 @@ static void c_can_plat_write_reg_aligned_to_32bit(struct
c_can_priv *priv,
writew(val, priv-base + 2 * priv-regs[index]);
}
+static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
+{
+ u32 val;
+
+ val = readl(priv-raminit_ctrlreg);
+ if (enable)
+ val |= CAN_RAMINIT_START_MASK(priv-instance);
+ else
+
Re: [PATCH v3] can: c_can: Add d_can raminit support
On 11/21/2012 11:07 AM, AnilKumar, Chimata wrote: On Wed, Nov 21, 2012 at 15:01:22, Marc Kleine-Budde wrote: From: AnilKumar Ch anilku...@ti.com Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM, which holds all the message objects during transmission or receiving of data. This initialization/de-initialization should be done in synchronous with D_CAN clock. In case of AM335X-EVM (current user of D_CAN driver) message RAM is controlled through control module register for both instances. So control module register details is required to initialization or de-initialization of message RAM according to instance number. Control module memory resource is obtained from D_CAN dt node and instance number obtained from device tree aliases node. This patch was tested on AM335x-EVM along with pinctrl data addition patch, d_can dt aliases addition and control module data addition. pinctrl data addition is not added to am335x-evm.dts (only supports CPLD profile#0) because d_can1 is supported under CPLD profile#1. Signed-off-by: AnilKumar Ch anilku...@ti.com [mkl: fix instance for non DT in probe, cleaned up raminit] Signed-off-by: Marc Kleine-Budde m...@pengutronix.de --- Hello, compile time tested only - please test on real HW. Hi Marc, I tested this patch, its working. Tnx, pushed to linux-can-next/master Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions| Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917- | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | signature.asc Description: OpenPGP digital signature
Re: [PATCH v3 4/4] ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND
On 20.11.2012 16:59, Peter Korsgaard wrote: Daniel == Daniel Mack zon...@gmail.com writes: Hi, In omap2 driver NAND_ECC_HW ecc mode supports 3 ecc layout OMAP_ECC_HAMMING_CODE_HW_ROMCODE OMAP_ECC_BCH4_CODE_HW OMAP_ECC_BCH8_CODE_HW So selection of ecc layout data should come from DT not ecc mode. Ok, I see. I would still like to set them by string rather than magic numbers that map to enum entries. Valid values would be none, hw, hw-romcode, bch4 and bch8. Are you ok with that? Ok, that's nice. Better use ecc_opt instead of ecc_mode. Daniel I did some more extensive tests that include reading the same Daniel nand pages from both U-Boot and the kernel with BCH8 ECC, and Daniel it turns out that - is_elm_used needs to be set in the pdata Daniel in order to make this work. So what you're saying is that the choice of ELM or not is not just an optimization, it really changes the ECC layout? Perhaps it should be treated as a seperate layout (E.G. bch8-elm) then? That is what I experienced, yes. The kernel was unable to parse NAND pages that were written from U-Boot with bch8 hardware mode when the elm module was not active. Maybe someone from TI can explain that? Giving it a dedicated name would also solve the problem with the extra DT property. I'll wait until this is decided before I resend a new set that also fixes the issue with the errornousely forgotten Documentation file. Thanks, Daniel -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 270/493] arm: remove use of __devinit
2012/11/20 Bill Pemberton wf...@virginia.edu: CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton wf...@virginia.edu Cc: Russell King li...@arm.linux.org.uk Cc: Will Deacon will.dea...@arm.com Cc: Jason Cooper ja...@lakedaemon.net Cc: Andrew Lunn and...@lunn.ch Cc: Sascha Hauer ker...@pengutronix.de Cc: Eric Miao eric.y.m...@gmail.com Cc: Haojian Zhuang haojian.zhu...@gmail.com Cc: David Brown dav...@codeaurora.org Cc: Daniel Walker dwal...@fifo99.com Cc: Bryan Huntsman bry...@codeaurora.org Cc: Tony Lindgren t...@atomide.com Cc: Kevin Hilman khil...@ti.com Cc: Barry Song baohua.s...@csr.com Cc: Ben Dooks ben-li...@fluff.org Cc: Kukjin Kim kgene@samsung.com Cc: linux-arm-ker...@lists.infradead.org Cc: linux-arm-...@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-...@vger.kernel.org Cc: patc...@opensource.wolfsonmicro.com Cc: linux-te...@vger.kernel.org --- Acked-by: Barry Song baohua.s...@csr.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 207/493] i2c: remove use of __devinit
2012/11/20 Bill Pemberton wf...@virginia.edu: CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton wf...@virginia.edu Cc: Jean Delvare kh...@linux-fr.org Cc: Wolfram Sang w.s...@pengutronix.de Cc: Ben Dooks ben-li...@fluff.org Cc: Rudolf Marek r.ma...@assembler.cz Cc: Jochen Friedrich joc...@scram.de Cc: Peter Korsgaard jac...@sunsite.dk Cc: Tony Lindgren t...@atomide.com Cc: Olof Johansson o...@lixom.net Cc: Vitaly Wool vitalyw...@gmail.com Cc: Guan Xuetao g...@mprc.pku.edu.cn Cc: Barry Song baohua.s...@csr.com Cc: Mark M. Hoffman mhoff...@lightlink.com Cc: linux-...@vger.kernel.org Cc: linuxppc-...@lists.ozlabs.org Cc: linux-omap@vger.kernel.org Cc: linux-arm-ker...@lists.infradead.org --- Acked-by: Barry Song baohua.s...@csr.com drivers/i2c/busses/i2c-ali1535.c| 4 ++-- drivers/i2c/busses/i2c-ali1563.c| 4 ++-- drivers/i2c/busses/i2c-ali15x3.c| 4 ++-- drivers/i2c/busses/i2c-amd756.c | 2 +- drivers/i2c/busses/i2c-amd8111.c| 2 +- drivers/i2c/busses/i2c-at91.c | 6 +++--- drivers/i2c/busses/i2c-au1550.c | 2 +- drivers/i2c/busses/i2c-cpm.c| 4 ++-- drivers/i2c/busses/i2c-designware-pcidrv.c | 2 +- drivers/i2c/busses/i2c-designware-platdrv.c | 2 +- drivers/i2c/busses/i2c-eg20t.c | 2 +- drivers/i2c/busses/i2c-elektor.c| 4 ++-- drivers/i2c/busses/i2c-gpio.c | 4 ++-- drivers/i2c/busses/i2c-highlander.c | 2 +- drivers/i2c/busses/i2c-hydra.c | 2 +- drivers/i2c/busses/i2c-i801.c | 14 +++--- drivers/i2c/busses/i2c-ibm_iic.c| 4 ++-- drivers/i2c/busses/i2c-intel-mid.c | 2 +- drivers/i2c/busses/i2c-isch.c | 2 +- drivers/i2c/busses/i2c-mpc.c| 20 ++-- drivers/i2c/busses/i2c-mv64xxx.c| 12 ++-- drivers/i2c/busses/i2c-mxs.c| 2 +- drivers/i2c/busses/i2c-nforce2.c| 4 ++-- drivers/i2c/busses/i2c-nuc900.c | 2 +- drivers/i2c/busses/i2c-ocores.c | 2 +- drivers/i2c/busses/i2c-octeon.c | 6 +++--- drivers/i2c/busses/i2c-omap.c | 2 +- drivers/i2c/busses/i2c-parport-light.c | 2 +- drivers/i2c/busses/i2c-pasemi.c | 2 +- drivers/i2c/busses/i2c-pca-isa.c| 4 ++-- drivers/i2c/busses/i2c-pca-platform.c | 2 +- drivers/i2c/busses/i2c-piix4.c | 10 +- drivers/i2c/busses/i2c-pmcmsp.c | 2 +- drivers/i2c/busses/i2c-pnx.c| 2 +- drivers/i2c/busses/i2c-powermac.c | 12 ++-- drivers/i2c/busses/i2c-puv3.c | 2 +- drivers/i2c/busses/i2c-pxa-pci.c| 2 +- drivers/i2c/busses/i2c-rcar.c | 2 +- drivers/i2c/busses/i2c-s6000.c | 4 ++-- drivers/i2c/busses/i2c-sh7760.c | 4 ++-- drivers/i2c/busses/i2c-sirf.c | 2 +- drivers/i2c/busses/i2c-sis5595.c| 4 ++-- drivers/i2c/busses/i2c-sis630.c | 4 ++-- drivers/i2c/busses/i2c-sis96x.c | 2 +- drivers/i2c/busses/i2c-tegra.c | 2 +- drivers/i2c/busses/i2c-via.c| 2 +- drivers/i2c/busses/i2c-viapro.c | 2 +- drivers/i2c/busses/i2c-xiic.c | 2 +- drivers/i2c/busses/i2c-xlr.c| 2 +- drivers/i2c/busses/scx200_acb.c | 10 +- drivers/i2c/muxes/i2c-mux-gpio.c| 4 ++-- drivers/i2c/muxes/i2c-mux-pinctrl.c | 2 +- 52 files changed, 103 insertions(+), 103 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/16] OMAP USB Host cleanup
Hi, On Wed, Nov 21, 2012 at 12:05:12PM +0200, Roger Quadros wrote: Hi Tony, On 11/21/2012 01:13 AM, Tony Lindgren wrote: Hi Roger, * Kevin Hilman khil...@deeprootsystems.com [121119 15:24]: Roger Quadros rog...@ti.com writes: Kevin, On 11/16/2012 10:08 PM, Kevin Hilman wrote: Roger Quadros rog...@ti.com writes: Hi, This patchset addresses the following - Avoid addressing clocks one by one by name and use a for loop + bunch of cleanups. - Get number of channels/ports dynamically either from revision register or from platform data. Avoids getting clocks that are not present. - Add OMAP5 and HSIC mode (Not tested) - Save power on Panda when EHCI driver is not loaded. Seeing the clock changes/cleanups, I gave this a spin on OMAP3 (3530/Beagle, 3530/Overo, 3730/Beagle-xM, 3730/OveroSTORM) to see if it fixed up the problem where CORE does not hit retention in idle when USB host is enabled, even with no devices attached. Unfortunately, it didn't help. :( oh that's bad. But this series wasn't meant to fix that ;). Oh, sorry. Yeah, I didn't mean this as a nak. Just an opportunity to complain to the maintainers that a long-standing issue needs to be addressed. It seems that drivers/mfd/omap-usb-host.c is one of the last users of cpu_is_omap macros blocking enabling ARM multiplatform support for omap2+. Please fix that ASAP as early as possible in this patch series to remove the dependencies between core omap code development and driver development. Basically you need to remove #include plat/cpu.h and pass the revision information in platform data (and device tree compatible flag when that is supported). Okay I'll send a patch to fix that ASAP. Felipe, any comments on the patches in this series? I'm waiting for Keshava's comments since he's the one who has been dealing with omap usb host the most. I can look into this series too shortly. -- balbi signature.asc Description: Digital signature
Re: [PATCH 01/16] mfd: omap-usb-tll: Avoid creating copy of platform data
On Thu, Nov 15, 2012 at 04:33:59PM +0200, Roger Quadros wrote:
Just a pointer to the platform data should suffice.
Signed-off-by: Roger Quadros rog...@ti.com
this looks fine to me:
Acked-by: Felipe Balbi ba...@ti.com
---
drivers/mfd/omap-usb-tll.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index 4b7757b..d1750a4 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -98,7 +98,7 @@
struct usbtll_omap {
struct clk *usbtll_p1_fck;
struct clk *usbtll_p2_fck;
- struct usbtll_omap_platform_dataplatdata;
+ struct usbtll_omap_platform_data*pdata;
/* secure the register updates */
spinlock_t lock;
};
@@ -223,8 +223,7 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
spin_lock_init(tll-lock);
- for (i = 0; i OMAP3_HS_USB_PORTS; i++)
- tll-platdata.port_mode[i] = pdata-port_mode[i];
+ tll-pdata = pdata;
tll-usbtll_p1_fck = clk_get(dev, usb_tll_hs_usb_ch0_clk);
if (IS_ERR(tll-usbtll_p1_fck)) {
@@ -362,7 +361,7 @@ static int __devexit usbtll_omap_remove(struct
platform_device *pdev)
static int usbtll_runtime_resume(struct device *dev)
{
struct usbtll_omap *tll = dev_get_drvdata(dev);
- struct usbtll_omap_platform_data*pdata = tll-platdata;
+ struct usbtll_omap_platform_data*pdata = tll-pdata;
unsigned long flags;
dev_dbg(dev, usbtll_runtime_resume\n);
@@ -388,7 +387,7 @@ static int usbtll_runtime_resume(struct device *dev)
static int usbtll_runtime_suspend(struct device *dev)
{
struct usbtll_omap *tll = dev_get_drvdata(dev);
- struct usbtll_omap_platform_data*pdata = tll-platdata;
+ struct usbtll_omap_platform_data*pdata = tll-pdata;
unsigned long flags;
dev_dbg(dev, usbtll_runtime_suspend\n);
--
1.7.4.1
--
balbi
signature.asc
Description: Digital signature
[PATCH RESEND] ARM: dts: AM33XX: Rename I2C and GPIO nodes
Rename I2C and GPIO nodes according to AM33XX TRM. According to
AM33XX TRM device instances are starting from 0 like i2c0, i2c1
and i2c3.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
[pa...@antoniou-consulting.com: initial patch by pantelis's]
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
Changes from first version:
- Updated pantelis's patch
* Modified based on linux-omap/master
* Added GPIO nodes renaming as well
arch/arm/boot/dts/am335x-bone.dts | 10 +-
arch/arm/boot/dts/am335x-evm.dts | 18 +-
arch/arm/boot/dts/am335x-evmsk.dts | 18 +-
arch/arm/boot/dts/am33xx.dtsi | 14 +++---
4 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-bone.dts
b/arch/arm/boot/dts/am335x-bone.dts
index 2c33888..77b4352 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -43,7 +43,7 @@
status = okay;
};
- i2c1: i2c@44e0b000 {
+ i2c0: i2c@44e0b000 {
status = okay;
clock-frequency = 40;
@@ -59,27 +59,27 @@
led@2 {
label = beaglebone:green:heartbeat;
- gpios = gpio2 21 0;
+ gpios = gpio1 21 0;
linux,default-trigger = heartbeat;
default-state = off;
};
led@3 {
label = beaglebone:green:mmc0;
- gpios = gpio2 22 0;
+ gpios = gpio1 22 0;
linux,default-trigger = mmc0;
default-state = off;
};
led@4 {
label = beaglebone:green:usr2;
- gpios = gpio2 23 0;
+ gpios = gpio1 23 0;
default-state = off;
};
led@5 {
label = beaglebone:green:usr3;
- gpios = gpio2 24 0;
+ gpios = gpio1 24 0;
default-state = off;
};
};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 9f65f17..705a9c5 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -51,7 +51,7 @@
status = okay;
};
- i2c1: i2c@44e0b000 {
+ i2c0: i2c@44e0b000 {
status = okay;
clock-frequency = 40;
@@ -60,7 +60,7 @@
};
};
- i2c2: i2c@4802a000 {
+ i2c1: i2c@4802a000 {
status = okay;
clock-frequency = 10;
@@ -123,12 +123,12 @@
debounce-delay-ms = 5;
col-scan-delay-us = 2;
- row-gpios = gpio2 25 0/* Bank1, pin25 */
-gpio2 26 0/* Bank1, pin26 */
-gpio2 27 0; /* Bank1, pin27 */
+ row-gpios = gpio1 25 0/* Bank1, pin25 */
+gpio1 26 0/* Bank1, pin26 */
+gpio1 27 0; /* Bank1, pin27 */
- col-gpios = gpio2 21 0/* Bank1, pin21 */
-gpio2 22 0; /* Bank1, pin22 */
+ col-gpios = gpio1 21 0/* Bank1, pin21 */
+gpio1 22 0; /* Bank1, pin22 */
linux,keymap = 0x008b /* MENU */
0x019e /* BACK */
@@ -147,14 +147,14 @@
switch@9 {
label = volume-up;
linux,code = 115;
- gpios = gpio1 2 1;
+ gpios = gpio0 2 1;
gpio-key,wakeup;
};
switch@10 {
label = volume-down;
linux,code = 114;
- gpios = gpio1 3 1;
+ gpios = gpio0 3 1;
gpio-key,wakeup;
};
};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts
b/arch/arm/boot/dts/am335x-evmsk.dts
index f5a6162..f67c360 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -58,7 +58,7 @@
status = okay;
};
- i2c1: i2c@44e0b000 {
+ i2c0: i2c@44e0b000 {
status = okay;
clock-frequency = 40;
@@ -115,26 +115,26 @@
led@1 {
label = evmsk:green:usr0;
- gpios = gpio2 4 0;
+ gpios = gpio1 4 0;
RE: [PATCH 032/493] arm: remove use of __devexit_p
Bill Pemberton wrote: CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton wf...@virginia.edu Cc: Russell King li...@arm.linux.org.uk Cc: Tony Lindgren t...@atomide.com Cc: Eric Miao eric.y.m...@gmail.com Cc: Haojian Zhuang haojian.zhu...@gmail.com Cc: Ben Dooks ben-li...@fluff.org Cc: Kukjin Kim kgene@samsung.com Cc: linux-arm-ker...@lists.infradead.org Cc: davinci-linux-open-sou...@linux.davincidsp.com Cc: linux-omap@vger.kernel.org Cc: linux-samsung-...@vger.kernel.org --- arch/arm/mach-s3c24xx/mach-osiris-dvs.c | 2 +- arch/arm/plat-samsung/adc.c | 2 +- For above s3c24xx and samsung, Acked-by: Kukjin Kim kgene@samsung.com Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 270/493] arm: remove use of __devinit
Bill Pemberton wrote: CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton wf...@virginia.edu Cc: Russell King li...@arm.linux.org.uk Cc: Will Deacon will.dea...@arm.com Cc: Jason Cooper ja...@lakedaemon.net Cc: Andrew Lunn and...@lunn.ch Cc: Sascha Hauer ker...@pengutronix.de Cc: Eric Miao eric.y.m...@gmail.com Cc: Haojian Zhuang haojian.zhu...@gmail.com Cc: David Brown dav...@codeaurora.org Cc: Daniel Walker dwal...@fifo99.com Cc: Bryan Huntsman bry...@codeaurora.org Cc: Tony Lindgren t...@atomide.com Cc: Kevin Hilman khil...@ti.com Cc: Barry Song baohua.s...@csr.com Cc: Ben Dooks ben-li...@fluff.org Cc: Kukjin Kim kgene@samsung.com Cc: linux-arm-ker...@lists.infradead.org Cc: linux-arm-...@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-...@vger.kernel.org Cc: patc...@opensource.wolfsonmicro.com Cc: linux-te...@vger.kernel.org --- [...] arch/arm/mach-s3c24xx/h1940-bluetooth.c | 2 +- arch/arm/mach-s3c24xx/mach-osiris-dvs.c | 2 +- arch/arm/mach-s3c64xx/mach-crag6410-module.c | 2 +- For above s3c24xx and s3c64xx, Acked-by: Kukjin Kim kgene@samsung.com Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 484/493] arm: remove use of __devexit
Bill Pemberton wrote: CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton wf...@virginia.edu Cc: Russell King li...@arm.linux.org.uk Cc: Eric Miao eric.y.m...@gmail.com Cc: Haojian Zhuang haojian.zhu...@gmail.com Cc: Tony Lindgren t...@atomide.com Cc: Ben Dooks ben-li...@fluff.org Cc: Kukjin Kim kgene@samsung.com Cc: linux-arm-ker...@lists.infradead.org Cc: davinci-linux-open-sou...@linux.davincidsp.com Cc: linux-omap@vger.kernel.org Cc: linux-samsung-...@vger.kernel.org --- [...] arch/arm/mach-s3c24xx/mach-osiris-dvs.c | 2 +- arch/arm/plat-samsung/adc.c | 2 +- For above s3c24xx and samsung, Acked-by: Kukjin Kim kgene@samsung.com Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 02/16] mfd: omap-usb-tll: Clean up clock handling
On Thu, Nov 15, 2012 at 04:34:00PM +0200, Roger Quadros wrote:
Every channel has a functional clock that is similarly named.
It makes sense to use a for loop to manage these clocks as OMAPs
can come with upto 3 channels.
s/upto/up to
BTW, this patch is doing a lot more than cleaning up clock handling.
This needs to be split into smaller patches.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 130
+---
1 files changed, 74 insertions(+), 56 deletions(-)
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index d1750a4..943ac14 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -82,8 +82,12 @@
#define OMAP_TLL_ULPI_DEBUG(num)(0x815 + 0x100
* num)
#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100
* num)
-#define OMAP_REV2_TLL_CHANNEL_COUNT 2
-#define OMAP_TLL_CHANNEL_COUNT 3
+#define REV2_TLL_CHANNEL_COUNT 2
why are you dropping the OMAP_ prefix ? You shouldn't do that.
+#define DEFAULT_TLL_CHANNEL_COUNT3
Add OMAP_ prefix here.
+
+/* Update if any chip has more */
+#define MAX_TLL_CHANNEL_COUNT3
can't you figure this one out in runtime ? If this isn't in any
registers (and looks like it's not), you can pass this information to
the driver via DT or just use driver_data field on struct
platform_driver.
#define OMAP_TLL_CHANNEL_1_EN_MASK (1 0)
#define OMAP_TLL_CHANNEL_2_EN_MASK (1 1)
#define OMAP_TLL_CHANNEL_3_EN_MASK (1 2)
@@ -96,8 +100,9 @@
#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
struct usbtll_omap {
- struct clk *usbtll_p1_fck;
- struct clk *usbtll_p2_fck;
+ void __iomem*base;
+ int nch;/* number of channels */
+ struct clk *ch_clk[MAX_TLL_CHANNEL_COUNT];
should be allocated dynamically.
struct usbtll_omap_platform_data*pdata;
/* secure the register updates */
spinlock_t lock;
@@ -210,49 +215,35 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
unsignedreg;
unsigned long flags;
int ret = 0;
- int i, ver, count;
+ int i, ver;
dev_dbg(dev, starting TI HSUSB TLL Controller\n);
tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL);
if (!tll) {
dev_err(dev, Memory allocation failed\n);
- ret = -ENOMEM;
- goto end;
+ return -ENOMEM;
}
spin_lock_init(tll-lock);
tll-pdata = pdata;
- tll-usbtll_p1_fck = clk_get(dev, usb_tll_hs_usb_ch0_clk);
- if (IS_ERR(tll-usbtll_p1_fck)) {
- ret = PTR_ERR(tll-usbtll_p1_fck);
- dev_err(dev, usbtll_p1_fck failed error:%d\n, ret);
- goto err_tll;
- }
-
- tll-usbtll_p2_fck = clk_get(dev, usb_tll_hs_usb_ch1_clk);
- if (IS_ERR(tll-usbtll_p2_fck)) {
- ret = PTR_ERR(tll-usbtll_p2_fck);
- dev_err(dev, usbtll_p2_fck failed error:%d\n, ret);
- goto err_usbtll_p1_fck;
- }
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, usb tll get resource failed\n);
ret = -ENODEV;
- goto err_usbtll_p2_fck;
+ goto err_mem;
}
base = ioremap(res-start, resource_size(res));
if (!base) {
dev_err(dev, TLL ioremap failed\n);
ret = -ENOMEM;
- goto err_usbtll_p2_fck;
+ goto err_mem;
}
+ tll-base = base;
platform_set_drvdata(pdev, tll);
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
@@ -262,16 +253,33 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
ver = usbtll_read(base, OMAP_USBTLL_REVISION);
switch (ver) {
case OMAP_USBTLL_REV1:
- case OMAP_USBTLL_REV2:
- count = OMAP_TLL_CHANNEL_COUNT;
+ tll-nch = DEFAULT_TLL_CHANNEL_COUNT;
break;
+ case OMAP_USBTLL_REV2:
case OMAP_USBTLL_REV3:
- count = OMAP_REV2_TLL_CHANNEL_COUNT;
+ tll-nch = REV2_TLL_CHANNEL_COUNT;
nice, you *can* figure that out based on the revision... In that case,
you shouldn't even define MAX_TLL_CHANNEL_COUNT, just allocate the array
dynamically for the exact size you need.
break;
default:
-
Re: [PATCH 03/16] mfd: omap-usb-tll: introduce and use mode_needs_tll()
On Thu, Nov 15, 2012 at 04:34:01PM +0200, Roger Quadros wrote:
This is a handy macro to check if the port requires the
USB TLL module or not. Use it to Enable the TLL module and manage
the clocks.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 20
1 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index 943ac14..7054395e 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -99,6 +99,10 @@
#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
+/* only PHY and UNUSED modes don't need TLL */
+#define mode_needs_tll(x)((x != OMAP_USBHS_PORT_MODE_UNUSED) \
prepend with omap_usb_
+ (x != OMAP_EHCI_PORT_MODE_PHY))
+
struct usbtll_omap {
void __iomem*base;
int nch;/* number of channels */
@@ -216,6 +220,7 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
unsigned long flags;
int ret = 0;
int i, ver;
+ bool needs_tll;
dev_dbg(dev, starting TI HSUSB TLL Controller\n);
@@ -282,12 +287,11 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
tll-ch_clk[i] = fck;
}
- if (is_ehci_tll_mode(pdata-port_mode[0]) ||
- is_ehci_tll_mode(pdata-port_mode[1]) ||
- is_ehci_tll_mode(pdata-port_mode[2]) ||
- is_ohci_port(pdata-port_mode[0]) ||
- is_ohci_port(pdata-port_mode[1]) ||
- is_ohci_port(pdata-port_mode[2])) {
+ needs_tll = false;
+ for (i = 0; i tll-nch; i++)
+ needs_tll |= mode_needs_tll(pdata-port_mode[i]);
+
+ if (needs_tll) {
/* Program Common TLL register */
reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
@@ -386,7 +390,7 @@ static int usbtll_runtime_resume(struct device *dev)
spin_lock_irqsave(tll-lock, flags);
for (i = 0; i tll-nch; i++) {
- if (is_ehci_tll_mode(pdata-port_mode[i])) {
+ if (mode_needs_tll(pdata-port_mode[i])) {
int r;
r = clk_enable(tll-ch_clk[i]);
if (r) {
@@ -419,7 +423,7 @@ static int usbtll_runtime_suspend(struct device *dev)
spin_lock_irqsave(tll-lock, flags);
for (i = 0; i tll-nch; i++) {
- if (is_ehci_tll_mode(pdata-port_mode[i]))
+ if (mode_needs_tll(pdata-port_mode[i]))
clk_disable(tll-ch_clk[i]);
}
--
1.7.4.1
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 077/493] mmc: remove use of __devexit_p
On Mon, 19 Nov 2012, Bill Pemberton wrote: drivers/mmc/host/sh_mobile_sdhi.c | 2 +- drivers/mmc/host/tmio_mmc.c| 2 +- Acked-by: Guennadi Liakhovetski g.liakhovet...@gmx.de Thanks Guennadi --- Guennadi Liakhovetski, Ph.D. Freelance Open-Source Software Developer http://www.open-technology.de/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 04/16] mfd: omap-usb-tll: Move port clock handling out of runtime ops
On Thu, Nov 15, 2012 at 04:34:02PM +0200, Roger Quadros wrote:
The port clocks are not required to access the port registers,
they are only needed when the PORT is used. So we move the port clock
handling code to omap_tll_enable/disable().
Also get of unnecessary spinlock code in probe function and check for
missing platform data.
this second sentence needs some rephrasing, I don't fully understand
what you mean.
This patch also does more than what $SUBJECT says, should be splitted
up.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 102
+---
1 files changed, 39 insertions(+), 63 deletions(-)
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index 7054395e..31ac7db 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -114,8 +114,8 @@ struct usbtll_omap {
/*-*/
-const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
-struct platform_device *tll_pdev;
+static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
+static struct device *tll_dev;
/*-*/
@@ -217,7 +217,6 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
struct resource *res;
struct usbtll_omap *tll;
unsignedreg;
- unsigned long flags;
int ret = 0;
int i, ver;
bool needs_tll;
@@ -230,6 +229,11 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
return -ENOMEM;
}
+ if (!pdata) {
+ dev_err(dev, %s : Platform data mising\n, __func__);
+ return -ENODEV;
+ }
+
spin_lock_init(tll-lock);
tll-pdata = pdata;
@@ -253,8 +257,6 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
- spin_lock_irqsave(tll-lock, flags);
-
ver = usbtll_read(base, OMAP_USBTLL_REVISION);
switch (ver) {
case OMAP_USBTLL_REV1:
@@ -331,13 +333,13 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
}
}
- tll_pdev = pdev;
+ /* only after this can omap_tll_enable/disable work */
+ tll_dev = dev;
I'd like to get rid of that, actually. But for now we can keep it...
err_clk:
for (--i; i = 0 ; i--)
clk_put(tll-ch_clk[i]);
- spin_unlock_irqrestore(tll-lock, flags);
pm_runtime_put_sync(dev);
if (ret == 0) {
pr_info(OMAP USB TLL : revision 0x%x, channels %d\n,
@@ -364,6 +366,7 @@ static int __devexit usbtll_omap_remove(struct
platform_device *pdev)
struct usbtll_omap *tll = platform_get_drvdata(pdev);
int i;
+ tll_dev = NULL;
iounmap(tll-base);
for (i = 0; i tll-nch; i++)
clk_put(tll-ch_clk[i]);
@@ -373,98 +376,71 @@ static int __devexit usbtll_omap_remove(struct
platform_device *pdev)
return 0;
}
-static int usbtll_runtime_resume(struct device *dev)
+static struct platform_driver usbtll_omap_driver = {
+ .driver = {
+ .name = (char *)usbtll_driver_name,
+ .owner = THIS_MODULE,
+ },
+ .probe = usbtll_omap_probe,
+ .remove = __devexit_p(usbtll_omap_remove),
there is a big patchset floating around dropping CONFIG_HOTPLUG, that
means that __devinit, __devexit, __devexit_p(), __devinitdata,
__devinitconst will all vanish. Please don't re-add them ;-)
+};
+
+int omap_tll_enable(void)
{
- struct usbtll_omap *tll = dev_get_drvdata(dev);
- struct usbtll_omap_platform_data*pdata = tll-pdata;
+ struct usbtll_omap *tll;
unsigned long flags;
int i;
- dev_dbg(dev, usbtll_runtime_resume\n);
-
- if (!pdata) {
- dev_dbg(dev, missing platform_data\n);
+ if (!tll_dev) {
+ pr_err(%s: OMAP USB TLL not initialized\n, __func__);
return -ENODEV;
}
+ tll = dev_get_drvdata(tll_dev);
spin_lock_irqsave(tll-lock, flags);
for (i = 0; i tll-nch; i++) {
- if (mode_needs_tll(pdata-port_mode[i])) {
+ if (mode_needs_tll(tll-pdata-port_mode[i])) {
int r;
r = clk_enable(tll-ch_clk[i]);
if (r) {
- dev_err(dev,
- %s : Error enabling ch %d clock: %d\n,
- __func__, i, r);
+ dev_err(tll_dev,
Re: [PATCH 05/16] mfd: omap-usb-tll: Add OMAP5 revision and HSIC support
On Thu, Nov 15, 2012 at 04:34:03PM +0200, Roger Quadros wrote: The TLL module on OMAP5 has 3 channels. HSIC mode requires the TLL channel to be in Transparent UTMI mode. Signed-off-by: Roger Quadros rog...@ti.com --- drivers/mfd/omap-usb-tll.c | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index 31ac7db..c48d545 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -54,10 +54,13 @@ #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 +#define OMAP_TLL_CHANNEL_CONF_DRVVBUS(1 16) +#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 15) #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF(1 11) #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 10) #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 9) #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 8) +#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 1) #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 1) #define OMAP_TLL_CHANNEL_CONF_CHANEN(1 0) @@ -96,6 +99,7 @@ #define OMAP_USBTLL_REV1 0x0015 /* OMAP3 */ #define OMAP_USBTLL_REV2 0x0018 /* OMAP 3630 */ #define OMAP_USBTLL_REV3 0x0004 /* OMAP4 */ +#define OMAP_USBTLL_REV4 0x6 /* OMAP5 */ looks wrong to me. Are you sure this is what that 32-bit register reads out ? Bits[31:30] should read as 0b01 as per internal documentation. -- balbi signature.asc Description: Digital signature
Re: [PATCH 02/16] mfd: omap-usb-tll: Clean up clock handling
Felipe,
Thanks for reviewing.
On 11/21/2012 01:55 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:00PM +0200, Roger Quadros wrote:
Every channel has a functional clock that is similarly named.
It makes sense to use a for loop to manage these clocks as OMAPs
can come with upto 3 channels.
s/upto/up to
BTW, this patch is doing a lot more than cleaning up clock handling.
This needs to be split into smaller patches.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 130
+---
1 files changed, 74 insertions(+), 56 deletions(-)
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index d1750a4..943ac14 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -82,8 +82,12 @@
#define OMAP_TLL_ULPI_DEBUG(num)(0x815 + 0x100
* num)
#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100
* num)
-#define OMAP_REV2_TLL_CHANNEL_COUNT 2
-#define OMAP_TLL_CHANNEL_COUNT 3
+#define REV2_TLL_CHANNEL_COUNT 2
why are you dropping the OMAP_ prefix ? You shouldn't do that.
+#define DEFAULT_TLL_CHANNEL_COUNT 3
Add OMAP_ prefix here.
+
+/* Update if any chip has more */
+#define MAX_TLL_CHANNEL_COUNT 3
can't you figure this one out in runtime ? If this isn't in any
registers (and looks like it's not), you can pass this information to
the driver via DT or just use driver_data field on struct
platform_driver.
#define OMAP_TLL_CHANNEL_1_EN_MASK (1 0)
#define OMAP_TLL_CHANNEL_2_EN_MASK (1 1)
#define OMAP_TLL_CHANNEL_3_EN_MASK (1 2)
@@ -96,8 +100,9 @@
#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
struct usbtll_omap {
-struct clk *usbtll_p1_fck;
-struct clk *usbtll_p2_fck;
+void __iomem*base;
+int nch;/* number of channels */
+struct clk *ch_clk[MAX_TLL_CHANNEL_COUNT];
should be allocated dynamically.
struct usbtll_omap_platform_data*pdata;
/* secure the register updates */
spinlock_t lock;
@@ -210,49 +215,35 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
unsignedreg;
unsigned long flags;
int ret = 0;
-int i, ver, count;
+int i, ver;
dev_dbg(dev, starting TI HSUSB TLL Controller\n);
tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL);
if (!tll) {
dev_err(dev, Memory allocation failed\n);
-ret = -ENOMEM;
-goto end;
+return -ENOMEM;
}
spin_lock_init(tll-lock);
tll-pdata = pdata;
-tll-usbtll_p1_fck = clk_get(dev, usb_tll_hs_usb_ch0_clk);
-if (IS_ERR(tll-usbtll_p1_fck)) {
-ret = PTR_ERR(tll-usbtll_p1_fck);
-dev_err(dev, usbtll_p1_fck failed error:%d\n, ret);
-goto err_tll;
-}
-
-tll-usbtll_p2_fck = clk_get(dev, usb_tll_hs_usb_ch1_clk);
-if (IS_ERR(tll-usbtll_p2_fck)) {
-ret = PTR_ERR(tll-usbtll_p2_fck);
-dev_err(dev, usbtll_p2_fck failed error:%d\n, ret);
-goto err_usbtll_p1_fck;
-}
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, usb tll get resource failed\n);
ret = -ENODEV;
-goto err_usbtll_p2_fck;
+goto err_mem;
}
base = ioremap(res-start, resource_size(res));
if (!base) {
dev_err(dev, TLL ioremap failed\n);
ret = -ENOMEM;
-goto err_usbtll_p2_fck;
+goto err_mem;
}
+tll-base = base;
platform_set_drvdata(pdev, tll);
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
@@ -262,16 +253,33 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
ver = usbtll_read(base, OMAP_USBTLL_REVISION);
switch (ver) {
case OMAP_USBTLL_REV1:
-case OMAP_USBTLL_REV2:
-count = OMAP_TLL_CHANNEL_COUNT;
+tll-nch = DEFAULT_TLL_CHANNEL_COUNT;
break;
+case OMAP_USBTLL_REV2:
case OMAP_USBTLL_REV3:
-count = OMAP_REV2_TLL_CHANNEL_COUNT;
+tll-nch = REV2_TLL_CHANNEL_COUNT;
nice, you *can* figure that out based on the revision... In that case,
you shouldn't even define MAX_TLL_CHANNEL_COUNT, just allocate the array
dynamically for the exact size you need.
OK.
Re: [PATCH 03/16] mfd: omap-usb-tll: introduce and use mode_needs_tll()
On 11/21/2012 01:57 PM, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:01PM +0200, Roger Quadros wrote: This is a handy macro to check if the port requires the USB TLL module or not. Use it to Enable the TLL module and manage the clocks. Signed-off-by: Roger Quadros rog...@ti.com --- drivers/mfd/omap-usb-tll.c | 20 1 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index 943ac14..7054395e 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -99,6 +99,10 @@ #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL) +/* only PHY and UNUSED modes don't need TLL */ +#define mode_needs_tll(x) ((x != OMAP_USBHS_PORT_MODE_UNUSED) \ prepend with omap_usb_ OK. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 04/16] mfd: omap-usb-tll: Move port clock handling out of runtime ops
On 11/21/2012 02:06 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:02PM +0200, Roger Quadros wrote:
The port clocks are not required to access the port registers,
they are only needed when the PORT is used. So we move the port clock
handling code to omap_tll_enable/disable().
Also get of unnecessary spinlock code in probe function and check for
missing platform data.
this second sentence needs some rephrasing, I don't fully understand
what you mean.
Oops. should have been get _rid_ of.
This patch also does more than what $SUBJECT says, should be splitted
up.
OK.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 102
+---
1 files changed, 39 insertions(+), 63 deletions(-)
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index 7054395e..31ac7db 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -114,8 +114,8 @@ struct usbtll_omap {
/*-*/
-const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
-struct platform_device *tll_pdev;
+static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
+static struct device *tll_dev;
/*-*/
@@ -217,7 +217,6 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
struct resource *res;
struct usbtll_omap *tll;
unsignedreg;
-unsigned long flags;
int ret = 0;
int i, ver;
bool needs_tll;
@@ -230,6 +229,11 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
return -ENOMEM;
}
+if (!pdata) {
+dev_err(dev, %s : Platform data mising\n, __func__);
+return -ENODEV;
+}
+
spin_lock_init(tll-lock);
tll-pdata = pdata;
@@ -253,8 +257,6 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
-spin_lock_irqsave(tll-lock, flags);
-
ver = usbtll_read(base, OMAP_USBTLL_REVISION);
switch (ver) {
case OMAP_USBTLL_REV1:
@@ -331,13 +333,13 @@ static int __devinit usbtll_omap_probe(struct
platform_device *pdev)
}
}
-tll_pdev = pdev;
+/* only after this can omap_tll_enable/disable work */
+tll_dev = dev;
I'd like to get rid of that, actually. But for now we can keep it...
err_clk:
for (--i; i = 0 ; i--)
clk_put(tll-ch_clk[i]);
-spin_unlock_irqrestore(tll-lock, flags);
pm_runtime_put_sync(dev);
if (ret == 0) {
pr_info(OMAP USB TLL : revision 0x%x, channels %d\n,
@@ -364,6 +366,7 @@ static int __devexit usbtll_omap_remove(struct
platform_device *pdev)
struct usbtll_omap *tll = platform_get_drvdata(pdev);
int i;
+tll_dev = NULL;
iounmap(tll-base);
for (i = 0; i tll-nch; i++)
clk_put(tll-ch_clk[i]);
@@ -373,98 +376,71 @@ static int __devexit usbtll_omap_remove(struct
platform_device *pdev)
return 0;
}
-static int usbtll_runtime_resume(struct device *dev)
+static struct platform_driver usbtll_omap_driver = {
+.driver = {
+.name = (char *)usbtll_driver_name,
+.owner = THIS_MODULE,
+},
+.probe = usbtll_omap_probe,
+.remove = __devexit_p(usbtll_omap_remove),
there is a big patchset floating around dropping CONFIG_HOTPLUG, that
means that __devinit, __devexit, __devexit_p(), __devinitdata,
__devinitconst will all vanish. Please don't re-add them ;-)
OK. good to know.
+};
+
+int omap_tll_enable(void)
{
-struct usbtll_omap *tll = dev_get_drvdata(dev);
-struct usbtll_omap_platform_data*pdata = tll-pdata;
+struct usbtll_omap *tll;
unsigned long flags;
int i;
-dev_dbg(dev, usbtll_runtime_resume\n);
-
-if (!pdata) {
-dev_dbg(dev, missing platform_data\n);
+if (!tll_dev) {
+pr_err(%s: OMAP USB TLL not initialized\n, __func__);
return -ENODEV;
}
+tll = dev_get_drvdata(tll_dev);
spin_lock_irqsave(tll-lock, flags);
for (i = 0; i tll-nch; i++) {
-if (mode_needs_tll(pdata-port_mode[i])) {
+if (mode_needs_tll(tll-pdata-port_mode[i])) {
int r;
r = clk_enable(tll-ch_clk[i]);
if (r) {
-dev_err(dev,
- %s : Error enabling ch %d clock: %d\n,
- __func__,
Re: [PATCH 05/16] mfd: omap-usb-tll: Add OMAP5 revision and HSIC support
On 11/21/2012 02:12 PM, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:03PM +0200, Roger Quadros wrote: The TLL module on OMAP5 has 3 channels. HSIC mode requires the TLL channel to be in Transparent UTMI mode. Signed-off-by: Roger Quadros rog...@ti.com --- drivers/mfd/omap-usb-tll.c | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index 31ac7db..c48d545 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -54,10 +54,13 @@ #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT24 +#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 16) +#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 15) #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF(1 11) #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 10) #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 9) #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 8) +#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 1) #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 1) #define OMAP_TLL_CHANNEL_CONF_CHANEN(1 0) @@ -96,6 +99,7 @@ #define OMAP_USBTLL_REV10x0015 /* OMAP3 */ #define OMAP_USBTLL_REV20x0018 /* OMAP 3630 */ #define OMAP_USBTLL_REV30x0004 /* OMAP4 */ +#define OMAP_USBTLL_REV40x6 /* OMAP5 */ looks wrong to me. Are you sure this is what that 32-bit register reads out ? Bits[31:30] should read as 0b01 as per internal documentation. Yes I'm pretty sure about that. I'm on 5432 though. Not sure if 5430 shows different. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND] ARM: dts: AM33XX: Rename I2C and GPIO nodes
A == AnilKumar Ch anilku...@ti.com writes: A Rename I2C and GPIO nodes according to AM33XX TRM. According to A AM33XX TRM device instances are starting from 0 like i2c0, i2c1 A and i2c3. A Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com A [pa...@antoniou-consulting.com: initial patch by pantelis's] A Signed-off-by: AnilKumar Ch anilku...@ti.com Thanks! Acked-by: Peter Korsgaard jac...@sunsite.dk -- Bye, Peter Korsgaard -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 00/11] Support for AM33xx PWM Subsystem
In AM33xx PWM sub modules like ECAP, EHRPWM EQEP are integrated to PWM subsystem. All these submodules shares the resources (clock) has a clock gating register in PWM Subsystem. This patch series creates a parent PWM Subsystem driver to handle access synchronization of shared resources clock gating from PWM Subsystem configuration space. Also Device tree nodes populated to support parent child relation between PWMSS, ECAP EHRPWM submodules. In addition EHRPWM module requires explicit clock gating from control module is handled by patch #2 8. As suggested by Thierry for handling clock gating for PWM submodules should handle with a global function. This requires config space handling done independent from driver and is done at parent driver. So the parent-child relation adopted to handle 1. pm runtime synchronization 2. PWM subsystem common config space clock gating for PWM submodules. Patches supports - Driver support for parent child relation handled patch #1 - Optional EHRPWM tb clock in patch #2 - Parent child in HWMOD handled at patch #3 - Device tree binding support handled in patch #4, 6 8 - pinctrl support in patch #5 7. - DT node populated in patch #9 ,10 11. This patch series based on omap_dt/for_3.8/dts_part2 and tested on am335x-evm am335x-evmsk. It depends on [1] 1. https://lkml.org/lkml/2012/11/21/70 pwm: Device tree support for PWM polarity Changes since v3: - Rebased on top of omap_dt/for_3.8/dts_part2 - Add pwm backlight for am335xevm_sk - Moved tipwmss.h to pwm-tipwmss.h Philip, Avinash (11): PWMSS: Add PWM Subsystem driver for parent-child relationship ARM: am33xx: clk: Add optional clock for EHRPWM ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem pwm: pwm-tiecap: Add device-tree binding support for APWM driver pwm: pwm-tiecap: pinctrl support pwm: pwm-tiehrpwm: Add device-tree binding support for EHRPWM driver pwm: pwm-tiehrpwm: pinctrl support pwm: pwm-tiehrpwm: Adding TBCLK gating support. ARM: dts: AM33XX: Add PWMSS device tree nodes ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk .../devicetree/bindings/pwm/pwm-tiecap.txt | 23 ++ .../devicetree/bindings/pwm/pwm-tiehrpwm.txt | 23 ++ .../devicetree/bindings/pwm/pwm-tipwmss.txt| 31 ++ arch/arm/boot/dts/am335x-evm.dts | 23 ++ arch/arm/boot/dts/am335x-evmsk.dts | 23 ++ arch/arm/boot/dts/am33xx.dtsi | 84 arch/arm/mach-omap2/clock33xx_data.c | 37 ++ arch/arm/mach-omap2/control.h |8 + arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 419 +--- drivers/pwm/Kconfig| 11 + drivers/pwm/Makefile |1 + drivers/pwm/pwm-tiecap.c | 50 +++- drivers/pwm/pwm-tiehrpwm.c | 65 +++- drivers/pwm/pwm-tipwmss.c | 143 +++ drivers/pwm/pwm-tipwmss.h | 39 ++ 15 files changed, 835 insertions(+), 145 deletions(-) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-tiecap.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt create mode 100644 drivers/pwm/pwm-tipwmss.c create mode 100644 drivers/pwm/pwm-tipwmss.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 01/11] PWMSS: Add PWM Subsystem driver for parent-child relationship
In some platforms (like am33xx), PWM sub modules (ECAP, EHRPWM, EQEP)
are integrated to PWM subsystem. These PWM submodules has resources
shared and only one register bit-field is provided to control
module/clock enable/disable, makes it difficult to handle common
resources from independent PWMSS submodule drivers.
So the solution here implemented in this patch is, to create driver for
PWMSS and take the role of parent driver for PWM submodules. PWMSS
parent driver enumerates all the child nodes under PWMSS module. Also
symbol pwmss_submodule_state_change exported to enable clock gating
for individual PWMSS submodules, and submodule drivers has to enable
clock gating from their drivers.
As this is only supported during DT boot, the parent-child relationship
is created and populated in DT execution flow. The only required change
is inside DTS file, making EHRPWM ECAP as a child to PWMSS node.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v3:
- Corrected the usage of ranges property in documentation.
- Add pwm prefix to tipwmss.h file
Changes since v2:
- Set build attribute to bool type.
- Add pwm prefix to tipwmss.c file
- Span mutex protection for read modify approach.
- Use SET_SYSTEM_SLEEP_PM_OPS
- Add PWM subsystem bit fields to tipwmss.h
- Remove devinit devexit attributes.
- Left out adding of child node's DT property in Documentation
as those definitions are part of later patches.
Changes since v1:
- Add conditional check for PWM subsystem clock enabling.
- Add context save/restore for PWM subsystem clock config register.
:00 100644 000... b067ea7... A
Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
:100644 100644 ed81720... 1dc32a8... M drivers/pwm/Kconfig
:100644 100644 acfe482... e12b722... M drivers/pwm/Makefile
:00 100644 000... 30d3674... A drivers/pwm/pwm-tipwmss.c
:00 100644 000... 11f76a1... A drivers/pwm/pwm-tipwmss.h
.../devicetree/bindings/pwm/pwm-tipwmss.txt| 31 +
drivers/pwm/Kconfig| 11 ++
drivers/pwm/Makefile |1 +
drivers/pwm/pwm-tipwmss.c | 143
drivers/pwm/pwm-tipwmss.h | 39 ++
5 files changed, 225 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
new file mode 100644
index 000..b067ea7
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
@@ -0,0 +1,31 @@
+TI SOC based PWM Subsystem
+
+Required properties:
+- compatible: Must be ti,am33xx-pwmss;
+- reg: physical base address and size of the registers map.
+- address-cells: Specify the number of u32 entries needed in child nodes.
+ Should set to 1.
+- size-cells: specify number of u32 entries needed to specify child nodes size
+ in reg property. Should set to 1.
+- ranges: describes the address mapping of a memory-mapped bus. Should set to
+ physical address map of child's base address, physical address within
+ parent's address space and length of the address map. For am33xx,
+ 3 set of child register maps present, ECAP register space, EQEP
+ register space, EHRPWM register space.
+
+Also child nodes should also populated under PWMSS DT node.
+
+Example:
+pwmss0: pwmss@4830 {
+ compatible = ti,am33xx-pwmss;
+ reg = 0x4830 0x10;
+ ti,hwmods = epwmss0;
+ #address-cells = 1;
+ #size-cells = 1;
+ status = disabled;
+ ranges = 0x48300100 0x48300100 0x80 /* ECAP */
+ 0x48300180 0x48300180 0x80 /* EQEP */
+ 0x48300200 0x48300200 0x80; /* EHRPWM */
+
+ /* child nodes go here */
+};
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index ed81720..1dc32a8 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -125,6 +125,7 @@ config PWM_TEGRA
config PWM_TIECAP
tristate ECAP PWM support
depends on SOC_AM33XX
+ select PWM_TIPWMSS
help
PWM driver support for the ECAP APWM controller found on AM33XX
TI SOC
@@ -135,6 +136,7 @@ config PWM_TIECAP
config PWM_TIEHRPWM
tristate EHRPWM PWM support
depends on SOC_AM33XX
+ select PWM_TIPWMSS
help
PWM driver support for the EHRPWM controller found on AM33XX
TI SOC
@@ -142,6 +144,15 @@ config PWM_TIEHRPWM
To compile this driver as a module, choose M here: the module
will be called pwm-tiehrpwm.
+config PWM_TIPWMSS
+ bool
+ depends on SOC_AM33XX (PWM_TIEHRPWM || PWM_TIECAP)
+ help
+ PWM Subsystem driver support for AM33xx SOC.
+
+ PWM submodules require PWM config space access from submodule
+ drivers and require common
[PATCH v4 02/11] ARM: am33xx: clk: Add optional clock for EHRPWM
EHRPWM module requires explicit clock gating from control module.
Hence add clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 1a45d6b... 08b21d2... M arch/arm/mach-omap2/clock33xx_data.c
:100644 100644 a89e825... c0e34e6... M arch/arm/mach-omap2/control.h
arch/arm/mach-omap2/clock33xx_data.c | 37 ++
arch/arm/mach-omap2/control.h|8 +++
2 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock33xx_data.c
b/arch/arm/mach-omap2/clock33xx_data.c
index 1a45d6b..08b21d2 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -996,6 +996,40 @@ static struct clk wdt1_fck = {
};
/*
+ * PWMSS Time based module clock node. This node is
+ * requred to enable clock gating for EHRPWM TBCLK.
+ */
+static struct clk ehrpwm0_tbclk = {
+ .name = ehrpwm0_tbclk,
+ .clkdm_name = l4ls_clkdm,
+ .enable_reg = AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL),
+ .enable_bit = AM33XX_PWMSS0_TBCLKEN_SHIFT,
+ .ops= clkops_omap2_dflt,
+ .parent = l4ls_gclk,
+ .recalc = followparent_recalc,
+};
+
+static struct clk ehrpwm1_tbclk = {
+ .name = ehrpwm1_tbclk,
+ .clkdm_name = l4ls_clkdm,
+ .enable_reg = AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL),
+ .enable_bit = AM33XX_PWMSS1_TBCLKEN_SHIFT,
+ .ops= clkops_omap2_dflt,
+ .parent = l4ls_gclk,
+ .recalc = followparent_recalc,
+};
+
+static struct clk ehrpwm2_tbclk = {
+ .name = ehrpwm2_tbclk,
+ .clkdm_name = l4ls_clkdm,
+ .enable_reg = AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL),
+ .enable_bit = AM33XX_PWMSS2_TBCLKEN_SHIFT,
+ .ops= clkops_omap2_dflt,
+ .parent = l4ls_gclk,
+ .recalc = followparent_recalc,
+};
+
+/*
* clkdev
*/
static struct omap_clk am33xx_clks[] = {
@@ -1075,6 +1109,9 @@ static struct omap_clk am33xx_clks[] = {
CLK(NULL, clkout2_ck, clkout2_ck,CK_AM33XX),
CLK(NULL, timer_32k_ck, clkdiv32k_ick, CK_AM33XX),
CLK(NULL, timer_sys_ck, sys_clkin_ck, CK_AM33XX),
+ CLK(NULL, ehrpwm0_tbclk,ehrpwm0_tbclk, CK_AM33XX),
+ CLK(NULL, ehrpwm1_tbclk,ehrpwm1_tbclk, CK_AM33XX),
+ CLK(NULL, ehrpwm2_tbclk,ehrpwm2_tbclk, CK_AM33XX),
};
int __init am33xx_clk_init(void)
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a89e825..c0e34e6 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -357,6 +357,14 @@
#define AM33XX_CONTROL_STATUS_SYSBOOT1_WIDTH 0x2
#define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK(0x3 22)
+/* AM33XX PWMSS Control register */
+#define AM33XX_PWMSS_TBCLK_CLKCTRL 0x664
+
+/* AM33XX PWMSS Control bitfields */
+#define AM33XX_PWMSS0_TBCLKEN_SHIFT0
+#define AM33XX_PWMSS1_TBCLKEN_SHIFT1
+#define AM33XX_PWMSS2_TBCLKEN_SHIFT2
+
/* CONTROL OMAP STATUS register to identify OMAP3 features */
#define OMAP3_CONTROL_OMAP_STATUS 0x044c
--
1.7.0.4
--
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[PATCH v4 03/11] ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP EHRPWM).
To handle resource sharing IP integration
1. Rework on parent child relation between PWMSS and
ECAP, EQEP EHRPWM child devices to support runtime PM.
2. Add support for opt_clks in EHRPWM HWMOD entry to handle additional
clock gating from control module.
3. Add HWMOD entries for EQEP PWM submodule.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v1:
- Remove ADDR_TYPE_RT for PWM sub module register entries.
:100644 100644 59d5c1c... b45e6d3... M
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 419 ++--
1 files changed, 276 insertions(+), 143 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 59d5c1c..b45e6d3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -768,9 +768,7 @@ static struct omap_hwmod am33xx_elm_hwmod = {
},
};
-/*
- * 'epwmss' class: ecap0,1,2, ehrpwm0,1,2
- */
+/* pwmss */
static struct omap_hwmod_class_sysconfig am33xx_epwmss_sysc = {
.rev_offs = 0x0,
.sysc_offs = 0x4,
@@ -786,18 +784,23 @@ static struct omap_hwmod_class am33xx_epwmss_hwmod_class
= {
.sysc = am33xx_epwmss_sysc,
};
-/* ehrpwm0 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
- { .name = int, .irq = 86 + OMAP_INTC_START, },
- { .name = tzint, .irq = 58 + OMAP_INTC_START, },
- { .irq = -1 },
+
+static struct omap_hwmod_class am33xx_ecap_hwmod_class = {
+ .name = ecap,
};
-static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
- .name = ehrpwm0,
+static struct omap_hwmod_class am33xx_eqep_hwmod_class = {
+ .name = eqep,
+};
+
+static struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = {
+ .name = ehrpwm,
+};
+/* epwmss0 */
+static struct omap_hwmod am33xx_epwmss0_hwmod = {
+ .name = epwmss0,
.class = am33xx_epwmss_hwmod_class,
.clkdm_name = l4ls_clkdm,
- .mpu_irqs = am33xx_ehrpwm0_irqs,
.main_clk = l4ls_gclk,
.prcm = {
.omap4 = {
@@ -807,63 +810,68 @@ static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
},
};
-/* ehrpwm1 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = {
- { .name = int, .irq = 87 + OMAP_INTC_START, },
- { .name = tzint, .irq = 59 + OMAP_INTC_START, },
+/* ecap0 */
+static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
+ { .irq = 31 + OMAP_INTC_START, },
{ .irq = -1 },
};
-static struct omap_hwmod am33xx_ehrpwm1_hwmod = {
- .name = ehrpwm1,
- .class = am33xx_epwmss_hwmod_class,
+static struct omap_hwmod am33xx_ecap0_hwmod = {
+ .name = ecap0,
+ .class = am33xx_ecap_hwmod_class,
.clkdm_name = l4ls_clkdm,
- .mpu_irqs = am33xx_ehrpwm1_irqs,
+ .mpu_irqs = am33xx_ecap0_irqs,
.main_clk = l4ls_gclk,
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
};
-/* ehrpwm2 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = {
- { .name = int, .irq = 39 + OMAP_INTC_START, },
- { .name = tzint, .irq = 60 + OMAP_INTC_START, },
+/* eqep0 */
+static struct omap_hwmod_irq_info am33xx_eqep0_irqs[] = {
+ { .irq = 79 + OMAP_INTC_START, },
{ .irq = -1 },
};
-static struct omap_hwmod am33xx_ehrpwm2_hwmod = {
- .name = ehrpwm2,
- .class = am33xx_epwmss_hwmod_class,
+static struct omap_hwmod am33xx_eqep0_hwmod = {
+ .name = eqep0,
+ .class = am33xx_eqep_hwmod_class,
.clkdm_name = l4ls_clkdm,
- .mpu_irqs = am33xx_ehrpwm2_irqs,
+ .mpu_irqs = am33xx_eqep0_irqs,
.main_clk = l4ls_gclk,
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
};
-/* ecap0 */
-static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
- { .irq = 31 + OMAP_INTC_START, },
+/* ehrpwm0 */
+static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
+ { .name = int, .irq = 86 + OMAP_INTC_START, },
+ { .name = tzint, .irq = 58 + OMAP_INTC_START, },
{ .irq = -1 },
};
-static struct omap_hwmod am33xx_ecap0_hwmod = {
- .name = ecap0,
+/*
+ * Optional clock entry is provided to support additional clock
+ * gating for EHRPWM module functional from control
[PATCH v4 05/11] pwm: pwm-tiecap: pinctrl support
Enable pinctrl for pwm-tiecap
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 e0bcc85... 646f8b4... M drivers/pwm/pwm-tiecap.c
drivers/pwm/pwm-tiecap.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c
index e0bcc85..646f8b4 100644
--- a/drivers/pwm/pwm-tiecap.c
+++ b/drivers/pwm/pwm-tiecap.c
@@ -26,6 +26,7 @@
#include linux/pm_runtime.h
#include linux/pwm.h
#include linux/of_device.h
+#include linux/pinctrl/consumer.h
#include pwm-tipwmss.h
@@ -202,6 +203,11 @@ static int __devinit ecap_pwm_probe(struct platform_device
*pdev)
struct clk *clk;
struct ecap_pwm_chip *pc;
u16 status;
+ struct pinctrl *pinctrl;
+
+ pinctrl = devm_pinctrl_get_select_default(pdev-dev);
+ if (IS_ERR(pinctrl))
+ dev_warn(pdev-dev, failed to configure pins from driver\n);
pc = devm_kzalloc(pdev-dev, sizeof(*pc), GFP_KERNEL);
if (!pc) {
--
1.7.0.4
--
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[PATCH v4 07/11] pwm: pwm-tiehrpwm: pinctrl support
Enable pinctrl for pwm-tiehrpwm
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 34f9378... 23fd3c3... M drivers/pwm/pwm-tiehrpwm.c
drivers/pwm/pwm-tiehrpwm.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
index 34f9378..23fd3c3 100644
--- a/drivers/pwm/pwm-tiehrpwm.c
+++ b/drivers/pwm/pwm-tiehrpwm.c
@@ -26,6 +26,7 @@
#include linux/clk.h
#include linux/pm_runtime.h
#include linux/of_device.h
+#include linux/pinctrl/consumer.h
#include pwm-tipwmss.h
@@ -410,6 +411,11 @@ static int __devinit ehrpwm_pwm_probe(struct
platform_device *pdev)
struct clk *clk;
struct ehrpwm_pwm_chip *pc;
u16 status;
+ struct pinctrl *pinctrl;
+
+ pinctrl = devm_pinctrl_get_select_default(pdev-dev);
+ if (IS_ERR(pinctrl))
+ dev_warn(pdev-dev, failed to configure pins from driver\n);
pc = devm_kzalloc(pdev-dev, sizeof(*pc), GFP_KERNEL);
if (!pc) {
--
1.7.0.4
--
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[PATCH v4 08/11] pwm: pwm-tiehrpwm: Adding TBCLK gating support.
Some platforms (like AM33XX) requires clock gating from control module
explicitly for TBCLK. Enabling of this clock required for the
functioning of the time base sub module in EHRPWM module. So adding
optional TBCLK handling if DT node populated with tbclkgating. This
helps the driver can coexist for Davinci platforms.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v2:
- Remove DT property for tbclkgating
- Use devm_clk_get instead of clk_get
Changes since v1:
- Moved TBCLK enable from probe to .pwm_enable disable from
remove to .pwm_disable
:100644 100644 23fd3c3... 6e90829... M drivers/pwm/pwm-tiehrpwm.c
drivers/pwm/pwm-tiehrpwm.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
index 23fd3c3..6e90829 100644
--- a/drivers/pwm/pwm-tiehrpwm.c
+++ b/drivers/pwm/pwm-tiehrpwm.c
@@ -119,6 +119,7 @@ struct ehrpwm_pwm_chip {
void __iomem*mmio_base;
unsigned long period_cycles[NUM_PWM_CHANNEL];
enum pwm_polarity polarity[NUM_PWM_CHANNEL];
+ struct clk *tbclk;
};
static inline struct ehrpwm_pwm_chip *to_ehrpwm_pwm_chip(struct pwm_chip *chip)
@@ -339,6 +340,13 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct
pwm_device *pwm)
/* Channels polarity can be configured from action qualifier module */
configure_polarity(pc, pwm-hwpwm);
+ /*
+* Platforms require explicit clock enabling of TBCLK has
+* to enable TBCLK explicitly before enabling PWM device
+*/
+ if (pc-tbclk)
+ clk_enable(pc-tbclk);
+
/* Enable time counter for free_run */
ehrpwm_modify(pc-mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN);
return 0;
@@ -367,6 +375,10 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip,
struct pwm_device *pwm)
ehrpwm_modify(pc-mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val);
+ /* Disabling TBCLK on PWM disable */
+ if (pc-tbclk)
+ clk_disable(pc-tbclk);
+
/* Stop Time base counter */
ehrpwm_modify(pc-mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_STOP_NEXT);
@@ -457,6 +469,10 @@ static int __devinit ehrpwm_pwm_probe(struct
platform_device *pdev)
dev_err(pdev-dev, pwmchip_add() failed: %d\n, ret);
return ret;
}
+
+ /* Populate tbclk entry for platforms require explicit tbclk gating */
+ pc-tbclk = devm_clk_get(pdev-dev, tbclk);
+
pm_runtime_enable(pdev-dev);
pm_runtime_get_sync(pdev-dev);
--
1.7.0.4
--
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[PATCH v4 04/11] pwm: pwm-tiecap: Add device-tree binding support for APWM driver
This patch
1. Add support for device-tree binding for ECAP APWM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in platform_driver structure to
THIS_MODULE.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
---
Changes since v3:
- Replace pwmss.h with pwm-tipwmss.h
Changes since v2:
- Add of_pwm_xlate_with_flags function support
Changes since v1:
- Add separate patch for pinctrl support
- Add conditional check for PWM subsystem clock enable.
- Combined with HWMOD changes DT bindings.
- Remove the custom of_xlate support.
:00 100644 000... 131e8c1... A
Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
:100644 100644 d6d4cf0... e0bcc85... M drivers/pwm/pwm-tiecap.c
.../devicetree/bindings/pwm/pwm-tiecap.txt | 23 ++
drivers/pwm/pwm-tiecap.c | 44 +++-
2 files changed, 66 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
new file mode 100644
index 000..131e8c1
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
@@ -0,0 +1,23 @@
+TI SOC ECAP based APWM controller
+
+Required properties:
+- compatible: Must be ti,am33xx-ecap
+- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
+ First cell specifies the per-chip index of the PWM to use, the second
+ cell is the period in nanoseconds and bit 0 in the third cell is used to
+ encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
+ to 1 for inverse polarity set to 0 for normal polarity.
+- reg: physical base address and size of the registers map.
+
+Optional properties:
+- ti,hwmods: Name of the hwmod associated to the ECAP:
+ ecapx, x being the 0-based instance number from the HW spec
+
+Example:
+
+ecap0: ecap@0 {
+ compatible = ti,am33xx-ecap;
+ #pwm-cells = 3;
+ reg = 0x48300100 0x80;
+ ti,hwmods = ecap0;
+};
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c
index d6d4cf0..e0bcc85 100644
--- a/drivers/pwm/pwm-tiecap.c
+++ b/drivers/pwm/pwm-tiecap.c
@@ -25,6 +25,9 @@
#include linux/clk.h
#include linux/pm_runtime.h
#include linux/pwm.h
+#include linux/of_device.h
+
+#include pwm-tipwmss.h
/* ECAP registers and bits definitions */
#define CAP1 0x08
@@ -184,12 +187,21 @@ static const struct pwm_ops ecap_pwm_ops = {
.owner = THIS_MODULE,
};
+static const struct of_device_id ecap_of_match[] = {
+ {
+ .compatible = ti,am33xx-ecap,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ecap_of_match);
+
static int __devinit ecap_pwm_probe(struct platform_device *pdev)
{
int ret;
struct resource *r;
struct clk *clk;
struct ecap_pwm_chip *pc;
+ u16 status;
pc = devm_kzalloc(pdev-dev, sizeof(*pc), GFP_KERNEL);
if (!pc) {
@@ -211,6 +223,8 @@ static int __devinit ecap_pwm_probe(struct platform_device
*pdev)
pc-chip.dev = pdev-dev;
pc-chip.ops = ecap_pwm_ops;
+ pc-chip.of_xlate = of_pwm_xlate_with_flags;
+ pc-chip.of_pwm_n_cells = 3;
pc-chip.base = -1;
pc-chip.npwm = 1;
@@ -231,14 +245,40 @@ static int __devinit ecap_pwm_probe(struct
platform_device *pdev)
}
pm_runtime_enable(pdev-dev);
+ pm_runtime_get_sync(pdev-dev);
+
+ status = pwmss_submodule_state_change(pdev-dev.parent,
+ PWMSS_ECAPCLK_EN);
+ if (!(status PWMSS_ECAPCLK_EN_ACK)) {
+ dev_err(pdev-dev, PWMSS config space clock enable failed\n);
+ ret = -EINVAL;
+ goto pwmss_clk_failure;
+ }
+
+ pm_runtime_put_sync(pdev-dev);
+
platform_set_drvdata(pdev, pc);
return 0;
+
+pwmss_clk_failure:
+ pm_runtime_put_sync(pdev-dev);
+ pm_runtime_disable(pdev-dev);
+ pwmchip_remove(pc-chip);
+ return ret;
}
static int __devexit ecap_pwm_remove(struct platform_device *pdev)
{
struct ecap_pwm_chip *pc = platform_get_drvdata(pdev);
+ pm_runtime_get_sync(pdev-dev);
+ /*
+* Due to hardware misbehaviour, acknowledge of the stop_req
+* is missing. Hence checking of the status bit skipped.
+*/
+ pwmss_submodule_state_change(pdev-dev.parent, PWMSS_ECAPCLK_STOP_REQ);
+ pm_runtime_put_sync(pdev-dev);
+
pm_runtime_put_sync(pdev-dev);
pm_runtime_disable(pdev-dev);
return pwmchip_remove(pc-chip);
@@ -246,7 +286,9 @@ static int __devexit ecap_pwm_remove(struct platform_device
*pdev)
static
[PATCH v4 06/11] pwm: pwm-tiehrpwm: Add device-tree binding support for EHRPWM driver
This patch
1. Add support for device-tree binding for EHRWPM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in platform_driver structure to
THIS_MODULE.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
---
Changes since v3:
- Replace pwmss.h with pwm-tipwmss.h
Changes since v2:
- Add of_pwm_xlate_with_flags function support
Changes since v1:
- Add separate patch for pinctrl support
- Add conditional check for PWM subsystem clock enable.
- Combined with HWMOD changes DT bindings.
- Remove the custom of_xlate support.
:00 100644 000... 4fc7079... A
Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
:100644 100644 d3c1dff... 34f9378... M drivers/pwm/pwm-tiehrpwm.c
.../devicetree/bindings/pwm/pwm-tiehrpwm.txt | 23 ++
drivers/pwm/pwm-tiehrpwm.c | 45 +++-
2 files changed, 66 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
new file mode 100644
index 000..4fc7079
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
@@ -0,0 +1,23 @@
+TI SOC EHRPWM based PWM controller
+
+Required properties:
+- compatible : Must be ti,am33xx-ehrpwm
+- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
+ First cell specifies the per-chip index of the PWM to use, the second
+ cell is the period in nanoseconds and bit 0 in the third cell is used to
+ encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
+ to 1 for inverse polarity set to 0 for normal polarity.
+- reg: physical base address and size of the registers map.
+
+Optional properties:
+- ti,hwmods: Name of the hwmod associated to the EHRPWM:
+ ehrpwmx, x being the 0-based instance number from the HW spec
+
+Example:
+
+ehrpwm0: ehrpwm@0 {
+ compatible = ti,am33xx-ehrpwm;
+ #pwm-cells = 3;
+ reg = 0x48300200 0x100;
+ ti,hwmods = ehrpwm0;
+};
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
index d3c1dff..34f9378 100644
--- a/drivers/pwm/pwm-tiehrpwm.c
+++ b/drivers/pwm/pwm-tiehrpwm.c
@@ -25,6 +25,9 @@
#include linux/err.h
#include linux/clk.h
#include linux/pm_runtime.h
+#include linux/of_device.h
+
+#include pwm-tipwmss.h
/* EHRPWM registers and bits definitions */
@@ -392,12 +395,21 @@ static const struct pwm_ops ehrpwm_pwm_ops = {
.owner = THIS_MODULE,
};
+static const struct of_device_id ehrpwm_of_match[] = {
+ {
+ .compatible = ti,am33xx-ehrpwm,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ehrpwm_of_match);
+
static int __devinit ehrpwm_pwm_probe(struct platform_device *pdev)
{
int ret;
struct resource *r;
struct clk *clk;
struct ehrpwm_pwm_chip *pc;
+ u16 status;
pc = devm_kzalloc(pdev-dev, sizeof(*pc), GFP_KERNEL);
if (!pc) {
@@ -419,6 +431,8 @@ static int __devinit ehrpwm_pwm_probe(struct
platform_device *pdev)
pc-chip.dev = pdev-dev;
pc-chip.ops = ehrpwm_pwm_ops;
+ pc-chip.of_xlate = of_pwm_xlate_with_flags;
+ pc-chip.of_pwm_n_cells = 3;
pc-chip.base = -1;
pc-chip.npwm = NUM_PWM_CHANNEL;
@@ -437,16 +451,41 @@ static int __devinit ehrpwm_pwm_probe(struct
platform_device *pdev)
dev_err(pdev-dev, pwmchip_add() failed: %d\n, ret);
return ret;
}
-
pm_runtime_enable(pdev-dev);
+ pm_runtime_get_sync(pdev-dev);
+
+ status = pwmss_submodule_state_change(pdev-dev.parent,
+ PWMSS_EPWMCLK_EN);
+ if (!(status PWMSS_EPWMCLK_EN_ACK)) {
+ dev_err(pdev-dev, PWMSS config space clock enable failed\n);
+ ret = -EINVAL;
+ goto pwmss_clk_failure;
+ }
+
+ pm_runtime_put_sync(pdev-dev);
+
platform_set_drvdata(pdev, pc);
return 0;
+
+pwmss_clk_failure:
+ pm_runtime_put_sync(pdev-dev);
+ pm_runtime_disable(pdev-dev);
+ pwmchip_remove(pc-chip);
+ return ret;
}
static int __devexit ehrpwm_pwm_remove(struct platform_device *pdev)
{
struct ehrpwm_pwm_chip *pc = platform_get_drvdata(pdev);
+ pm_runtime_get_sync(pdev-dev);
+ /*
+* Due to hardware misbehaviour, acknowledge of the stop_req
+* is missing. Hence checking of the status bit skipped.
+*/
+ pwmss_submodule_state_change(pdev-dev.parent, PWMSS_EPWMCLK_STOP_REQ);
+ pm_runtime_put_sync(pdev-dev);
+
pm_runtime_put_sync(pdev-dev);
pm_runtime_disable(pdev-dev);
[PATCH v4 09/11] ARM: dts: AM33XX: Add PWMSS device tree nodes
Add PWMSS device tree nodes in relation with ECAP EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP EHRPWM by
adding necessary properties like pwm-cells, base reg set disabled as
status.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v2:
- ranges property populated to handle child devices address range
:100644 100644 20a3f29... 4393161... M arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/am33xx.dtsi | 84 +
1 files changed, 84 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 20a3f29..4393161 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -338,5 +338,89 @@
power = 250;
ti,hwmods = usb_otg_hs;
};
+
+ epwmss0: epwmss@4830 {
+ compatible = ti,am33xx-pwmss;
+ reg = 0x4830 0x10;
+ ti,hwmods = epwmss0;
+ #address-cells = 1;
+ #size-cells = 1;
+ status = disabled;
+ ranges = 0x48300100 0x48300100 0x80 /* ECAP */
+ 0x48300180 0x48300180 0x80 /* EQEP */
+ 0x48300200 0x48300200 0x80; /* EHRPWM */
+
+ ecap0: ecap@48300100 {
+ compatible = ti,am33xx-ecap;
+ #pwm-cells = 3;
+ reg = 0x48300100 0x80;
+ ti,hwmods = ecap0;
+ status = disabled;
+ };
+
+ ehrpwm0: ehrpwm@48300200 {
+ compatible = ti,am33xx-ehrpwm;
+ #pwm-cells = 3;
+ reg = 0x48300200 0x80;
+ ti,hwmods = ehrpwm0;
+ status = disabled;
+ };
+ };
+
+ epwmss1: epwmss@48302000 {
+ compatible = ti,am33xx-pwmss;
+ reg = 0x48302000 0x10;
+ ti,hwmods = epwmss1;
+ #address-cells = 1;
+ #size-cells = 1;
+ status = disabled;
+ ranges = 0x48302100 0x48302100 0x80 /* ECAP */
+ 0x48302180 0x48302180 0x80 /* EQEP */
+ 0x48302200 0x48302200 0x80; /* EHRPWM */
+
+ ecap1: ecap@48302100 {
+ compatible = ti,am33xx-ecap;
+ #pwm-cells = 3;
+ reg = 0x48302100 0x80;
+ ti,hwmods = ecap1;
+ status = disabled;
+ };
+
+ ehrpwm1: ehrpwm@48302200 {
+ compatible = ti,am33xx-ehrpwm;
+ #pwm-cells = 3;
+ reg = 0x48302200 0x80;
+ ti,hwmods = ehrpwm1;
+ status = disabled;
+ };
+ };
+
+ epwmss2: epwmss@48304000 {
+ compatible = ti,am33xx-pwmss;
+ reg = 0x48304000 0x10;
+ ti,hwmods = epwmss2;
+ #address-cells = 1;
+ #size-cells = 1;
+ status = disabled;
+ ranges = 0x48304100 0x48304100 0x80 /* ECAP */
+ 0x48304180 0x48304180 0x80 /* EQEP */
+ 0x48304200 0x48304200 0x80; /* EHRPWM */
+
+ ecap2: ecap@48304100 {
+ compatible = ti,am33xx-ecap;
+ #pwm-cells = 3;
+ reg = 0x48304100 0x80;
+ ti,hwmods = ecap2;
+ status = disabled;
+ };
+
+ ehrpwm2: ehrpwm@48304200 {
+ compatible = ti,am33xx-ehrpwm;
+ #pwm-cells = 3;
+ reg = 0x48304200 0x80;
+ ti,hwmods = ehrpwm2;
+ status = disabled;
+ };
+ };
};
};
--
1.7.0.4
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[PATCH v4 10/11] ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm
PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v3:
- Add epwmss parent status=okay field.
:100644 100644 9f65f17... 4178ba4c.. M arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am335x-evm.dts | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 9f65f17..4178ba4 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -44,6 +44,12 @@
0x154 0x27 /* spi0_d0.gpio0_3, INPUT |
MODE7 */
;
};
+
+ ecap0_pins: backlight_pins {
+ pinctrl-single,pins =
+ 0x164 0x0 /*
eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+ ;
+ };
};
ocp {
@@ -102,6 +108,16 @@
reg = 0x48;
};
};
+
+ epwmss0: epwmss@4830 {
+ status = okay;
+
+ ecap0: ecap@48300100 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = ecap0_pins;
+ };
+ };
};
vbat: fixedregulator@0 {
@@ -158,6 +174,13 @@
gpio-key,wakeup;
};
};
+
+ backlight {
+ compatible = pwm-backlight;
+ pwms = ecap0 0 5 0;
+ brightness-levels = 0 51 53 56 62 75 101 152 255;
+ default-brightness-level = 8;
+ };
};
/include/ tps65910.dtsi
--
1.7.0.4
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[PATCH v4 11/11] ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk
PWM output from ecap2 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales with
inverse polarity.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 f5a6162... 6f3de83... M arch/arm/boot/dts/am335x-evmsk.dts
arch/arm/boot/dts/am335x-evmsk.dts | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts
b/arch/arm/boot/dts/am335x-evmsk.dts
index f5a6162..6f3de83 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -51,6 +51,12 @@
0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT
| MODE7 */
;
};
+
+ ecap2_pins: backlight_pins {
+ pinctrl-single,pins =
+ 0x19c 0x4 /*
mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
+ ;
+ };
};
ocp {
@@ -94,6 +100,16 @@
st,max-limit-z = 750;
};
};
+
+ epwmss2: epwmss@48304000 {
+ status = okay;
+
+ ecap2: ecap@48304100 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = ecap2_pins;
+ };
+ };
};
vbat: fixedregulator@0 {
@@ -170,6 +186,13 @@
gpios = gpio3 5 0;
};
};
+
+ backlight {
+ compatible = pwm-backlight;
+ pwms = ecap2 0 5 1;
+ brightness-levels = 0 58 61 66 75 90 125 170 255;
+ default-brightness-level = 8;
+ };
};
/include/ tps65910.dtsi
--
1.7.0.4
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[PATCH 1/1] ARM: OMAP2+: enable devtmpfs and devtmpfs automount
Since udev-182, udev no longer creates device nodes under /dev and this has to be managed by the kernel devtmpfs filesystem. This means that a kernel built with the current OMAP2+ config will not boot on a system with a recent udev. Also, it is good to have /dev automatically mounted since some non-initramfs based setups assumes this and don't manually mount it. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- arch/arm/configs/omap2plus_defconfig |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 6230304..6333e96 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -65,6 +65,8 @@ CONFIG_MAC80211_RC_PID=y CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug CONFIG_CONNECTOR=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y -- 1.7.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 06/16] mfd: omap-usb-host: cleanup clock management code
Hi,
On Thu, Nov 15, 2012 at 04:34:04PM +0200, Roger Quadros wrote:
All ports have similarly named port clocks so we can
bunch them into a port data structure and use for loop
to enable/disable the clocks.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 208
+--
1 files changed, 101 insertions(+), 107 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 23cec57..7303c41 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -76,6 +76,8 @@
#define OMAP_UHH_DEBUG_CSR (0x44)
+#define MAX_HS_USB_PORTS 3 /* Increase this if any chip has more */
+
/* Values of UHH_REVISION - Note: these are not given in the TRM */
#define OMAP_USBHS_REV1 0x0010 /* OMAP3 */
#define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */
@@ -87,14 +89,15 @@
#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
#define is_ehci_hsic_mode(x) (x == OMAP_EHCI_PORT_MODE_HSIC)
+struct usbhs_port {
+ struct clk *utmi_clk;
+};
I rather not since this will make it a lot more difficult to use
pm_clk_add() :-s Also, this sort of thing should be dynamically
allocated anyway ;-)
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 07/16] mfd: omap_usb_host: Avoid creating copy of platform_data
On Thu, Nov 15, 2012 at 04:34:05PM +0200, Roger Quadros wrote:
We can just hold the pointer to the platform data instead
of creating a copy of it.
Also get rid of the unnecessary missing platform data checks
in runtime_suspend/resume. We are already checking for missing
platform data in probe.
Signed-off-by: Roger Quadros rog...@ti.com
This looks ok:
Acked-by: Felipe Balbi ba...@ti.com
---
drivers/mfd/omap-usb-host.c | 34 ++
1 files changed, 10 insertions(+), 24 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 7303c41..44772ae 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -103,7 +103,7 @@ struct usbhs_hcd_omap {
void __iomem*uhh_base;
- struct usbhs_omap_platform_data platdata;
+ struct usbhs_omap_platform_data *pdata;
u32 usbhs_rev;
spinlock_t lock;
@@ -195,8 +195,8 @@ static int omap_usbhs_alloc_children(struct
platform_device *pdev)
int ret;
omap = platform_get_drvdata(pdev);
- ehci_data = omap-platdata.ehci_data;
- ohci_data = omap-platdata.ohci_data;
+ ehci_data = omap-pdata-ehci_data;
+ ohci_data = omap-pdata-ohci_data;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ehci);
if (!res) {
@@ -279,17 +279,12 @@ static bool is_ohci_port(enum usbhs_omap_port_mode
pmode)
static int usbhs_runtime_resume(struct device *dev)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
- struct usbhs_omap_platform_data *pdata = omap-platdata;
unsigned long flags;
+ struct usbhs_omap_platform_data *pdata = omap-pdata;
int i, r;
dev_dbg(dev, usbhs_runtime_resume\n);
- if (!pdata) {
- dev_dbg(dev, missing platform_data\n);
- return -ENODEV;
- }
-
omap_tll_enable();
spin_lock_irqsave(omap-lock, flags);
@@ -317,17 +312,12 @@ static int usbhs_runtime_resume(struct device *dev)
static int usbhs_runtime_suspend(struct device *dev)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
- struct usbhs_omap_platform_data *pdata = omap-platdata;
unsigned long flags;
+ struct usbhs_omap_platform_data *pdata = omap-pdata;
int i;
dev_dbg(dev, usbhs_runtime_suspend\n);
- if (!pdata) {
- dev_dbg(dev, missing platform_data\n);
- return -ENODEV;
- }
-
spin_lock_irqsave(omap-lock, flags);
for (i = 0; i MAX_HS_USB_PORTS; i++) {
@@ -349,7 +339,7 @@ static int usbhs_runtime_suspend(struct device *dev)
static void omap_usbhs_init(struct device *dev)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
- struct usbhs_omap_platform_data *pdata = omap-platdata;
+ struct usbhs_omap_platform_data *pdata = omap-pdata;
unsigned long flags;
unsignedreg;
@@ -456,7 +446,7 @@ static void omap_usbhs_init(struct device *dev)
static void omap_usbhs_deinit(struct device *dev)
{
struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
- struct usbhs_omap_platform_data *pdata = omap-platdata;
+ struct usbhs_omap_platform_data *pdata = omap-pdata;
if (pdata-ehci_data-phy_reset) {
if (gpio_is_valid(pdata-ehci_data-reset_gpio_port[0]))
@@ -509,19 +499,16 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
spin_lock_init(omap-lock);
+ omap-pdata = pdata;
+ platform_set_drvdata(pdev, omap);
+
need_logic_fck = false;
for (i = 0; i MAX_HS_USB_PORTS; i++) {
- omap-platdata.port_mode[i] = pdata-port_mode[i];
-
if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
is_ehci_hsic_mode(i))
need_logic_fck |= true;
}
- omap-platdata.ehci_data = pdata-ehci_data;
- omap-platdata.ohci_data = pdata-ohci_data;
-
-
if (need_logic_fck) {
omap-ehci_logic_fck = clk_get(dev, ehci_logic_fck);
if (IS_ERR(omap-ehci_logic_fck)) {
@@ -600,7 +587,6 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
failed error:%d\n, ret);
}
- platform_set_drvdata(pdev, omap);
pm_runtime_enable(dev);
--
1.7.4.1
--
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Description: Digital signature
Re: [PATCH v3 2/5] mfd: tps65217: Set PMIC to shutdown on PWR_EN toggle
Hi Anilkumar, On Tue, Nov 20, 2012 at 03:18:44PM +0530, AnilKumar Ch wrote: From: Colin Foe-Parker colin.foepar...@logicpd.com Set tps65217 PMIC status to OFF if power enable toggle is supported. By setting this bit to 1 to enter PMIC to OFF state when PWR_EN pin is pulled low. Also adds a DT flag to specify that device pmic supports shutdown control or not. Signed-off-by: Colin Foe-Parker colin.foepar...@logicpd.com [anilku...@ti.com: move the additions to tps65217 MFD driver] Signed-off-by: AnilKumar Ch anilku...@ti.com --- .../devicetree/bindings/regulator/tps65217.txt |4 drivers/mfd/tps65217.c | 12 2 files changed, 16 insertions(+) Applied, thanks. I suppose you're not expecting the whole patchset to go through one tree ? Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 08/16] mfd: omap-usb-host: know about number of ports from revision register
On Thu, Nov 15, 2012 at 04:34:06PM +0200, Roger Quadros wrote:
prevents getting clocks that don't exist on the platform.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 47
---
1 files changed, 35 insertions(+), 12 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 44772ae..ad89939 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -94,6 +94,7 @@ struct usbhs_port {
};
struct usbhs_hcd_omap {
+ int nports;
struct usbhs_port port[MAX_HS_USB_PORTS];
struct clk *xclk60mhsp1_ck;
@@ -291,7 +292,7 @@ static int usbhs_runtime_resume(struct device *dev)
if (omap-ehci_logic_fck !IS_ERR(omap-ehci_logic_fck))
clk_enable(omap-ehci_logic_fck);
- for (i = 0; i MAX_HS_USB_PORTS; i++) {
+ for (i = 0; i omap-nports; i++) {
if (is_ehci_tll_mode(pdata-port_mode[i])) {
if (omap-port[i].utmi_clk) {
r = clk_enable(omap-port[i].utmi_clk);
@@ -320,7 +321,7 @@ static int usbhs_runtime_suspend(struct device *dev)
spin_lock_irqsave(omap-lock, flags);
- for (i = 0; i MAX_HS_USB_PORTS; i++) {
+ for (i = 0; i omap-nports; i++) {
if (is_ehci_tll_mode(pdata-port_mode[i])) {
if (omap-port[i].utmi_clk)
clk_disable(omap-port[i].utmi_clk);
@@ -360,8 +361,6 @@ static void omap_usbhs_init(struct device *dev)
pm_runtime_get_sync(dev);
spin_lock_irqsave(omap-lock, flags);
- omap-usbhs_rev = usbhs_read(omap-uhh_base, OMAP_UHH_REVISION);
- dev_dbg(dev, OMAP UHH_REVISION 0x%x\n, omap-usbhs_rev);
reg = usbhs_read(omap-uhh_base, OMAP_UHH_HOSTCONFIG);
/* setup ULPI bypass and burst configurations */
@@ -502,8 +501,32 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
omap-pdata = pdata;
platform_set_drvdata(pdev, omap);
+ pm_runtime_enable(dev);
+ pm_runtime_get_sync(dev);
+ omap-usbhs_rev = usbhs_read(omap-uhh_base, OMAP_UHH_REVISION);
+
+ /* we need to call runtime suspend before we update omap-nports
+ * to prevent unbalanced clk_disable()
+ */
wrong comment style.
+ pm_runtime_put_sync(dev);
does it *really* need to be a synchronous put ?
+
+ switch (omap-usbhs_rev) {
+ case OMAP_USBHS_REV1:
+ omap-nports = 3;
+ break;
+ case OMAP_USBHS_REV2:
+ omap-nports = 2;
+ break;
+ default:
+ omap-nports = MAX_HS_USB_PORTS;
+ dev_info(dev,
+ USB HOST Rev : 0x%d not recognized, assuming %d ports\n,
+omap-usbhs_rev, omap-nports);
please make this dev_dbg().
+ break;
+ }
+
need_logic_fck = false;
- for (i = 0; i MAX_HS_USB_PORTS; i++) {
+ for (i = 0; i omap-nports; i++) {
if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
is_ehci_hsic_mode(i))
need_logic_fck |= true;
@@ -538,7 +561,7 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
goto err_init60m;
}
- for (i = 0; i MAX_HS_USB_PORTS; i++) {
+ for (i = 0; i omap-nports; i++) {
struct clk *pclk;
char utmi_clk[] = usb_host_hs_utmi_px_clk;
@@ -588,8 +611,6 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
}
- pm_runtime_enable(dev);
moving this part around isn't part of $SUBJECT aparently.
-
omap_usbhs_init(dev);
ret = omap_usbhs_alloc_children(pdev);
if (ret) {
@@ -597,15 +618,15 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
goto err_alloc;
}
+ pr_info(OMAP USB HOST : revision 0x%x, ports %d\n,
+ omap-usbhs_rev, omap-nports);
please remove this pr_info() as it doesn't add anything other than noise
to bootup, IMHO.
return 0;
err_alloc:
omap_usbhs_deinit(pdev-dev);
-
- pm_runtime_disable(dev);
iounmap(omap-uhh_base);
- for (i = 0; i MAX_HS_USB_PORTS; i++)
+ for (i = 0; i omap-nports; i++)
clk_put(omap-port[i].utmi_clk);
clk_put(omap-init_60m_fclk);
@@ -619,6 +640,8 @@ err_xclk60mhsp2:
err_xclk60mhsp1:
clk_put(omap-ehci_logic_fck);
+ pm_runtime_disable(dev);
+
err_remap:
kfree(omap);
return ret;
@@ -639,7 +662,7 @@ static int __devexit usbhs_omap_remove(struct
platform_device *pdev)
pm_runtime_disable(pdev-dev);
iounmap(omap-uhh_base);
- for (i = 0; i MAX_HS_USB_PORTS; i++)
+ for (i = 0; i omap-nports; i++)
Re: [PATCH 09/16] mfd: omap-usb-host: override number of ports from platform data
On Thu, Nov 15, 2012 at 04:34:07PM +0200, Roger Quadros wrote:
For some platforms e.g. OMAP5, we cannot rely on USBHOST revision
to determine the number of ports available. In such cases we have
you need to make it clear *why* we can't. Imagine someone reading this 5
years from now... he'll be all like: why can't I find any documentation
about this OMAP5 ? Why was it so special that its revision register
wasn't enough to figure out number of ports ?
to rely on platform data (or FDT) to give us the right number of
ports.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/usb-host.c|1 +
arch/arm/plat-omap/include/plat/usb.h |2 +
drivers/mfd/omap-usb-host.c | 46
+++--
3 files changed, 35 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 3c43449..eb85528 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -504,6 +504,7 @@ void __init usbhs_init(const struct usbhs_omap_board_data
*pdata)
ohci_data.es2_compatibility = pdata-es2_compatibility;
usbhs_data.ehci_data = ehci_data;
usbhs_data.ohci_data = ohci_data;
+ usbhs_data.nports = pdata-nports;
if (cpu_is_omap34xx()) {
setup_ehci_io_mux(pdata-port_mode);
diff --git a/arch/arm/plat-omap/include/plat/usb.h
b/arch/arm/plat-omap/include/plat/usb.h
index 87ee140..6b618a1 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -27,6 +27,7 @@ enum usbhs_omap_port_mode {
};
struct usbhs_omap_board_data {
+ int nports;
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
/* have to be valid if phy_reset is true and portx is in phy mode */
@@ -59,6 +60,7 @@ struct ohci_hcd_omap_platform_data {
};
struct usbhs_omap_platform_data {
+ int nports;
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
struct ehci_hcd_omap_platform_data *ehci_data;
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index ad89939..c20234b 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -500,8 +500,8 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
omap-pdata = pdata;
platform_set_drvdata(pdev, omap);
-
pm_runtime_enable(dev);
+
trailing change, not part of $SUBJECT.
pm_runtime_get_sync(dev);
omap-usbhs_rev = usbhs_read(omap-uhh_base, OMAP_UHH_REVISION);
@@ -510,19 +510,37 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
*/
pm_runtime_put_sync(dev);
- switch (omap-usbhs_rev) {
- case OMAP_USBHS_REV1:
- omap-nports = 3;
- break;
- case OMAP_USBHS_REV2:
- omap-nports = 2;
- break;
- default:
- omap-nports = MAX_HS_USB_PORTS;
- dev_info(dev,
- USB HOST Rev : 0x%d not recognized, assuming %d ports\n,
-omap-usbhs_rev, omap-nports);
- break;
+ /*
+ * If platform data contains nports then use that
+ * else make out number of ports from USBHS revision
+ */
+ if (pdata-nports) {
+ if (omap-nports MAX_HS_USB_PORTS) {
+ dev_err(dev,
+ Platform data says %d ports but MAX_HS_USB_PORTS is
%d\n,
+ omap-nports, MAX_HS_USB_PORTS);
+ } else {
+ omap-nports = pdata-nports;
+ }
+ } else {
+ switch (omap-usbhs_rev) {
+ case OMAP_USBHS_REV1:
+ omap-nports = 3;
+ break;
+ case OMAP_USBHS_REV2:
+ /* Both OMAP4 and 5 show the same revision but they have
+ * different number of ports i.e. 2 and 3 respectively.
+ * OMAP5 platforms must supply nports via platform data.
+ */
comment indentation is wrong.
+ omap-nports = 2;
+ break;
+ default:
+ omap-nports = MAX_HS_USB_PORTS;
+ dev_info(dev,
+ USB HOST Rev:0x%d not recognized, assuming %d ports\n,
+ omap-usbhs_rev, omap-nports);
dev_dbg().
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 10/16] mfd: omap-usb-host: Intialize all available ports
On Thu, Nov 15, 2012 at 04:34:08PM +0200, Roger Quadros wrote:
OMAPs till date can have upto 3 ports. We need to initialize
s/upto/up to/
the port mode in HOSTCONFIG register for all of them.
why *all* of them ? Isn't it enough to initialize only the ones we're
going to use ? If not, why ?
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 31 ---
1 files changed, 12 insertions(+), 19 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index c20234b..0d39bd7 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -67,12 +67,9 @@
#define OMAP4_UHH_SYSCONFIG_NOSTDBY (1 4)
#define OMAP4_UHH_SYSCONFIG_SOFTRESET(1 0)
-#define OMAP4_P1_MODE_CLEAR (3 16)
+#define OMAP4_P1_MODE_MASK (3 16)
changing this name isn't part of $SUBJECT.
#define OMAP4_P1_MODE_TLL(1 16)
#define OMAP4_P1_MODE_HSIC (3 16)
-#define OMAP4_P2_MODE_CLEAR (3 18)
-#define OMAP4_P2_MODE_TLL(1 18)
-#define OMAP4_P2_MODE_HSIC (3 18)
why do you delete these ? Also not part of $SUBJECT.
#define OMAP_UHH_DEBUG_CSR (0x44)
@@ -343,6 +340,7 @@ static void omap_usbhs_init(struct device *dev)
struct usbhs_omap_platform_data *pdata = omap-pdata;
unsigned long flags;
unsignedreg;
+ int i;
dev_dbg(dev, starting TI HSUSB Controller\n);
@@ -403,21 +401,16 @@ static void omap_usbhs_init(struct device *dev)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
}
} else if (is_omap_usbhs_rev2(omap)) {
- /* Clear port mode fields for PHY mode*/
- reg = ~OMAP4_P1_MODE_CLEAR;
- reg = ~OMAP4_P2_MODE_CLEAR;
-
- if (is_ehci_tll_mode(pdata-port_mode[0]) ||
- (is_ohci_port(pdata-port_mode[0])))
- reg |= OMAP4_P1_MODE_TLL;
- else if (is_ehci_hsic_mode(pdata-port_mode[0]))
- reg |= OMAP4_P1_MODE_HSIC;
-
- if (is_ehci_tll_mode(pdata-port_mode[1]) ||
- (is_ohci_port(pdata-port_mode[1])))
- reg |= OMAP4_P2_MODE_TLL;
- else if (is_ehci_hsic_mode(pdata-port_mode[1]))
- reg |= OMAP4_P2_MODE_HSIC;
+ for (i = 0; i omap-nports; i++) {
+ /* Clear port mode fields for PHY mode*/
+ reg = ~(OMAP4_P1_MODE_MASK 2*i);
add spaces around '*' operator.
+ if (is_ehci_tll_mode(pdata-port_mode[i]) ||
+ (is_ohci_port(pdata-port_mode[i])))
+ reg |= OMAP4_P1_MODE_TLL 2*i;
ditto
+ else if (is_ehci_hsic_mode(pdata-port_mode[i]))
+ reg |= OMAP4_P1_MODE_HSIC 2*i;
ditto
in fact, I would convert this construct into a switch which would look
like:
reg = ~(OMAP4_P1_MODE_MASK i * 2);
switch (port_mode[i]) {
case OMAP4_P1_MODE_TLL:
reg |= OMAP4_P1_MODE_TLL i * 2;
break;
case OMAP_P1_MODE_HSIC:
reg |= OMAP4_P1_MODE_HSIC i * 2;
break;
}
Also, it looks like the whoel for loop with port mode settings could be
re-factored to a separate function to aid readability.
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 11/16] mfd: omap-usb-host: Manage HSIC clocks for HSIC mode
Hi,
On Thu, Nov 15, 2012 at 04:34:09PM +0200, Roger Quadros wrote:
Enable the optional HSIC clocks (60MHz and 480MHz) for the ports
that are configured in HSIC mode.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 56 +-
1 files changed, 54 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 0d39bd7..e5ba193 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -88,6 +88,8 @@
struct usbhs_port {
struct clk *utmi_clk;
+ struct clk *hsic60m_clk;
+ struct clk *hsic480m_clk;
};
struct usbhs_hcd_omap {
@@ -300,6 +302,26 @@ static int usbhs_runtime_resume(struct device *dev)
}
}
}
+
+ /* Enable HSIC clocks if required */
+ if (is_ehci_hsic_mode(pdata-port_mode[i])) {
+ if (omap-port[i].hsic60m_clk) {
+ r = clk_enable(omap-port[i].hsic60m_clk);
+ if (r) {
+ dev_err(dev,
+ %s: Can't enable port %d hsic60m clk
: %d\n,
+ __func__, i, r);
+ }
+ }
+ if (omap-port[i].hsic480m_clk) {
+ r = clk_enable(omap-port[i].hsic480m_clk);
+ if (r) {
+ dev_err(dev,
+ %s: Can't enable port %d hsic480m clk
: %d\n,
+ __func__, i, r);
+ }
+ }
+ }
}
with this deep indentation, it should've caught your attention that
something can definitely be re-factored.
@@ -323,6 +345,14 @@ static int usbhs_runtime_suspend(struct device *dev)
if (omap-port[i].utmi_clk)
clk_disable(omap-port[i].utmi_clk);
}
+
+ if (is_ehci_hsic_mode(pdata-port_mode[i])) {
+ if (omap-port[i].hsic60m_clk)
+ clk_disable(omap-port[i].hsic60m_clk);
+
+ if (omap-port[i].hsic480m_clk)
+ clk_disable(omap-port[i].hsic480m_clk);
+ }
}
if (omap-ehci_logic_fck !IS_ERR(omap-ehci_logic_fck))
@@ -575,6 +605,7 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
for (i = 0; i omap-nports; i++) {
struct clk *pclk;
char utmi_clk[] = usb_host_hs_utmi_px_clk;
+ char hsic_clk[] = usb_host_hs_hsic480m_px_clk;
same comment from another patch. Was this lazyness ?
@@ -590,6 +621,21 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
else
omap-port[i].utmi_clk = pclk;
+ sprintf(hsic_clk, usb_host_hs_hsic480m_p%d_clk, i + 1);
will overflow if 'i' ever goes over 8.
+ pclk = clk_get(dev, hsic_clk);
+ if (IS_ERR(pclk))
+ dev_err(dev, Failed to get clock : %s : %ld\n,
+ hsic_clk, PTR_ERR(pclk));
+ else
+ omap-port[i].hsic480m_clk = pclk;
+
+ sprintf(hsic_clk, usb_host_hs_hsic60m_p%d_clk, i + 1);
ditto.
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 13/16] mfd: omap-usb-host: Get rid of unnecessary spinlock
Hi, On Thu, Nov 15, 2012 at 04:34:11PM +0200, Roger Quadros wrote: We don't really need a spinlock here, so get rid of it. can you prove it ? what if an IRQ happens right after disabling clocks on -runtime_suspend() but before it returns ? Will this not cause a problem for you ? (note that I have not dug pm_runtime code to make sure this wouldn't cause a race). -- balbi signature.asc Description: Digital signature
Re: [PATCH 14/16] mfd: omap-usb-host: Support an auxiliary clock per port
On Thu, Nov 15, 2012 at 04:34:12PM +0200, Roger Quadros wrote: Boards like Panda require an auxiliary clock to clock the PHY that is connected to one of the USB ports. This patch enables board support code to provide the name and the rate of such a clock for each of the USB ports. omap-usb-host driver can then manage the clock. that clock is part of the PHY. What we need is a proper PHY driver and teach [ouex]hci-core about PHYs. I'd rather this wasn't merged... -- balbi signature.asc Description: Digital signature
Re: [PATCH 15/16] ARM: OMAP4: omap4panda: Don't enable USB PHY clock from board
On Thu, Nov 15, 2012 at 04:34:13PM +0200, Roger Quadros wrote:
Instead of enabling the USB PHY clock in the board file we
provide the PHY clock details to the driver via board platform
data so that driver code can manage the clock.
Signed-off-by: Roger Quadros rog...@ti.com
this patch is ok-ish. But clock should be managed by PHY driver instead.
---
arch/arm/mach-omap2/board-omap4panda.c | 14 +++---
1 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index bfcd397..b942abe 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -151,7 +151,9 @@ static const struct usbhs_omap_board_data usbhs_bdata
__initconst = {
.phy_reset = false,
.reset_gpio_port[0] = -EINVAL,
.reset_gpio_port[1] = -EINVAL,
- .reset_gpio_port[2] = -EINVAL
+ .reset_gpio_port[2] = -EINVAL,
+ .clk[0] = auxclk3_ck, /* FREF_CLK3 provides 19.2 MHz clock to PHY */
+ .clkrate[0] = 1920,
};
static struct gpio panda_ehci_gpios[] __initdata = {
@@ -162,16 +164,6 @@ static struct gpio panda_ehci_gpios[] __initdata = {
static void __init omap4_ehci_init(void)
{
int ret;
- struct clk *phy_ref_clk;
-
- /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */
- phy_ref_clk = clk_get(NULL, auxclk3_ck);
- if (IS_ERR(phy_ref_clk)) {
- pr_err(Cannot request auxclk3\n);
- return;
- }
- clk_set_rate(phy_ref_clk, 1920);
- clk_prepare_enable(phy_ref_clk);
/* disable the power to the usb hub prior to init and reset phy+hub */
ret = gpio_request_array(panda_ehci_gpios,
--
1.7.4.1
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 16/16] ARM: OMAP: omap4panda: Power down the USB PHY and ETH when not in use
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote:
From: Andy Green andy.gr...@linaro.org
This patch changes the management of the two GPIO for
hub reset (actually controls enable of ULPI PHY and hub reset) and
hub power (controls power to hub + eth).
looks like this should be done by the hub driver. Alan, what would you
say ? Should the hub driver know how to power itself up ?
Because the only connection from the ULPI PHY output is to the hub+eth
chip, there is no meaning in having the ULPI PHY running but not the
hub+eth chip.
The patch adds two regulators, the hub power one being the parent of the
reset one, and binds the reset one to the hsusb driver by using the magic
name hsusb.0.
The end result is the usb and eth driver may now be built modular, and
when ehci-hcd is not inserted, the ULPI PHY, hub and ethernet are all
depowered or held in reset.
Signed-off-by: Andy Green andy.gr...@linaro.org
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/board-omap4panda.c | 80 +++
1 files changed, 59 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index b942abe..90fb2c4 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -156,32 +156,68 @@ static const struct usbhs_omap_board_data usbhs_bdata
__initconst = {
.clkrate[0] = 1920,
};
-static struct gpio panda_ehci_gpios[] __initdata = {
- { GPIO_HUB_POWER, GPIOF_OUT_INIT_LOW, hub_power },
- { GPIO_HUB_NRESET, GPIOF_OUT_INIT_LOW, hub_nreset },
+/*
+ * hub_nreset also enables the ULPI PHY
+ * ULPI PHY is always powered
+ * hub_power enables a 3.3V regulator for (hub + eth) chip
+ * however there's no point having ULPI PHY in use alone
+ * since it's only connected to the (hub + eth) chip
+ */
+
+static struct regulator_init_data panda_hub = {
+ .constraints = {
+ .name = vhub,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ },
};
-static void __init omap4_ehci_init(void)
-{
- int ret;
+static struct fixed_voltage_config panda_vhub = {
+ .supply_name = vhub,
+ .microvolts = 330,
+ .gpio = GPIO_HUB_POWER,
+ .startup_delay = 7, /* 70msec */
+ .enable_high = 1,
+ .enabled_at_boot = 0,
+ .init_data = panda_hub,
+};
- /* disable the power to the usb hub prior to init and reset phy+hub */
- ret = gpio_request_array(panda_ehci_gpios,
- ARRAY_SIZE(panda_ehci_gpios));
- if (ret) {
- pr_err(Unable to initialize EHCI power/reset\n);
- return;
- }
+static struct platform_device omap_vhub_device = {
+ .name = reg-fixed-voltage,
+ .id = 2,
+ .dev = {
+ .platform_data = panda_vhub,
+ },
+};
- gpio_export(GPIO_HUB_POWER, 0);
- gpio_export(GPIO_HUB_NRESET, 0);
- gpio_set_value(GPIO_HUB_NRESET, 1);
+static struct regulator_init_data panda_ulpireset = {
+ /*
+ * idea is that when operating ulpireset, regulator api will make
+ * sure that the hub+eth chip is powered, since it's the parent
+ */
+ .supply_regulator = vhub, /* we are a child of vhub */
+ .constraints = {
+ .name = hsusb0,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ },
+};
- usbhs_init(usbhs_bdata);
+static struct fixed_voltage_config panda_vulpireset = {
+ .supply_name = hsusb0, /* this name is magic for hsusb driver */
+ .microvolts = 330,
+ .gpio = GPIO_HUB_NRESET,
+ .startup_delay = 7, /* 70msec */
+ .enable_high = 1,
+ .enabled_at_boot = 0,
+ .init_data = panda_ulpireset,
+};
- /* enable power to hub */
- gpio_set_value(GPIO_HUB_POWER, 1);
-}
+static struct platform_device omap_vulpireset_device = {
+ .name = reg-fixed-voltage,
+ .id = 3,
+ .dev = {
+ .platform_data = panda_vulpireset,
+ },
+};
static struct omap_musb_board_data musb_board_data = {
.interface_type = MUSB_INTERFACE_UTMI,
@@ -496,10 +532,12 @@ static void __init omap4_panda_init(void)
omap4_panda_i2c_init();
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
platform_device_register(omap_vwlan_device);
+ platform_device_register(omap_vhub_device);
+ platform_device_register(omap_vulpireset_device);
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap4_twl6030_hsmmc_init(mmc);
- omap4_ehci_init();
+ usbhs_init(usbhs_bdata);
usb_musb_init(musb_board_data);
omap4_panda_display_init();
}
--
1.7.4.1
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 02/16] mfd: omap-usb-tll: Clean up clock handling
Hi,
On Wed, Nov 21, 2012 at 02:36:48PM +0200, Roger Quadros wrote:
break;
default:
- dev_err(dev, TLL version failed\n);
- ret = -ENODEV;
- goto err_ioremap;
+ tll-nch = DEFAULT_TLL_CHANNEL_COUNT;
+ dev_info(dev,
+ USB TLL Rev : 0x%x not recognized, assuming %d channels\n,
+ ver, tll-nch);
this hsould be dev_dbg().
I think it should be more of a warning because it signals a problem.
There is another pr_info in the success path which could probably be a
dev_dbg.
it's not a problem at all. It just means that a newer OMAP has come to
market and perhaps we don't need extra code to support it. A revision
detection should *never* be grounds to failure. When we can't understand
the revision, we default to the highest possible value we know.
that's not an error.
+ struct clk *fck;
+
+ sprintf(clk_name, usb_tll_hs_usb_ch%d_clk, i);
this will overflow if 'i' (for whatever reason) goes over 9.
OK i'll add an extra character. Highly unlikely to go above 99 :)
I'd stick to snprintf() though, or something safer.
+ fck = clk_get(dev, clk_name);
please use devm_clk_get().
sidenote, it would be amazing to a patch at the top of this series
converting to devm_* api ;-)
@@ -373,11 +385,17 @@ static int usbtll_runtime_resume(struct device *dev)
spin_lock_irqsave(tll-lock, flags);
- if (is_ehci_tll_mode(pdata-port_mode[0]))
- clk_enable(tll-usbtll_p1_fck);
-
- if (is_ehci_tll_mode(pdata-port_mode[1]))
- clk_enable(tll-usbtll_p2_fck);
+ for (i = 0; i tll-nch; i++) {
+ if (is_ehci_tll_mode(pdata-port_mode[i])) {
+ int r;
+ r = clk_enable(tll-ch_clk[i]);
+ if (r) {
+ dev_err(dev,
+ %s : Error enabling ch %d clock: %d\n,
+ __func__, i, r);
you don't need __func__.
Thought it would be useful to point out where the message is coming
from. But it should be easy to grep too so I'll remove it.
correct, if messages are unique, you don't need __func__ anyway ;-)
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 04/16] mfd: omap-usb-tll: Move port clock handling out of runtime ops
Hi,
On Wed, Nov 21, 2012 at 02:45:46PM +0200, Roger Quadros wrote:
spin_unlock_irqrestore(tll-lock, flags);
- return 0;
+ return i;
}
+EXPORT_SYMBOL_GPL(omap_tll_enable);
-static int usbtll_runtime_suspend(struct device *dev)
+int omap_tll_disable(void)
why ?? Why are you actually dropping runtime PM from this driver ? have
you tested PM transitions after applying this patch ?
I'm not dropping runtime PM as such. Just separating enabling of channel
clocks from runtime PM (read enabling hwmod). The only user for this
driver is omap-usb-host.c via the omap_tll_enable/disable() calls.
These calls still call pm_runtime_get/put() to enable the TLL hwmod.
I have tested PM transitions on bus suspend/resume and modprobe/rmmod.
They still work fine.
weird, I didn't see any dev_pm_ops being re-added to your
platform_driver structure :-s
On your original patch I see this:
-static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
- SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
- usbtll_runtime_resume,
- NULL)
-};
-
-static struct platform_driver usbtll_omap_driver = {
- .driver = {
- .name = (char *)usbtll_driver_name,
- .owner = THIS_MODULE,
- .pm = usbtllomap_dev_pm_ops,
- },
- .probe = usbtll_omap_probe,
- .remove = __devexit_p(usbtll_omap_remove),
-};
but there is never anythying re-adding that dev_pm_ops, so runtime pm
callbacks are literally dropped from this driver. If that's still fine,
please make it clear on commit log.
--
balbi
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Description: Digital signature
Re: [PATCH 05/16] mfd: omap-usb-tll: Add OMAP5 revision and HSIC support
Hi, On Wed, Nov 21, 2012 at 02:49:41PM +0200, Roger Quadros wrote: On 11/21/2012 02:12 PM, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:03PM +0200, Roger Quadros wrote: The TLL module on OMAP5 has 3 channels. HSIC mode requires the TLL channel to be in Transparent UTMI mode. Signed-off-by: Roger Quadros rog...@ti.com --- drivers/mfd/omap-usb-tll.c | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index 31ac7db..c48d545 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -54,10 +54,13 @@ #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 +#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 16) +#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS(1 15) #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF(1 11) #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 10) #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 9) #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 8) +#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 1) #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 1) #define OMAP_TLL_CHANNEL_CONF_CHANEN(1 0) @@ -96,6 +99,7 @@ #define OMAP_USBTLL_REV1 0x0015 /* OMAP3 */ #define OMAP_USBTLL_REV2 0x0018 /* OMAP 3630 */ #define OMAP_USBTLL_REV3 0x0004 /* OMAP4 */ +#define OMAP_USBTLL_REV4 0x6 /* OMAP5 */ looks wrong to me. Are you sure this is what that 32-bit register reads out ? Bits[31:30] should read as 0b01 as per internal documentation. Yes I'm pretty sure about that. I'm on 5432 though. Not sure if 5430 shows different. this is really peculiar about these IPs... Anyway, if you made sure, fair enough. Just make the 0x6 more explicitly 32-bits like the other macros (0x0006) -- balbi signature.asc Description: Digital signature
Re: [PATCH 0/5] OMAPFB: use dma_alloc instead of omap's vram
HI Tomi, we need one rank of cma to allocate the memory for driver in kernel space .And the default CMA is for allocating memory frome usespace.So if we allocate the memory from the default CMA zone ,there maybe introduce fragmention to the default CMA zone.The kernel space memory donot touch the memory from userspace Jello Huang On 21/11/2012, Tony Lindgren t...@atomide.com wrote: * Tomi Valkeinen tomi.valkei...@ti.com [121115 23:17]: I added your acks, and pushed: git://gitorious.org/linux-omap-dss2/linux.git 3.8/vram-conversion It's based on -rc4 as my other branches are based on that. OK thanks! Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Thanks Jello Huang -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 2/4] mfd: introduce retu-mfd driver
Hi Aaro, On Sun, Nov 18, 2012 at 06:36:20PM +0200, Aaro Koskinen wrote: Retu is a multi-function device found on Nokia Internet Tablets implementing at least watchdog, RTC, headset detection and power button functionality. This patch implements minimum functionality providing register access, IRQ handling and power off functions. Cc: Samuel Ortiz sa...@linux.intel.com Acked-by: Felipe Balbi ba...@ti.com Acked-by: Tony Lindgren t...@atomide.com Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi --- drivers/mfd/Kconfig |9 ++ drivers/mfd/Makefile |1 + drivers/mfd/retu-mfd.c | 264 ++ include/linux/mfd/retu.h | 22 4 files changed, 296 insertions(+) create mode 100644 drivers/mfd/retu-mfd.c create mode 100644 include/linux/mfd/retu.h Thanks, I applied this one to my for-next branch. Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 08/16] mfd: omap-usb-host: know about number of ports from revision register
On 11/21/2012 03:43 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:06PM +0200, Roger Quadros wrote:
prevents getting clocks that don't exist on the platform.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 47
---
1 files changed, 35 insertions(+), 12 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 44772ae..ad89939 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -94,6 +94,7 @@ struct usbhs_port {
};
struct usbhs_hcd_omap {
+int nports;
struct usbhs_port port[MAX_HS_USB_PORTS];
struct clk *xclk60mhsp1_ck;
@@ -291,7 +292,7 @@ static int usbhs_runtime_resume(struct device *dev)
if (omap-ehci_logic_fck !IS_ERR(omap-ehci_logic_fck))
clk_enable(omap-ehci_logic_fck);
-for (i = 0; i MAX_HS_USB_PORTS; i++) {
+for (i = 0; i omap-nports; i++) {
if (is_ehci_tll_mode(pdata-port_mode[i])) {
if (omap-port[i].utmi_clk) {
r = clk_enable(omap-port[i].utmi_clk);
@@ -320,7 +321,7 @@ static int usbhs_runtime_suspend(struct device *dev)
spin_lock_irqsave(omap-lock, flags);
-for (i = 0; i MAX_HS_USB_PORTS; i++) {
+for (i = 0; i omap-nports; i++) {
if (is_ehci_tll_mode(pdata-port_mode[i])) {
if (omap-port[i].utmi_clk)
clk_disable(omap-port[i].utmi_clk);
@@ -360,8 +361,6 @@ static void omap_usbhs_init(struct device *dev)
pm_runtime_get_sync(dev);
spin_lock_irqsave(omap-lock, flags);
-omap-usbhs_rev = usbhs_read(omap-uhh_base, OMAP_UHH_REVISION);
-dev_dbg(dev, OMAP UHH_REVISION 0x%x\n, omap-usbhs_rev);
reg = usbhs_read(omap-uhh_base, OMAP_UHH_HOSTCONFIG);
/* setup ULPI bypass and burst configurations */
@@ -502,8 +501,32 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
omap-pdata = pdata;
platform_set_drvdata(pdev, omap);
+pm_runtime_enable(dev);
+pm_runtime_get_sync(dev);
+omap-usbhs_rev = usbhs_read(omap-uhh_base, OMAP_UHH_REVISION);
+
+/* we need to call runtime suspend before we update omap-nports
+ * to prevent unbalanced clk_disable()
+ */
wrong comment style.
+pm_runtime_put_sync(dev);
does it *really* need to be a synchronous put ?
No, I'll replace it by the asynchronous variant.
+
+switch (omap-usbhs_rev) {
+case OMAP_USBHS_REV1:
+omap-nports = 3;
+break;
+case OMAP_USBHS_REV2:
+omap-nports = 2;
+break;
+default:
+omap-nports = MAX_HS_USB_PORTS;
+dev_info(dev,
+ USB HOST Rev : 0x%d not recognized, assuming %d ports\n,
+ omap-usbhs_rev, omap-nports);
please make this dev_dbg().
IMHO, I think this should be displayed on the console as the driver
doesn't really support that revision and might need to be upgraded. It
won't be displayed for existing hardware that we know about till date.
+break;
+}
+
need_logic_fck = false;
-for (i = 0; i MAX_HS_USB_PORTS; i++) {
+for (i = 0; i omap-nports; i++) {
if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
is_ehci_hsic_mode(i))
need_logic_fck |= true;
@@ -538,7 +561,7 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
goto err_init60m;
}
-for (i = 0; i MAX_HS_USB_PORTS; i++) {
+for (i = 0; i omap-nports; i++) {
struct clk *pclk;
char utmi_clk[] = usb_host_hs_utmi_px_clk;
@@ -588,8 +611,6 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
}
-pm_runtime_enable(dev);
moving this part around isn't part of $SUBJECT aparently.
pm_runtime_enable is moved earlier so that we can read the REVISION
register, so it is part of $SUBJECT.
-
omap_usbhs_init(dev);
ret = omap_usbhs_alloc_children(pdev);
if (ret) {
@@ -597,15 +618,15 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
goto err_alloc;
}
+pr_info(OMAP USB HOST : revision 0x%x, ports %d\n,
+omap-usbhs_rev, omap-nports);
please remove this pr_info() as it doesn't add anything other than noise
to bootup, IMHO.
OK.
return 0;
err_alloc:
omap_usbhs_deinit(pdev-dev);
-
-pm_runtime_disable(dev);
iounmap(omap-uhh_base);
-for (i = 0; i MAX_HS_USB_PORTS; i++)
+for (i = 0; i omap-nports; i++)
clk_put(omap-port[i].utmi_clk);
clk_put(omap-init_60m_fclk);
@@ -619,6 +640,8 @@ err_xclk60mhsp2:
err_xclk60mhsp1:
clk_put(omap-ehci_logic_fck);
+
Re: [PATCH 09/16] mfd: omap-usb-host: override number of ports from platform data
On 11/21/2012 03:45 PM, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:07PM +0200, Roger Quadros wrote: For some platforms e.g. OMAP5, we cannot rely on USBHOST revision to determine the number of ports available. In such cases we have you need to make it clear *why* we can't. Imagine someone reading this 5 years from now... he'll be all like: why can't I find any documentation about this OMAP5 ? Why was it so special that its revision register wasn't enough to figure out number of ports ? OK, i'll add a note like this both OMAP5 and OMAP4 exhibit the same revision ID in the USBHOST_REVISION register, but in fact have different number of ports physically available on the SoC (i.e. 2 for OMAP4 and 3 for OMAP5 respectively). So we can't rely on REVISION register to determine number of ports for OMAP5 and depend on platform data/Device tree instead cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 16/16] ARM: OMAP: omap4panda: Power down the USB PHY and ETH when not in use
On Wed, 21 Nov 2012, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote: From: Andy Green andy.gr...@linaro.org This patch changes the management of the two GPIO for hub reset (actually controls enable of ULPI PHY and hub reset) and hub power (controls power to hub + eth). looks like this should be done by the hub driver. Alan, what would you say ? Should the hub driver know how to power itself up ? Not knowing the context, I'm a little confused. What is this hub you're talking about? Is it a separate USB hub incorporated into the IP (like Intel's rate-matching hubs in their later chipsets)? Or is it the root hub? Under what circumstances would the hub not be powered (i.e., when is it not in use)? If it isn't powered, can it be suspended? Or enumerated? Is this the sort of thing that should be handled by a PM domain? As much as possible, the hub driver tries to ignore the differences between root hubs and non-root hubs. So for example, all hubs have to be told to turn on VBUS power to their ports; therefore the hub driver tells them. But external hubs are either self-powered or bus-powered; there's no need and no way for the hub driver to turn the hub power on or off. Therefore it doesn't try, not even for root hubs. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/13] MFD: twl drivers: Convert to regmap IO and cleanups
Hi Peter, On Tue, Nov 13, 2012 at 09:28:41AM +0100, Peter Ujfalusi wrote: Hello, This series converts the twl-core to use regmap for IO towards the chip. With the conversion to regmap IO we no longer need to allocate bigger buffer for writes. I have appended patches to this series to make some cleanups which will help in the future to further clean up the twl stack. The series depends on a regression fix patch for the twl-core: https://patchwork.kernel.org/patch/1679421/ Regards, Peter --- Peter Ujfalusi (13): MFD: twl-core: Register twl4030-madc child only for twl4030 class MFD: twl-core: Support for proper PWM drivers MFD: twl-core: Convert to use regmap for I/O MFD/rtc/gpio: twl: No need to allocate bigger buffer for write MFD: twl-core: Clean up and correct child registration mfd: twl: Remove unused TWL_MODULE definitions mfd: twl: Convert module id definitions to enums mfd: twl: Use decimal numbers for TWL6030_MODULE_IDs MFD: twl-core: re-group the twl_mapping table for easier reading mfd: twl4030-madc: Change TWL4030_MODULE_* ids to TWL_MODULE_* mfd: twl4030-power: Change TWL4030_MODULE_* ids to TWL_MODULE_* mfd: twl4030-irq: Change TWL4030_MODULE_* ids to TWL_MODULE_* mfd: twl-core: Change TWL4030_MODULE_* ids to TWL_MODULE_* All patches applied now, thanks. Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 16/16] ARM: OMAP: omap4panda: Power down the USB PHY and ETH when not in use
On 11/21/2012 04:52 PM, Alan Stern wrote: On Wed, 21 Nov 2012, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote: From: Andy Green andy.gr...@linaro.org This patch changes the management of the two GPIO for hub reset (actually controls enable of ULPI PHY and hub reset) and hub power (controls power to hub + eth). looks like this should be done by the hub driver. Alan, what would you say ? Should the hub driver know how to power itself up ? Not knowing the context, I'm a little confused. What is this hub you're talking about? Is it a separate USB hub incorporated into the IP (like Intel's rate-matching hubs in their later chipsets)? Or is it the root hub? This is actually a USB HUB + Ethernet combo chip (LAN9514) that is hard wired on the panda board with its Power and Reset pins controlled by 2 GPIOs from the OMAP SoC. When powered, this chip can consume significant power (~0.7 W) because of the (integrated Ethernet even when suspended. I suppose the ethernet driver SMSC95XX) doesn't put it into a low enough power state on suspend. It doesn't make sense to power the chip when USB is not required on the whole (e.g. ehci_hcd module is not loaded). This is what this patch is trying to fix. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 16/16] ARM: OMAP: omap4panda: Power down the USB PHY and ETH when not in use
On Wed, 21 Nov 2012, Roger Quadros wrote: On 11/21/2012 04:52 PM, Alan Stern wrote: On Wed, 21 Nov 2012, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote: From: Andy Green andy.gr...@linaro.org This patch changes the management of the two GPIO for hub reset (actually controls enable of ULPI PHY and hub reset) and hub power (controls power to hub + eth). looks like this should be done by the hub driver. Alan, what would you say ? Should the hub driver know how to power itself up ? Not knowing the context, I'm a little confused. What is this hub you're talking about? Is it a separate USB hub incorporated into the IP (like Intel's rate-matching hubs in their later chipsets)? Or is it the root hub? This is actually a USB HUB + Ethernet combo chip (LAN9514) that is hard wired on the panda board with its Power and Reset pins controlled by 2 GPIOs from the OMAP SoC. When powered, this chip can consume significant power (~0.7 W) because of the (integrated Ethernet even when suspended. I suppose the ethernet driver SMSC95XX) doesn't put it into a low enough power state on suspend. It doesn't make sense to power the chip when USB is not required on the whole (e.g. ehci_hcd module is not loaded). This is what this patch is trying to fix. Ah, okay. Then yes, assuming you want to power this chip only when either ehci-hcd or the ethernet driver is loaded, the right places to manage the power GPIO are in the init and exit routines of the two drivers. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 02/16] mfd: omap-usb-tll: Clean up clock handling
On 11/21/2012 04:03 PM, Felipe Balbi wrote:
Hi,
On Wed, Nov 21, 2012 at 02:36:48PM +0200, Roger Quadros wrote:
break;
default:
- dev_err(dev, TLL version failed\n);
- ret = -ENODEV;
- goto err_ioremap;
+ tll-nch = DEFAULT_TLL_CHANNEL_COUNT;
+ dev_info(dev,
+ USB TLL Rev : 0x%x not recognized, assuming %d channels\n,
+ ver, tll-nch);
this hsould be dev_dbg().
I think it should be more of a warning because it signals a problem.
There is another pr_info in the success path which could probably be a
dev_dbg.
it's not a problem at all. It just means that a newer OMAP has come to
market and perhaps we don't need extra code to support it. A revision
detection should *never* be grounds to failure. When we can't understand
the revision, we default to the highest possible value we know.
that's not an error.
Agreed. I'm not treating it as an error. We still continue probe and the
driver should work for newer revisions. Just prints a line on the
console about the new revision. Thought it would be useful to us, but if
you think it is a problem I don't mind removing it :).
+ struct clk *fck;
+
+ sprintf(clk_name, usb_tll_hs_usb_ch%d_clk, i);
this will overflow if 'i' (for whatever reason) goes over 9.
OK i'll add an extra character. Highly unlikely to go above 99 :)
I'd stick to snprintf() though, or something safer.
OK.
+ fck = clk_get(dev, clk_name);
please use devm_clk_get().
sidenote, it would be amazing to a patch at the top of this series
converting to devm_* api ;-)
@@ -373,11 +385,17 @@ static int usbtll_runtime_resume(struct device *dev)
spin_lock_irqsave(tll-lock, flags);
- if (is_ehci_tll_mode(pdata-port_mode[0]))
- clk_enable(tll-usbtll_p1_fck);
-
- if (is_ehci_tll_mode(pdata-port_mode[1]))
- clk_enable(tll-usbtll_p2_fck);
+ for (i = 0; i tll-nch; i++) {
+ if (is_ehci_tll_mode(pdata-port_mode[i])) {
+ int r;
+ r = clk_enable(tll-ch_clk[i]);
+ if (r) {
+ dev_err(dev,
+ %s : Error enabling ch %d clock: %d\n,
+ __func__, i, r);
you don't need __func__.
Thought it would be useful to point out where the message is coming
from. But it should be easy to grep too so I'll remove it.
correct, if messages are unique, you don't need __func__ anyway ;-)
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Re: [PATCH 10/16] mfd: omap-usb-host: Intialize all available ports
On 11/21/2012 03:52 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:08PM +0200, Roger Quadros wrote:
OMAPs till date can have upto 3 ports. We need to initialize
s/upto/up to/
the port mode in HOSTCONFIG register for all of them.
why *all* of them ? Isn't it enough to initialize only the ones we're
going to use ? If not, why ?
Right. I'll correct the $SUBJECT and comment.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 31 ---
1 files changed, 12 insertions(+), 19 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index c20234b..0d39bd7 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -67,12 +67,9 @@
#define OMAP4_UHH_SYSCONFIG_NOSTDBY (1 4)
#define OMAP4_UHH_SYSCONFIG_SOFTRESET (1 0)
-#define OMAP4_P1_MODE_CLEAR (3 16)
+#define OMAP4_P1_MODE_MASK (3 16)
changing this name isn't part of $SUBJECT.
#define OMAP4_P1_MODE_TLL (1 16)
#define OMAP4_P1_MODE_HSIC (3 16)
-#define OMAP4_P2_MODE_CLEAR (3 18)
-#define OMAP4_P2_MODE_TLL (1 18)
-#define OMAP4_P2_MODE_HSIC (3 18)
why do you delete these ? Also not part of $SUBJECT.
#define OMAP_UHH_DEBUG_CSR (0x44)
@@ -343,6 +340,7 @@ static void omap_usbhs_init(struct device *dev)
struct usbhs_omap_platform_data *pdata = omap-pdata;
unsigned long flags;
unsignedreg;
+int i;
dev_dbg(dev, starting TI HSUSB Controller\n);
@@ -403,21 +401,16 @@ static void omap_usbhs_init(struct device *dev)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
}
} else if (is_omap_usbhs_rev2(omap)) {
-/* Clear port mode fields for PHY mode*/
-reg = ~OMAP4_P1_MODE_CLEAR;
-reg = ~OMAP4_P2_MODE_CLEAR;
-
-if (is_ehci_tll_mode(pdata-port_mode[0]) ||
-(is_ohci_port(pdata-port_mode[0])))
-reg |= OMAP4_P1_MODE_TLL;
-else if (is_ehci_hsic_mode(pdata-port_mode[0]))
-reg |= OMAP4_P1_MODE_HSIC;
-
-if (is_ehci_tll_mode(pdata-port_mode[1]) ||
-(is_ohci_port(pdata-port_mode[1])))
-reg |= OMAP4_P2_MODE_TLL;
-else if (is_ehci_hsic_mode(pdata-port_mode[1]))
-reg |= OMAP4_P2_MODE_HSIC;
+for (i = 0; i omap-nports; i++) {
+/* Clear port mode fields for PHY mode*/
+reg = ~(OMAP4_P1_MODE_MASK 2*i);
add spaces around '*' operator.
+if (is_ehci_tll_mode(pdata-port_mode[i]) ||
+(is_ohci_port(pdata-port_mode[i])))
+reg |= OMAP4_P1_MODE_TLL 2*i;
ditto
+else if (is_ehci_hsic_mode(pdata-port_mode[i]))
+reg |= OMAP4_P1_MODE_HSIC 2*i;
ditto
in fact, I would convert this construct into a switch which would look
like:
reg = ~(OMAP4_P1_MODE_MASK i * 2);
switch (port_mode[i]) {
case OMAP4_P1_MODE_TLL:
reg |= OMAP4_P1_MODE_TLL i * 2;
break;
case OMAP_P1_MODE_HSIC:
reg |= OMAP4_P1_MODE_HSIC i * 2;
break;
}
Also, it looks like the whoel for loop with port mode settings could be
re-factored to a separate function to aid readability.
To clarify, did you mean to use a function for the above code snippet
where we set the HOSTCONFIG part?
cheers,
-roger
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Re: [PATCH 11/16] mfd: omap-usb-host: Manage HSIC clocks for HSIC mode
On 11/21/2012 03:54 PM, Felipe Balbi wrote:
Hi,
On Thu, Nov 15, 2012 at 04:34:09PM +0200, Roger Quadros wrote:
Enable the optional HSIC clocks (60MHz and 480MHz) for the ports
that are configured in HSIC mode.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 56
+-
1 files changed, 54 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 0d39bd7..e5ba193 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -88,6 +88,8 @@
struct usbhs_port {
struct clk *utmi_clk;
+struct clk *hsic60m_clk;
+struct clk *hsic480m_clk;
};
struct usbhs_hcd_omap {
@@ -300,6 +302,26 @@ static int usbhs_runtime_resume(struct device *dev)
}
}
}
+
+/* Enable HSIC clocks if required */
+if (is_ehci_hsic_mode(pdata-port_mode[i])) {
+if (omap-port[i].hsic60m_clk) {
+r = clk_enable(omap-port[i].hsic60m_clk);
+if (r) {
+dev_err(dev,
+ %s: Can't enable port %d hsic60m clk
: %d\n,
+ __func__, i, r);
+}
+}
+if (omap-port[i].hsic480m_clk) {
+r = clk_enable(omap-port[i].hsic480m_clk);
+if (r) {
+dev_err(dev,
+ %s: Can't enable port %d hsic480m clk
: %d\n,
+ __func__, i, r);
+}
+}
+}
}
with this deep indentation, it should've caught your attention that
something can definitely be re-factored.
OK.
@@ -323,6 +345,14 @@ static int usbhs_runtime_suspend(struct device *dev)
if (omap-port[i].utmi_clk)
clk_disable(omap-port[i].utmi_clk);
}
+
+if (is_ehci_hsic_mode(pdata-port_mode[i])) {
+if (omap-port[i].hsic60m_clk)
+clk_disable(omap-port[i].hsic60m_clk);
+
+if (omap-port[i].hsic480m_clk)
+clk_disable(omap-port[i].hsic480m_clk);
+}
}
if (omap-ehci_logic_fck !IS_ERR(omap-ehci_logic_fck))
@@ -575,6 +605,7 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
for (i = 0; i omap-nports; i++) {
struct clk *pclk;
char utmi_clk[] = usb_host_hs_utmi_px_clk;
+char hsic_clk[] = usb_host_hs_hsic480m_px_clk;
same comment from another patch. Was this lazyness ?
:)
@@ -590,6 +621,21 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
else
omap-port[i].utmi_clk = pclk;
+sprintf(hsic_clk, usb_host_hs_hsic480m_p%d_clk, i + 1);
will overflow if 'i' ever goes over 8.
+pclk = clk_get(dev, hsic_clk);
+if (IS_ERR(pclk))
+dev_err(dev, Failed to get clock : %s : %ld\n,
+hsic_clk, PTR_ERR(pclk));
+else
+omap-port[i].hsic480m_clk = pclk;
+
+sprintf(hsic_clk, usb_host_hs_hsic60m_p%d_clk, i + 1);
ditto.
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Re: [PATCH 13/16] mfd: omap-usb-host: Get rid of unnecessary spinlock
On 11/21/2012 03:57 PM, Felipe Balbi wrote: Hi, On Thu, Nov 15, 2012 at 04:34:11PM +0200, Roger Quadros wrote: We don't really need a spinlock here, so get rid of it. can you prove it ? what if an IRQ happens right after disabling clocks on -runtime_suspend() but before it returns ? Will this not cause a problem for you ? Which IRQ are you referring to? I don't see any IRQ handler in omap-usb-hot.c In the original code, the spinlock is used only in runtime_suspend/resume and probe functions and it didn't make any sense to me why it was there in the first place. (note that I have not dug pm_runtime code to make sure this wouldn't cause a race). cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 14/16] mfd: omap-usb-host: Support an auxiliary clock per port
On 11/21/2012 03:58 PM, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:12PM +0200, Roger Quadros wrote: Boards like Panda require an auxiliary clock to clock the PHY that is connected to one of the USB ports. This patch enables board support code to provide the name and the rate of such a clock for each of the USB ports. omap-usb-host driver can then manage the clock. that clock is part of the PHY. What we need is a proper PHY driver and teach [ouex]hci-core about PHYs. I'd rather this wasn't merged... Okay. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 16/16] ARM: OMAP: omap4panda: Power down the USB PHY and ETH when not in use
On 11/21/2012 05:32 PM, Alan Stern wrote: On Wed, 21 Nov 2012, Roger Quadros wrote: On 11/21/2012 04:52 PM, Alan Stern wrote: On Wed, 21 Nov 2012, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote: From: Andy Green andy.gr...@linaro.org This patch changes the management of the two GPIO for hub reset (actually controls enable of ULPI PHY and hub reset) and hub power (controls power to hub + eth). looks like this should be done by the hub driver. Alan, what would you say ? Should the hub driver know how to power itself up ? Not knowing the context, I'm a little confused. What is this hub you're talking about? Is it a separate USB hub incorporated into the IP (like Intel's rate-matching hubs in their later chipsets)? Or is it the root hub? This is actually a USB HUB + Ethernet combo chip (LAN9514) that is hard wired on the panda board with its Power and Reset pins controlled by 2 GPIOs from the OMAP SoC. When powered, this chip can consume significant power (~0.7 W) because of the (integrated Ethernet even when suspended. I suppose the ethernet driver SMSC95XX) doesn't put it into a low enough power state on suspend. It doesn't make sense to power the chip when USB is not required on the whole (e.g. ehci_hcd module is not loaded). This is what this patch is trying to fix. Ah, okay. Then yes, assuming you want to power this chip only when either ehci-hcd or the ethernet driver is loaded, the right places to manage the power GPIO are in the init and exit routines of the two drivers. The Ethernet function actually connects over USB within the chip. So managing the power only in the ehci-hcd driver should suffice. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] twl4030: Fix chained irq handling on resume from suspend
Hi Kalle, On Tue, Oct 16, 2012 at 05:59:35PM +0300, Kalle Jokiniemi wrote: The irqs are enabled one-by-one in pm core resume_noirq phase. This leads to situation where the twl4030 primary interrupt handler (PIH) is enabled before the chained secondary handlers (SIH). As the PIH cannot clear the pending interrupt, and SIHs have not been enabled yet, a flood of interrupts hangs the device. Fixed the issue by setting the SIH irqs with IRQF_EARLY_RESUME flags, so they get enabled before the PIH. Signed-off-by: Kalle Jokiniemi kalle.jokini...@jollamobile.com --- drivers/mfd/twl4030-irq.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) Thanks, patch applied to my for-linus branch. Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/5] remaining omap multiplatform patches for v3.8 merge window
Hi all, Here are the remaining patches to be able to build omap2+ with multiplatform enabled. Booting requires disabling ARM_ERRATA_751472 as discussed earlier. And then the OMAP4_ERRATA_I688 can't be used currently. These patches are based on a merge of the following branches that are needed to keep things compiling: - omap-for-v3.8/cleanup-headers-prepare-multiplatform-v3 - omap-for-v3.8/clock - omap-for-v3.8/cleanup-headers-iommu - omap-for-v3.8/pm-part2 - Tomi's branch 3.8/vram-conversion - Russell's branch omap-serial There are few drivers still breaking because of their use of plat/cpu.h and cpu_is_omap macros. The following already have patches queued in linux next: - drivers/staging/omapdrm/omap_drv.c - drivers/staging/omapdrm/omap_dmm_tiler.h The fixes to following have been already posted: - drivers/crypto/omap-sham.c And the following should have patches coming: - drivers/mfd/omap-usb-host.c - drivers/media/platform/omap/omap_voutlib.c - drivers/media/platform/omap3isp/isp.c But for now, the last patch in this series is for testing only. Regards, Tony --- Tony Lindgren (5): watchdog: OMAP: fixup for ARM multiplatform support ASoC: OMAP: mcbsp fixes for enabling ARM multiplatform support ARM: OMAP: Move plat/omap-serial.h to include/linux/platform_data/serial-omap.h ARM: OMAP: Move plat-omap/dma-omap.h to include/linux/omap-dma.h RFC: ARM: OMAP: Prepare Kconfig and Makefiles for enabling ARCH_MULTIPLATFORM arch/arm/Kconfig | 13 + arch/arm/configs/omap2plus_defconfig |2 arch/arm/mach-omap1/board-h2.c |2 arch/arm/mach-omap1/board-h3.c |2 arch/arm/mach-omap1/board-palmte.c |2 arch/arm/mach-omap1/board-palmtt.c |2 arch/arm/mach-omap1/board-palmz71.c|2 arch/arm/mach-omap1/board-sx1.c|2 arch/arm/mach-omap1/dma.c |2 arch/arm/mach-omap1/io.c |2 arch/arm/mach-omap1/lcd_dma.c |2 arch/arm/mach-omap1/mcbsp.c|2 arch/arm/mach-omap1/pm.c |2 arch/arm/mach-omap2/Kconfig| 23 + arch/arm/mach-omap2/Makefile |3 arch/arm/mach-omap2/board-3430sdp.c|2 arch/arm/mach-omap2/board-h4.c |2 arch/arm/mach-omap2/board-rx51-peripherals.c |2 arch/arm/mach-omap2/board-rx51.c |2 arch/arm/mach-omap2/devices.c |2 arch/arm/mach-omap2/dma.c |2 arch/arm/mach-omap2/io.c |2 arch/arm/mach-omap2/mcbsp.c|2 arch/arm/mach-omap2/omap_hwmod_2420_data.c |2 arch/arm/mach-omap2/omap_hwmod_2430_data.c |2 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |3 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c |2 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |2 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |2 arch/arm/mach-omap2/pm24xx.c |2 arch/arm/mach-omap2/pm34xx.c |3 arch/arm/mach-omap2/serial.c |4 arch/arm/plat-omap/Kconfig | 30 -- arch/arm/plat-omap/Makefile|2 arch/arm/plat-omap/dma.c |2 arch/arm/plat-omap/include/plat-omap/dma-omap.h| 377 drivers/crypto/omap-aes.c |2 drivers/crypto/omap-sham.c |2 drivers/dma/omap-dma.c |2 drivers/media/platform/omap/omap_vout.c|2 drivers/media/platform/omap/omap_vout_vrfb.c |2 drivers/media/platform/omap3isp/ispstat.h |2 drivers/media/platform/soc_camera/omap1_camera.c |2 drivers/mtd/nand/omap2.c |1 drivers/mtd/onenand/omap2.c|2 drivers/tty/serial/omap-serial.c |3 drivers/usb/gadget/omap_udc.c |2 drivers/usb/musb/tusb6010_omap.c |2 drivers/video/omap/lcdc.c |2 drivers/video/omap/omapfb_main.c |2 drivers/video/omap/sossi.c |2 drivers/watchdog/omap_wdt.c|2 include/linux/omap-dma.h | 366 +++ include/linux/platform_data/serial-omap.h |0 sound/soc/omap/mcbsp.c |4 sound/soc/omap/mcbsp.h |6 sound/soc/omap/omap-mcbsp.c|5 57 files changed, 457 insertions(+), 468
[PATCH 1/5] watchdog: OMAP: fixup for ARM multiplatform support
Recent changes to the omap_wdt.c removed the dependencies to the core omap code, but forgot to remove mach/hardware.h. We cannot include any plat headers with multiplatform support enabled. cc: Wim Van Sebroeck w...@iguana.be cc: linux-watch...@vger.kernel.org Signed-off-by: Tony Lindgren t...@atomide.com --- drivers/watchdog/omap_wdt.c |2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index 477a1d4..e5e7069 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c @@ -45,8 +45,6 @@ #include linux/uaccess.h #include linux/slab.h #include linux/pm_runtime.h -#include mach/hardware.h - #include linux/platform_data/omap-wd-timer.h #include omap_wdt.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/5] ASoC: OMAP: mcbsp fixes for enabling ARM multiplatform support
We cannot include any plat or mach headers for the multiplatform
support.
Fix the issue by defining local mcbsp_omap1().
cc: Peter Ujfalusi peter.ujfal...@ti.com
cc: Jarkko Nikula jarkko.nik...@bitmer.com
cc: Liam Girdwood l...@ti.com
cc: Mark Brown broo...@opensource.wolfsonmicro.com
cc: Jaroslav Kysela pe...@perex.cz
cc: Takashi Iwai ti...@suse.de
cc: alsa-de...@alsa-project.org
Signed-off-by: Tony Lindgren t...@atomide.com
---
sound/soc/omap/mcbsp.c |4 +---
sound/soc/omap/mcbsp.h |6 ++
sound/soc/omap/omap-mcbsp.c |5 ++---
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c
index afb8d4f..a9a2438 100644
--- a/sound/soc/omap/mcbsp.c
+++ b/sound/soc/omap/mcbsp.c
@@ -28,8 +28,6 @@
#include linux/platform_data/asoc-ti-mcbsp.h
-#include plat/cpu.h
-
#include mcbsp.h
static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
@@ -612,7 +610,7 @@ void omap_mcbsp_free(struct omap_mcbsp *mcbsp)
* system will refuse to enter idle if the CLKS pin source is not reset
* back to internal source.
*/
- if (!cpu_class_is_omap1())
+ if (!mcbsp_omap1())
omap2_mcbsp_set_clks_src(mcbsp, MCBSP_CLKS_PRCM_SRC);
spin_lock(mcbsp-lock);
diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h
index 49a6725..a89791c 100644
--- a/sound/soc/omap/mcbsp.h
+++ b/sound/soc/omap/mcbsp.h
@@ -26,6 +26,12 @@
#include omap-pcm.h
+#ifdef CONFIG_ARCH_OMAP1
+#define mcbsp_omap1() 1
+#else
+#define mcbsp_omap1() 0
+#endif
+
/* McBSP register numbers. Register address offset = num * reg_step */
enum {
/* Common registers */
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index a6ee157..0916760 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -34,7 +34,6 @@
#include sound/initval.h
#include sound/soc.h
-#include plat/cpu.h
#include linux/platform_data/asoc-ti-mcbsp.h
#include mcbsp.h
#include omap-mcbsp.h
@@ -512,7 +511,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai
*cpu_dai,
regs-srgr2 |= CLKSM;
break;
case OMAP_MCBSP_SYSCLK_CLKS_FCLK:
- if (cpu_class_is_omap1()) {
+ if (mcbsp_omap1()) {
err = -EINVAL;
break;
}
@@ -520,7 +519,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai
*cpu_dai,
MCBSP_CLKS_PRCM_SRC);
break;
case OMAP_MCBSP_SYSCLK_CLKS_EXT:
- if (cpu_class_is_omap1()) {
+ if (mcbsp_omap1()) {
err = 0;
break;
}
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[PATCH 3/5] ARM: OMAP: Move plat/omap-serial.h to include/linux/platform_data/serial-omap.h
We need to move this file to allow ARM multiplatform configurations to build for omap2+. This can now be done as this file now only contains platform_data. cc: Russell King li...@arm.linux.org.uk cc: Alan Cox a...@linux.intel.com cc: Greg Kroah-Hartman gre...@linuxfoundation.org cc: Govindraj.R govindraj.r...@ti.com cc: Kevin Hilman khil...@ti.com cc: Felipe Balbi ba...@ti.com cc: linux-ser...@vger.kernel.org Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/serial.c |4 +--- drivers/tty/serial/omap-serial.c |3 +-- include/linux/platform_data/serial-omap.h |0 3 files changed, 2 insertions(+), 5 deletions(-) rename arch/arm/plat-omap/include/plat/omap-serial.h = include/linux/platform_data/serial-omap.h (100%) diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index aa30a3c..25c799b 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -26,9 +26,7 @@ #include linux/slab.h #include linux/pm_runtime.h #include linux/console.h - -#include plat/omap-serial.h -#include plat-omap/dma-omap.h +#include linux/platform_data/serial-omap.h #include common.h #include omap_hwmod.h diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 17babde..0240aa8 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -41,8 +41,7 @@ #include linux/of.h #include linux/gpio.h #include linux/pinctrl/consumer.h - -#include plat/omap-serial.h +#include linux/platform_data/serial-omap.h #define OMAP_MAX_HSUART_PORTS 6 diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/include/linux/platform_data/serial-omap.h similarity index 100% rename from arch/arm/plat-omap/include/plat/omap-serial.h rename to include/linux/platform_data/serial-omap.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/5] RFC: ARM: OMAP: Prepare Kconfig and Makefiles for enabling ARCH_MULTIPLATFORM
Not intended for merging yet as few more drivers need work. You may need to update your config to make sure you have: CONFIG_ARCH_MULTIPLATFORM=y CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_OMAP2PLUS=y And may need CONFIG_ARCH_MULTI_V6=y too. The omap2plus_defconfig has been updated in this patch. --- arch/arm/Kconfig | 13 ++--- arch/arm/configs/omap2plus_defconfig |2 +- arch/arm/mach-omap2/Kconfig | 23 +++ arch/arm/mach-omap2/Makefile |3 +++ arch/arm/plat-omap/Kconfig | 30 -- arch/arm/plat-omap/Makefile |2 ++ 6 files changed, 39 insertions(+), 34 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 041cf07..8d955b1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -928,17 +928,24 @@ config ARCH_DAVINCI help Support for TI's DaVinci platform. -config ARCH_OMAP - bool TI OMAP +config ARCH_OMAP1 + bool TI OMAP1 depends on MMU select ARCH_HAS_CPUFREQ select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_OMAP select ARCH_REQUIRE_GPIOLIB + select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP select HAVE_CLK + select HAVE_IDE + select IRQ_DOMAIN + select NEED_MACH_IO_H if PCCARD + select NEED_MACH_MEMORY_H help - Support for TI's OMAP platform (OMAP1/2/3/4). + Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) config ARCH_VT8500 bool VIA/WonderMedia 85xx diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 6230304..35907ab 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -20,7 +20,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_OMAP=y +CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP_RESET_CLOCKS=y CONFIG_OMAP_MUX_DEBUG=y CONFIG_ARM_THUMBEE=y diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index c81bc50..fbd3f20 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -1,3 +1,26 @@ +config ARCH_OMAP + bool + +config ARCH_OMAP2PLUS + bool TI OMAP2/3/4/5 SoCs with device tree support if (ARCH_MULTI_V6 || ARCH_MULTI_V7) + select ARCH_HAS_CPUFREQ + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_OMAP + select ARCH_REQUIRE_GPIOLIB + select CLKDEV_LOOKUP + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP + select HAVE_CLK + select OMAP_DM_TIMER + select PINCTRL + select PROC_DEVICETREE if PROC_FS + select SPARSE_IRQ + select USE_OF + help + Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 + + if ARCH_OMAP2PLUS menu TI OMAP2/3/4 Specific Features diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 4a6e6d5..ca47d7a 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -2,6 +2,9 @@ # Makefile for the linux kernel. # +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ + -I$(srctree)/arch/arm/plat-omap/include + # Common support obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 82fcb20..fd440fb 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -5,36 +5,6 @@ menu TI OMAP Common Features config ARCH_OMAP_OTG bool -choice - prompt OMAP System Type - default ARCH_OMAP2PLUS - -config ARCH_OMAP1 - bool TI OMAP1 - select CLKDEV_LOOKUP - select CLKSRC_MMIO - select GENERIC_IRQ_CHIP - select HAVE_IDE - select IRQ_DOMAIN - select NEED_MACH_IO_H if PCCARD - select NEED_MACH_MEMORY_H - help - Systems based on omap7xx, omap15xx or omap16xx - -config ARCH_OMAP2PLUS - bool TI OMAP2/3/4 - select CLKDEV_LOOKUP - select GENERIC_IRQ_CHIP - select OMAP_DM_TIMER - select PINCTRL - select PROC_DEVICETREE if PROC_FS - select SPARSE_IRQ - select USE_OF - help - Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 - -endchoice - comment OMAP Feature Selections config OMAP_DEBUG_DEVICES diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 8d88584..cfc3372 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -2,6 +2,8 @@ # Makefile for the linux kernel. # +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include + # Common support obj-y := sram.o dma.o fb.o counter_32k.o obj-m := -- To unsubscribe from this list: send the line unsubscribe linux-omap
Re: [PATCH 3/5] ARM: OMAP: Move plat/omap-serial.h to include/linux/platform_data/serial-omap.h
On Wed, Nov 21, 2012 at 09:42:30AM -0800, Tony Lindgren wrote: We need to move this file to allow ARM multiplatform configurations to build for omap2+. This can now be done as this file now only contains platform_data. cc: Russell King li...@arm.linux.org.uk cc: Alan Cox a...@linux.intel.com cc: Greg Kroah-Hartman gre...@linuxfoundation.org cc: Govindraj.R govindraj.r...@ti.com cc: Kevin Hilman khil...@ti.com cc: Felipe Balbi ba...@ti.com cc: linux-ser...@vger.kernel.org Signed-off-by: Tony Lindgren t...@atomide.com nice, thanks :-) Reviewed-by: Felipe Balbi ba...@ti.com --- arch/arm/mach-omap2/serial.c |4 +--- drivers/tty/serial/omap-serial.c |3 +-- include/linux/platform_data/serial-omap.h |0 3 files changed, 2 insertions(+), 5 deletions(-) rename arch/arm/plat-omap/include/plat/omap-serial.h = include/linux/platform_data/serial-omap.h (100%) diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index aa30a3c..25c799b 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -26,9 +26,7 @@ #include linux/slab.h #include linux/pm_runtime.h #include linux/console.h - -#include plat/omap-serial.h -#include plat-omap/dma-omap.h +#include linux/platform_data/serial-omap.h #include common.h #include omap_hwmod.h diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 17babde..0240aa8 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -41,8 +41,7 @@ #include linux/of.h #include linux/gpio.h #include linux/pinctrl/consumer.h - -#include plat/omap-serial.h +#include linux/platform_data/serial-omap.h #define OMAP_MAX_HSUART_PORTS6 diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/include/linux/platform_data/serial-omap.h similarity index 100% rename from arch/arm/plat-omap/include/plat/omap-serial.h rename to include/linux/platform_data/serial-omap.h -- balbi signature.asc Description: Digital signature
Re: tfp410 and i2c_bus_num
* Felipe Balbi ba...@ti.com [121119 04:25]: On Mon, Nov 19, 2012 at 01:09:42PM +0200, Tomi Valkeinen wrote: On 2012-11-19 11:27, Felipe Balbi wrote: fair enough... it looks like this is going nowhere, so best we come back to this later. No reason to block your patch. Well, the patch is a fix for stable kernels, so even if we had a great idea how to rewrite the dss device handling, it wouldn't affect this patch =). ok good ;-) FYI I'm assuming Tomi will resend the patch as there were some changes requested early on in the thread. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] ARM: OMAP: Timer Clean-up
* Jon Hunter jon-hun...@ti.com [121116 09:19]: The following changes since commit 9dc57643738f9fbe45c10cc062903d5dfda5bdd9: Merge branch 'fixes-timer' of github.com:jonhunter/linux into omap-for-v3.8/timer (2012-11-13 13:52:38 -0800) are available in the git repository at: git://github.com/jonhunter/linux.git cleanup-timer for you to fetch changes up to 258e84af9799b8c81cf856dcbd8e2d4cc082741d: ARM: OMAP2+: Fix compiler warning for 32k timer (2012-11-16 10:35:09 -0600) Various OMAP timer clean-ups. I have dropped the patch to move dmtimer.h as discussed. I have also included the compilation warning fix for sync-32k reported by Kevin Hilman. Thanks pulling into omap-for-v3.8/timer. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/2] ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
* Igor Grinberg grinb...@compulab.co.il [121119 23:19]: CONFIG_OMAP_32K_TIMER is kind of standing on the single zImage way. Make OMAP2+ timer code independant from the CONFIG_OMAP_32K_TIMER setting. To remove the dependancy, several conversions/additions had to be done: 1) Timer initialization functions are named by the platform name and the clock source in use. This also makes it possible to define and use the GPTIMER as the clock source instead of the 32K timer on platforms that do not have the 32K timer ip block or the 32K timer is not wired on the board. Currently, the the timer is chosen in the machine_desc structure on per board basis. Later, DT should be used to choose the timer. 2) Settings under the CONFIG_OMAP_32K_TIMER option are used as defaults and those under !CONFIG_OMAP_32K_TIMER are removed. This removes the CONFIG_OMAP_32K_TIMER on OMAP2+ timer code. 3) Since we have all the timers defined inside machine_desc structure and we no longer need the fallback to gp_timer clock source in case 32k_timer clock source is unavailable (namely on AM33xx), we no longer need the #ifdef around omap2_sync32k_clocksource_init() function. Remove the #ifdef CONFIG_OMAP_32K_TIMER around the omap2_sync32k_clocksource_init() function. Thanks for cleaning this up. Applying both into omap-for-v3.8/timer. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: AM335x: Beaglebone stops to boot with current git kernel
* Jean Pihet jean.pi...@newoldbits.com [121114 08:43]: On Wed, Nov 14, 2012 at 4:28 PM, Igor Mazanov i.maza...@gmail.com wrote: Beaglebone boot process is broken with the current git kernel. I use omap2plus_defconfig for tests. It looks like the boot process stops due to the last changes in the AM33xx clock sysbsystem. A following patch resolves this issue: ... The patch should change the name of the hwmod entry as well, can you fold this change in the current patch? Any news on updating this? Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/5] ARM: OMAP: Move plat/omap-serial.h to include/linux/platform_data/serial-omap.h
* Tony Lindgren t...@atomide.com [121121 09:44]: We need to move this file to allow ARM multiplatform configurations to build for omap2+. This can now be done as this file now only contains platform_data. Russell, this one depends on your commit fd9980c7 (SERIAL: omap: remove OMAP_UART_SYSC_RESET and OMAP_UART_FIFO_CLR). Is that commit immutable and OK to merge as a dependency to my branch? Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 4/5] iommu/omap: adapt to runtime pm
* Omar Ramirez Luna omar.l...@linaro.org [121119 17:08]: Use runtime PM functionality interfaced with hwmod enable/idle functions, to replace direct clock operations and sysconfig handling. Due to reset sequence, pm_runtime_[get|put]_sync must be used, to avoid possible operations with the module under reset. Because of this and given that the driver uses spin_locks to protect their critical sections, we must use pm_runtime_irq_safe in order for the runtime ops to be happy, otherwise might_sleep_if checks in runtime framework will complain. The remaining pm_runtime out of iommu_enable and iommu_disable corresponds to paths that can be accessed through debugfs, some of them doesn't work if the module is not enabled first, but in future if the mmu is idled withouth freeing, these are needed to debug. Signed-off-by: Omar Ramirez Luna omar.l...@linaro.org --- arch/arm/mach-omap2/omap-iommu.c |1 - drivers/iommu/omap-iommu.c | 40 ++--- drivers/iommu/omap-iommu.h |3 -- drivers/iommu/omap-iommu2.c | 17 include/linux/platform_data/iommu-omap.h |1 - 5 files changed, 19 insertions(+), 43 deletions(-) diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index 02726a6..7642fc4 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c @@ -31,7 +31,6 @@ static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused) return -ENOMEM; pdata-name = oh-name; - pdata-clk_name = oh-main_clk; pdata-nr_tlb_entries = a-nr_tlb_entries; pdata-da_start = a-da_start; pdata-da_end = a-da_end; The runtime PM related changes would be good to be checked by Kevin, added him to cc. For the arch/arm/mach-omap2/ change above: Acked-by: Tony Lindgren t...@atomide.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 5/5] ARM: OMAP4: hwmod data: ipu and dsp to use parent clocks instead of leaf clocks
* Omar Ramirez Luna omar.l...@linaro.org [121119 17:08]:
This prevents hwmod _enable_clocks...omap2_dflt_clk_enable path
from enabling modulemode inside CLKCTRL using its clk-enable_reg
field. Instead is left to _omap4_enable_module though soc_ops, as
the one in charge of this setting.
According to comments received[1] for related patches the idea is
to get rid of leaf clocks in future. So remove these two while at it.
[1] http://lkml.org/lkml/2012/8/20/226
This one should be queued by Paul, or at least acked by him.
Regards,
Tony
Signed-off-by: Omar Ramirez Luna omar.l...@linaro.org
---
arch/arm/mach-omap2/clock44xx_data.c | 22 --
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |4 ++--
2 files changed, 2 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c..067c486 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1316,16 +1316,6 @@ static struct clk dmic_fck = {
.clkdm_name = abe_clkdm,
};
-static struct clk dsp_fck = {
- .name = dsp_fck,
- .ops= clkops_omap2_dflt,
- .enable_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
- .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
- .clkdm_name = tesla_clkdm,
- .parent = dpll_iva_m4x2_ck,
- .recalc = followparent_recalc,
-};
-
static struct clk dss_sys_clk = {
.name = dss_sys_clk,
.ops= clkops_omap2_dflt,
@@ -1696,16 +1686,6 @@ static struct clk i2c4_fck = {
.recalc = followparent_recalc,
};
-static struct clk ipu_fck = {
- .name = ipu_fck,
- .ops= clkops_omap2_dflt,
- .enable_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
- .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
- .clkdm_name = ducati_clkdm,
- .parent = ducati_clk_mux_ck,
- .recalc = followparent_recalc,
-};
-
static struct clk iss_ctrlclk = {
.name = iss_ctrlclk,
.ops= clkops_omap2_dflt,
@@ -3151,7 +3131,6 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, div_ts_ck,div_ts_ck,
CK_446X),
CLK(NULL, dmic_sync_mux_ck, dmic_sync_mux_ck,
CK_443X),
CLK(NULL, dmic_fck, dmic_fck,
CK_443X),
- CLK(NULL, dsp_fck, dsp_fck,
CK_443X),
CLK(NULL, dss_sys_clk, dss_sys_clk,
CK_443X),
CLK(NULL, dss_tv_clk, dss_tv_clk,
CK_443X),
CLK(NULL, dss_48mhz_clk,dss_48mhz_clk,
CK_443X),
@@ -3183,7 +3162,6 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, i2c2_fck, i2c2_fck,
CK_443X),
CLK(NULL, i2c3_fck, i2c3_fck,
CK_443X),
CLK(NULL, i2c4_fck, i2c4_fck,
CK_443X),
- CLK(NULL, ipu_fck, ipu_fck,
CK_443X),
CLK(NULL, iss_ctrlclk, iss_ctrlclk,
CK_443X),
CLK(NULL, iss_fck, iss_fck,
CK_443X),
CLK(NULL, iva_fck, iva_fck,
CK_443X),
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index aab5c12..1f61093 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -650,7 +650,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
.mpu_irqs = omap44xx_dsp_irqs,
.rst_lines = omap44xx_dsp_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
- .main_clk = dsp_fck,
+ .main_clk = dpll_iva_m4x2_ck,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
@@ -1677,7 +1677,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
.mpu_irqs = omap44xx_ipu_irqs,
.rst_lines = omap44xx_ipu_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
- .main_clk = ipu_fck,
+ .main_clk = ducati_clk_mux_ck,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
--
1.7.4.1
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Re: [PATCH 0/2] ARM: OMAP: ads7846: fix pendown debounce setting
* Dmitry Torokhov dmitry.torok...@gmail.com [121120 00:23]: On Mon, Nov 19, 2012 at 06:03:56PM +0200, Igor Grinberg wrote: Commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code) have enabled the pendown GPIO debounce time setting by the below sequence: gpio_request_one() gpio_set_debounce() gpio_free() It also revealed a bug in the OMAP GPIO handling code which prevented the GPIO debounce clock to be disabled and CORE transition to low power states. Commit c9c55d9 (gpio/omap: fix off-mode bug: clear debounce settings on free/reset) fixes the OMAP GPIO handling code by making sure that the GPIO debounce clock gets disabled if no GPIO is requested from current bank. While fixing the OMAP GPIO handling code (in the right way), the above commit makes the gpio_request-set_debounce-free sequence invalid as after freeing the GPIO, the debounce settings are lost. This patch set: 1) Adds the pendown GPIO debounce time setting to the platform data structure of the ads7846 driver. 2) Fixes the OMAP platform code to pass the debounce time value to the driver instead of handling it by itself. Igor Grinberg (2): ads7846: enable pendown GPIO debounce time setting ARM: OMAP: ads7846: fix pendown debounce setting Makes sense to me. Tony, I have some stuff to push for 3.7 final, mind if I pick OMAP change as well? No please go ahead, I just acked the related patch. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] New Nokia RX-51 power supply battery driver
* Anton Vorontsov cbouatmai...@gmail.com [121119 10:25]:
On Mon, Nov 19, 2012 at 01:18:29PM +0100, Pali Rohár wrote:
[...]
Ok. Here is missing patch which register this driver in Nokia N900 board
code. Without it driver is not loaded.
Cc'ing OMAP folks.
Looks OK to me queue with the other patches in the series:
Acked-by: Tony Lindgren t...@atomide.com
From 0b60efd06a71668439bcb761c6572dd7df91dc17 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= pali.ro...@gmail.com
Date: Mon, 19 Nov 2012 09:05:24 +0100
Subject: [PATCH 1/3] ARM: OMAP: rx51: Register platform device for
rx51_battery driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 020e03c..fe1ac7e 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -271,11 +271,17 @@ static struct platform_device rx51_charger_device = {
},
};
+static struct platform_device rx51_battery_device = {
+ .name = rx51-battery,
+ .id = -1,
+};
+
static void __init rx51_charger_init(void)
{
WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
GPIOF_OUT_INIT_HIGH, isp1704_reset));
+ platform_device_register(rx51_battery_device);
platform_device_register(rx51_charger_device);
}
--
1.7.10.4
--
Pali Rohár
pali.ro...@gmail.com
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Re: [PATCH 02/16] mfd: omap-usb-tll: Clean up clock handling
Hi, On Wed, Nov 21, 2012 at 05:39:57PM +0200, Roger Quadros wrote: On 11/21/2012 04:03 PM, Felipe Balbi wrote: Hi, On Wed, Nov 21, 2012 at 02:36:48PM +0200, Roger Quadros wrote: break; default: -dev_err(dev, TLL version failed\n); -ret = -ENODEV; -goto err_ioremap; +tll-nch = DEFAULT_TLL_CHANNEL_COUNT; +dev_info(dev, + USB TLL Rev : 0x%x not recognized, assuming %d channels\n, +ver, tll-nch); this hsould be dev_dbg(). I think it should be more of a warning because it signals a problem. There is another pr_info in the success path which could probably be a dev_dbg. it's not a problem at all. It just means that a newer OMAP has come to market and perhaps we don't need extra code to support it. A revision detection should *never* be grounds to failure. When we can't understand the revision, we default to the highest possible value we know. that's not an error. Agreed. I'm not treating it as an error. We still continue probe and the driver should work for newer revisions. Just prints a line on the console about the new revision. Thought it would be useful to us, but if you think it is a problem I don't mind removing it :). that's the thing. It _is_ useful to *us*, kernel/device-driver engineers. But for the end user it just ends up as yet another meaningless print in dmesg ;-) -- balbi signature.asc Description: Digital signature
[PATCH 1/2] OMAP: DSS: do not fail if dpll4_m4_ck is missing
Do not fail if dpll4_m4_ck is missing. The clock is not there on omap24xx,
so this should not be a hard error.
The patch retains the functionality before the commit 185bae10 (OMAPDSS:
DSS: Cleanup cpu_is_ checks).
Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
drivers/video/omap2/dss/dss.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 2ab1c3e..55f2ea9 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -697,11 +697,15 @@ static int dss_get_clocks(void)
dss.dss_clk = clk;
- clk = clk_get(NULL, dss.feat-clk_name);
- if (IS_ERR(clk)) {
- DSSERR(Failed to get %s\n, dss.feat-clk_name);
- r = PTR_ERR(clk);
- goto err;
+ if (dss.feat-clk_name) {
+ clk = clk_get(NULL, dss.feat-clk_name);
+ if (IS_ERR(clk)) {
+ DSSERR(Failed to get %s\n, dss.feat-clk_name);
+ r = PTR_ERR(clk);
+ goto err;
+ }
+ } else {
+ clk = NULL;
}
dss.dpll4_m4_ck = clk;
--
1.7.10.4
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[PATCH 2/2] OMAP: DSS: panel-n8x0: register the DSS driver after SPI probe
Register the DSS driver after SPI probe. This simplifies the
initialization. This is similar to what is being done e.g.
in panel-acx565akm.
Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
drivers/video/omap2/displays/panel-n8x0.c | 39 +++--
1 file changed, 9 insertions(+), 30 deletions(-)
diff --git a/drivers/video/omap2/displays/panel-n8x0.c
b/drivers/video/omap2/displays/panel-n8x0.c
index 3fc5ad0..6cafdd4 100644
--- a/drivers/video/omap2/displays/panel-n8x0.c
+++ b/drivers/video/omap2/displays/panel-n8x0.c
@@ -702,18 +702,25 @@ static struct omap_dss_driver n8x0_panel_driver = {
static int mipid_spi_probe(struct spi_device *spi)
{
+ int r;
+
dev_dbg(spi-dev, mipid_spi_probe\n);
spi-mode = SPI_MODE_0;
s_drv_data.spidev = spi;
- return 0;
+ r = omap_dss_register_driver(n8x0_panel_driver);
+ if (r)
+ pr_err(n8x0_panel: dss driver registration failed\n);
+
+ return r;
}
static int mipid_spi_remove(struct spi_device *spi)
{
dev_dbg(spi-dev, mipid_spi_remove\n);
+ omap_dss_unregister_driver(n8x0_panel_driver);
return 0;
}
@@ -725,34 +732,6 @@ static struct spi_driver mipid_spi_driver = {
.probe = mipid_spi_probe,
.remove = __devexit_p(mipid_spi_remove),
};
+module_spi_driver(mipid_spi_driver);
-static int __init n8x0_panel_drv_init(void)
-{
- int r;
-
- r = spi_register_driver(mipid_spi_driver);
- if (r) {
- pr_err(n8x0_panel: spi driver registration failed\n);
- return r;
- }
-
- r = omap_dss_register_driver(n8x0_panel_driver);
- if (r) {
- pr_err(n8x0_panel: dss driver registration failed\n);
- spi_unregister_driver(mipid_spi_driver);
- return r;
- }
-
- return 0;
-}
-
-static void __exit n8x0_panel_drv_exit(void)
-{
- spi_unregister_driver(mipid_spi_driver);
-
- omap_dss_unregister_driver(n8x0_panel_driver);
-}
-
-module_init(n8x0_panel_drv_init);
-module_exit(n8x0_panel_drv_exit);
MODULE_LICENSE(GPL);
--
1.7.10.4
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Re: [PATCH 08/16] mfd: omap-usb-host: know about number of ports from revision register
Hi,
On Wed, Nov 21, 2012 at 04:45:27PM +0200, Roger Quadros wrote:
+ switch (omap-usbhs_rev) {
+ case OMAP_USBHS_REV1:
+ omap-nports = 3;
+ break;
+ case OMAP_USBHS_REV2:
+ omap-nports = 2;
+ break;
+ default:
+ omap-nports = MAX_HS_USB_PORTS;
+ dev_info(dev,
+USB HOST Rev : 0x%d not recognized, assuming %d ports\n,
+ omap-usbhs_rev, omap-nports);
please make this dev_dbg().
IMHO, I think this should be displayed on the console as the driver
doesn't really support that revision and might need to be upgraded. It
won't be displayed for existing hardware that we know about till date.
Ok, there are two ways to see this:
a) (my preferred) you don't treat it as an error, you assume that newer
HW is backwards compatible until proven otherwise. If that's the case,
you don't need this message because driver will just work.
b) you treat it as an error, you assume that newer HW is *not* backwards
compatible until prove otherwise. If that's the case, you don't need
this message because driver won't probe.
In both situations the message is pretty much meaningless. I prefer to
assume driver will work with newer HW and if it doesn't, it just means
(NOTICE, THIS IS MY OWN OPINION, NOT MY EMPLOYER'S OPINION BY ANY MEANS)
we're not fast enough delivering code to mainline kernel. We are the
first ones to have access to the HW afterall ;-)
+ break;
+ }
+
need_logic_fck = false;
- for (i = 0; i MAX_HS_USB_PORTS; i++) {
+ for (i = 0; i omap-nports; i++) {
if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
is_ehci_hsic_mode(i))
need_logic_fck |= true;
@@ -538,7 +561,7 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
goto err_init60m;
}
- for (i = 0; i MAX_HS_USB_PORTS; i++) {
+ for (i = 0; i omap-nports; i++) {
struct clk *pclk;
char utmi_clk[] = usb_host_hs_utmi_px_clk;
@@ -588,8 +611,6 @@ static int __devinit usbhs_omap_probe(struct
platform_device *pdev)
}
- pm_runtime_enable(dev);
moving this part around isn't part of $SUBJECT aparently.
pm_runtime_enable is moved earlier so that we can read the REVISION
register, so it is part of $SUBJECT.
fair enough, but then it needs to be mentioned on commit log.
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 09/16] mfd: omap-usb-host: override number of ports from platform data
Hi, On Wed, Nov 21, 2012 at 04:50:42PM +0200, Roger Quadros wrote: On 11/21/2012 03:45 PM, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:07PM +0200, Roger Quadros wrote: For some platforms e.g. OMAP5, we cannot rely on USBHOST revision to determine the number of ports available. In such cases we have you need to make it clear *why* we can't. Imagine someone reading this 5 years from now... he'll be all like: why can't I find any documentation about this OMAP5 ? Why was it so special that its revision register wasn't enough to figure out number of ports ? OK, i'll add a note like this both OMAP5 and OMAP4 exhibit the same revision ID in the USBHOST_REVISION register, but in fact have different number of ports physically available on the SoC (i.e. 2 for OMAP4 and 3 for OMAP5 respectively). So we can't rely on REVISION register to determine number of ports for OMAP5 and depend on platform data/Device tree instead perfect ;-) -- balbi signature.asc Description: Digital signature
Re: [PATCH 10/16] mfd: omap-usb-host: Intialize all available ports
hi,
On Wed, Nov 21, 2012 at 05:47:06PM +0200, Roger Quadros wrote:
On 11/21/2012 03:52 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:08PM +0200, Roger Quadros wrote:
OMAPs till date can have upto 3 ports. We need to initialize
s/upto/up to/
the port mode in HOSTCONFIG register for all of them.
why *all* of them ? Isn't it enough to initialize only the ones we're
going to use ? If not, why ?
Right. I'll correct the $SUBJECT and comment.
good, thanks.
@@ -403,21 +401,16 @@ static void omap_usbhs_init(struct device *dev)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
}
} else if (is_omap_usbhs_rev2(omap)) {
- /* Clear port mode fields for PHY mode*/
- reg = ~OMAP4_P1_MODE_CLEAR;
- reg = ~OMAP4_P2_MODE_CLEAR;
-
- if (is_ehci_tll_mode(pdata-port_mode[0]) ||
- (is_ohci_port(pdata-port_mode[0])))
- reg |= OMAP4_P1_MODE_TLL;
- else if (is_ehci_hsic_mode(pdata-port_mode[0]))
- reg |= OMAP4_P1_MODE_HSIC;
-
- if (is_ehci_tll_mode(pdata-port_mode[1]) ||
- (is_ohci_port(pdata-port_mode[1])))
- reg |= OMAP4_P2_MODE_TLL;
- else if (is_ehci_hsic_mode(pdata-port_mode[1]))
- reg |= OMAP4_P2_MODE_HSIC;
+ for (i = 0; i omap-nports; i++) {
+ /* Clear port mode fields for PHY mode*/
+ reg = ~(OMAP4_P1_MODE_MASK 2*i);
add spaces around '*' operator.
+ if (is_ehci_tll_mode(pdata-port_mode[i]) ||
+ (is_ohci_port(pdata-port_mode[i])))
+ reg |= OMAP4_P1_MODE_TLL 2*i;
ditto
+ else if (is_ehci_hsic_mode(pdata-port_mode[i]))
+ reg |= OMAP4_P1_MODE_HSIC 2*i;
ditto
in fact, I would convert this construct into a switch which would look
like:
reg = ~(OMAP4_P1_MODE_MASK i * 2);
switch (port_mode[i]) {
case OMAP4_P1_MODE_TLL:
reg |= OMAP4_P1_MODE_TLL i * 2;
break;
case OMAP_P1_MODE_HSIC:
reg |= OMAP4_P1_MODE_HSIC i * 2;
break;
}
Also, it looks like the whoel for loop with port mode settings could be
re-factored to a separate function to aid readability.
To clarify, did you mean to use a function for the above code snippet
where we set the HOSTCONFIG part?
correct. In fact the entire OMAP USB Host needs quite some love. By
quickly looking at the driver one can easily see many details which can
be greatly improved ;-)
thanks for starting this out ;-)
--
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Re: [PATCH 13/16] mfd: omap-usb-host: Get rid of unnecessary spinlock
Hi, On Wed, Nov 21, 2012 at 05:55:19PM +0200, Roger Quadros wrote: On 11/21/2012 03:57 PM, Felipe Balbi wrote: Hi, On Thu, Nov 15, 2012 at 04:34:11PM +0200, Roger Quadros wrote: We don't really need a spinlock here, so get rid of it. can you prove it ? what if an IRQ happens right after disabling clocks on -runtime_suspend() but before it returns ? Will this not cause a problem for you ? Which IRQ are you referring to? I don't see any IRQ handler in omap-usb-hot.c oops, silly old me ;-) In the original code, the spinlock is used only in runtime_suspend/resume and probe functions and it didn't make any sense to me why it was there in the first place. fair enough, I should've looked at the code before assuming there was an IRQ handler. Carry on :-) -- balbi signature.asc Description: Digital signature
Re: AM335x: Beaglebone stops to boot with current git kernel
On Wed, Nov 21, 2012 at 9:38 PM, Tony Lindgren t...@atomide.com wrote: * Jean Pihet jean.pi...@newoldbits.com [121114 08:43]: On Wed, Nov 14, 2012 at 4:28 PM, Igor Mazanov i.maza...@gmail.com wrote: Beaglebone boot process is broken with the current git kernel. I use omap2plus_defconfig for tests. It looks like the boot process stops due to the last changes in the AM33xx clock sysbsystem. A following patch resolves this issue: ... The patch should change the name of the hwmod entry as well, can you fold this change in the current patch? Any news on updating this? The current kernel boots, but after a switching to CCF doesn't work the debugss - it's just disabled in the current hwmod code. So, it looks like we can't use JTAG to connect to the running kernel. Regards, Igor. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 16/16] ARM: OMAP: omap4panda: Power down the USB PHY and ETH when not in use
Hi, On Wed, Nov 21, 2012 at 06:07:57PM +0200, Roger Quadros wrote: On 11/21/2012 05:32 PM, Alan Stern wrote: On Wed, 21 Nov 2012, Roger Quadros wrote: On 11/21/2012 04:52 PM, Alan Stern wrote: On Wed, 21 Nov 2012, Felipe Balbi wrote: On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote: From: Andy Green andy.gr...@linaro.org This patch changes the management of the two GPIO for hub reset (actually controls enable of ULPI PHY and hub reset) and hub power (controls power to hub + eth). looks like this should be done by the hub driver. Alan, what would you say ? Should the hub driver know how to power itself up ? Not knowing the context, I'm a little confused. What is this hub you're talking about? Is it a separate USB hub incorporated into the IP (like Intel's rate-matching hubs in their later chipsets)? Or is it the root hub? This is actually a USB HUB + Ethernet combo chip (LAN9514) that is hard wired on the panda board with its Power and Reset pins controlled by 2 GPIOs from the OMAP SoC. When powered, this chip can consume significant power (~0.7 W) because of the (integrated Ethernet even when suspended. I suppose the ethernet driver SMSC95XX) doesn't put it into a low enough power state on suspend. It doesn't make sense to power the chip when USB is not required on the whole (e.g. ehci_hcd module is not loaded). This is what this patch is trying to fix. Ah, okay. Then yes, assuming you want to power this chip only when either ehci-hcd or the ethernet driver is loaded, the right places to manage the power GPIO are in the init and exit routines of the two drivers. The Ethernet function actually connects over USB within the chip. So managing the power only in the ehci-hcd driver should suffice. the thing is that this could cause code duplication all over. LAN95xx is a generic USB Hub + Ethernet combo on one of ports from SMSC. *Any* platform could use it and could hook those power and reset pins to a GPIO. If we handle this at ehci-omap level, we risk having to duplicate the same piece of code for ehci-*.c Since that's a hub driver anyway, I wonder if it would be better to play with those gpios somewhere else ?!? -- balbi signature.asc Description: Digital signature
Re: [PATCH] Revert serial: omap: fix software flow control
On Wed, Nov 07, 2012 at 10:56:59AM +0100, Andreas Bießmann wrote: On 16.10.2012 16:09, Felipe Balbi wrote: This reverts commit 957ee7270d632245b43f6feb0e70d9a5e9ea6cf6 (serial: omap: fix software flow control). As Russell has pointed out, that commit isn't fixing Software Flow Control at all, and it actually makes it even more broken. It was agreed to revert this commit and use Russell's latest UART patches instead. Cc: Russell King li...@arm.linux.org.uk Signed-off-by: Felipe Balbi ba...@ti.com since 957ee7270d632245b43f6feb0e70d9a5e9ea6cf6 made it into stable (at least 3.4) I think it would be good decision to also apply this revert to stable until a working solution exists. Now queued up for the stable releases, thanks. greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] ARM: OMAP: ads7846: fix pendown debounce setting
On Wed, Nov 21, 2012 at 11:09:30AM -0800, Tony Lindgren wrote: * Dmitry Torokhov dmitry.torok...@gmail.com [121120 00:23]: On Mon, Nov 19, 2012 at 06:03:56PM +0200, Igor Grinberg wrote: Commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code) have enabled the pendown GPIO debounce time setting by the below sequence: gpio_request_one() gpio_set_debounce() gpio_free() It also revealed a bug in the OMAP GPIO handling code which prevented the GPIO debounce clock to be disabled and CORE transition to low power states. Commit c9c55d9 (gpio/omap: fix off-mode bug: clear debounce settings on free/reset) fixes the OMAP GPIO handling code by making sure that the GPIO debounce clock gets disabled if no GPIO is requested from current bank. While fixing the OMAP GPIO handling code (in the right way), the above commit makes the gpio_request-set_debounce-free sequence invalid as after freeing the GPIO, the debounce settings are lost. This patch set: 1) Adds the pendown GPIO debounce time setting to the platform data structure of the ads7846 driver. 2) Fixes the OMAP platform code to pass the debounce time value to the driver instead of handling it by itself. Igor Grinberg (2): ads7846: enable pendown GPIO debounce time setting ARM: OMAP: ads7846: fix pendown debounce setting Makes sense to me. Tony, I have some stuff to push for 3.7 final, mind if I pick OMAP change as well? No please go ahead, I just acked the related patch. Thanks Tony. -- Dmitry -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
