TI PWM sub modules like ECAP EHRPWM can enter in low power sleep
state during low power transitions of the platforms (like in AM33XX).
This patch series support low power sleep transition support. This
patch series depend on [1] and [2] and tested for low sleep support
on AM335x-evm for ECAP
In low power modes of AM33XX platforms, peripherals power is cut off.
This patch supports low power sleep transition support for EHRPWM
driver.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
Changes since v1:
- check the enabled status of pwm device for handling module
In low power modes of AM33XX platforms, peripherals power is cut off.
This patch supports low power sleep transition support for ECAP driver.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
Changes since v1:
- check the enabled status of pwm device for handling module
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On Thu, 17 Jan 2013 11:22:55 +1100 NeilBrown ne...@suse.de wrote:
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On Wed, 16 Jan 2013 13:11:26 +0200 Igor Grinberg grinb...@compulab.co.il
wrote:
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Hi Luca,
On 01/16/2013 10:45 PM, Luciano Coelho wrote:
The code to enable and disable the WiLink shared transport has been
removed from the TI-ST driver, so it must be implemented in the board
files instead. Add the relevant operations to Panda's board file.
Additionally, add the UART2
On Thu, Jan 17, 2013 at 10:30:15AM +0100, Peter Ujfalusi wrote:
Hi Luca,
On 01/16/2013 10:45 PM, Luciano Coelho wrote:
The code to enable and disable the WiLink shared transport has been
removed from the TI-ST driver, so it must be implemented in the board
files instead. Add the
On Thu, 2013-01-17 at 10:30 +0100, Peter Ujfalusi wrote:
Hi Luca,
Hi Péter!
On 01/16/2013 10:45 PM, Luciano Coelho wrote:
static struct ti_st_plat_data wilink_platform_data = {
- .nshutdown_gpio = 46,
.dev_name = /dev/ttyO1,
.flow_cntrl = 1,
.baud_rate =
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
New platforms are added which has multiple PHY's (of same type) and
which has multiple USB controllers. The binding information has to be
present in the PHY library (otg.c) in order for it to return the
appropriate PHY whenever the USB
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
This is in preparation for the changes in PHY library to support adding
and getting multiple PHYs of the same type. In the new design, the
binding information between the PHY and the USB controller should be
specified in the platform
On 01/17/2013 10:34 AM, Felipe Balbi wrote:
I just wonder how this is going to work with DT... You are not going to have
the ability to use callback in this form.
I think the GPIO handling should be done in the driver itself rather than in
the board file.
that can (should ?) be moved to
Hi Luca,
On 01/17/2013 10:35 AM, Luciano Coelho wrote:
I just wonder how this is going to work with DT... You are not going to have
the ability to use callback in this form.
I think the GPIO handling should be done in the driver itself rather than in
the board file.
I agree. The problem
Hi,
On Thu, Jan 17, 2013 at 10:55:14AM +0100, Peter Ujfalusi wrote:
On 01/17/2013 10:34 AM, Felipe Balbi wrote:
I just wonder how this is going to work with DT... You are not going to
have
the ability to use callback in this form.
I think the GPIO handling should be done in the driver
On Thu, Jan 17, 2013 at 12:05:10PM +0200, Felipe Balbi wrote:
Hi,
On Thu, Jan 17, 2013 at 10:55:14AM +0100, Peter Ujfalusi wrote:
On 01/17/2013 10:34 AM, Felipe Balbi wrote:
I just wonder how this is going to work with DT... You are not going to
have
the ability to use callback in
On Thu, 2013-01-17 at 12:09 +0200, Felipe Balbi wrote:
On Thu, Jan 17, 2013 at 12:05:10PM +0200, Felipe Balbi wrote:
Hi,
On Thu, Jan 17, 2013 at 10:55:14AM +0100, Peter Ujfalusi wrote:
On 01/17/2013 10:34 AM, Felipe Balbi wrote:
I just wonder how this is going to work with DT... You
On 01/17/2013 11:35 AM, Luciano Coelho wrote:
This out-of-tree code doesn't explain why we need to do the
enable/disable in the board file. We just need to do things a bit
differently in the driver. I'll start cleaning all this stuff up for
-next pretty soon.
For now, ie. 3.7 (stable) and
On Thu, Jan 10, 2013 at 2:09 PM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
On 01/10/2013 11:41 AM, Linus Walleij wrote:
Sorry Peter this must have been missed somehow.
This does not apply to the current v3.8-rc3, could you respin
this on top of Torvalds' tree?
Grant applied the patch
On Wed, 16 Jan 2013 12:57:08 +0200 Roger Quadros rog...@ti.com wrote:
On 01/16/2013 12:27 PM, NeilBrown wrote:
On Wed, 16 Jan 2013 12:00:48 +0200 Roger Quadros rog...@ti.com wrote:
On 01/09/2013 12:29 AM, NeilBrown wrote:
Hi,
I'm trying to get off_mode working reliably on my gta04
Hi,
On Thursday 17 January 2013 03:09 PM, Roger Quadros wrote:
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
This is in preparation for the changes in PHY library to support adding
and getting multiple PHYs of the same type. In the new design, the
binding information between the PHY
Hi,
On Thursday 17 January 2013 03:07 PM, Roger Quadros wrote:
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
New platforms are added which has multiple PHY's (of same type) and
which has multiple USB controllers. The binding information has to be
present in the PHY library (otg.c) in
On 01/17/2013 01:01 PM, NeilBrown wrote:
On Wed, 16 Jan 2013 12:57:08 +0200 Roger Quadros rog...@ti.com wrote:
On 01/16/2013 12:27 PM, NeilBrown wrote:
On Wed, 16 Jan 2013 12:00:48 +0200 Roger Quadros rog...@ti.com wrote:
On 01/09/2013 12:29 AM, NeilBrown wrote:
Hi,
I'm trying to get
On Tue, 2013-01-15 at 19:48 -0300, Ezequiel Garcia wrote:
I saw you have acked the gpmc patch on nand.
Can I add your Acked-by on this one, when I send the rebased patch set?
Yes, I saw this series which depends on Daniel Mack's work. It looks
good. You can add
Acked-by: Artem Bityutskiy
On Wed, 2013-01-16 at 12:22 +, Philip, Avinash wrote:
This series is based on linux 3.8-rc2 and tested with [1].
Also this patch series depend on [1] for NAND flash device
tree data and gpmc nand device tree binding documentation updates.
1. [PATCH v7 0/5] OMAP GPMC DT bindings
Hi Kishon,
On Wed, Jan 16, 2013 at 8:30 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
This is in preparation for the changes in PHY library to support adding
and getting multiple PHYs of the same type. In the new design, the
binding information between the PHY and the USB controller should
Hi,
On Thursday 17 January 2013 05:41 PM, Vivek Gautam wrote:
Hi Kishon,
On Wed, Jan 16, 2013 at 8:30 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
This is in preparation for the changes in PHY library to support adding
and getting multiple PHYs of the same type. In the new design, the
Hi Kishon,
Thanks for the explanation.
On Thu, Jan 17, 2013 at 6:01 PM, kishon kis...@ti.com wrote:
Hi,
On Thursday 17 January 2013 05:41 PM, Vivek Gautam wrote:
Hi Kishon,
On Wed, Jan 16, 2013 at 8:30 PM, Kishon Vijay Abraham I kis...@ti.com
wrote:
This is in preparation for the
Hi Linus,
On 01/17/2013 11:43 AM, Linus Walleij wrote:
On Thu, Jan 10, 2013 at 2:09 PM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
On 01/10/2013 11:41 AM, Linus Walleij wrote:
Sorry Peter this must have been missed somehow.
This does not apply to the current v3.8-rc3, could you respin
V == Vaibhav Bedia vaibhav.be...@ti.com writes:
Hi,
V +static void am33xx_pm_firmware_cb(const struct firmware *fw, void *context)
V +{
V + struct wkup_m3_context *wkup_m3_context = context;
V + struct platform_device *pdev = to_platform_device(wkup_m3_context-dev);
V + int ret = 0;
Hi Peter,
I made changes to cpsw driver two weeks ago, which add support for reading
MAC address from CPU and also I posted it to review.
You can find patch here : https://patchwork.kernel.org/patch/1966481/
I will create updated patch next week, depended on reactions. Can you try
that
Hello.
On 01/15/2013 05:26 PM, kishon wrote:
On 15-01-2013 12:42, Kishon Vijay Abraham I wrote:
A seperate driver has been added to handle the usb part of control
module. A device for the above driver is created here, using the register
address information to be used by the driver for
On Thu, Jan 10, 2013 at 06:35:26PM +0530, Philip Avinash wrote:
From: Philip, Avinash avinashphi...@ti.com
The clock framework has changed and it's now better to invoke
clock_prepare_enable() and clk_disable_unprepare() rather than the
legacy clk_enable() and clk_disable() calls. This patch
On Thu, Jan 17, 2013 at 02:50:02PM +0530, Philip Avinash wrote:
In low power modes of AM33XX platforms, peripherals power is cut off.
This patch supports low power sleep transition support for EHRPWM
driver.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
Changes since v1:
-
On Thu, Jan 17, 2013 at 02:50:03PM +0530, Philip Avinash wrote:
In low power modes of AM33XX platforms, peripherals power is cut off.
This patch supports low power sleep transition support for ECAP driver.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
Changes since v1:
-
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
In order to add support for multipe PHY's of the same type, the API's
for adding PHY and getting PHY has been changed. Now the binding
information of the PHY and controller should be done in platform file
using usb_bind_phy API. And for
Michal == Michal Bachraty michal.bachr...@gmail.com writes:
Hi Michael,
Michal I made changes to cpsw driver two weeks ago, which add support
Michal for reading MAC address from CPU and also I posted it to
Michal review. You can find patch here :
Michal
* Peter Ujfalusi peter.ujfal...@ti.com [130117 02:44]:
On 01/17/2013 11:35 AM, Luciano Coelho wrote:
This out-of-tree code doesn't explain why we need to do the
enable/disable in the board file. We just need to do things a bit
differently in the driver. I'll start cleaning all this stuff
* Peter Korsgaard jac...@sunsite.dk [130117 08:46]:
Michal == Michal Bachraty michal.bachr...@gmail.com writes:
Hi Michael,
Michal I made changes to cpsw driver two weeks ago, which add support
Michal for reading MAC address from CPU and also I posted it to
Michal review. You can
Hi Tony,
On Thu, 2013-01-17 at 09:31 -0800, Tony Lindgren wrote:
* Peter Ujfalusi peter.ujfal...@ti.com [130117 02:44]:
On 01/17/2013 11:35 AM, Luciano Coelho wrote:
This out-of-tree code doesn't explain why we need to do the
enable/disable in the board file. We just need to do things a
On Mon, 14 Jan 2013, Aaro Koskinen wrote:
N900 boot is unstable again, I2C issues are back.
Boot succeeds and fails randomly. Let's see if this can be bisected.
The same kernel works on N950.
Thanks, I've added a section about this to the v3.8-rc3 test summary.
- Paul
--
To unsubscribe
On 12/31/2012 07:07 AM, Vaibhav Bedia wrote:
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer in the WKUP domain
so one of the timers needs suspend-resume support
to restore the configuration to pre-suspend state.
On 01/10/2013 10:37 PM, Bedia, Vaibhav wrote:
On Tue, Jan 08, 2013 at 20:45:10, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer in
Hi Jon
On Thu, 10 Jan 2013, Jon Hunter wrote:
During the migration to the common clock framework, calls to the
functions omap2xxx_clkt_vps_late_init() and
omap2xxx_clkt_vps_check_bootloader_rates() were not preserved for
OMAP2420 and OMAP2430. This causes the variables sys_ck_rate and
On 12/31/2012 07:07 AM, Vaibhav Bedia wrote:
AM33XX has two timers (DTIMER0/1) in the WKUP domain.
On GP devices the source of DMTIMER0 is fixed to an
inaccurate internal 32k RC oscillator and this makes
the DMTIMER0 practically either as a clocksource or
as clockevent.
Currently the
Hi Mark,
I regret the delay,
On Tue, 8 Jan 2013, Mark A. Greer wrote:
On Sun, Dec 23, 2012 at 08:40:43AM +, Paul Walmsley wrote:
- The patch series causes AM3517/3505 to crash. I'd guess this is due to
the SHAM/AES modules being initialized on those chips, but they probably
don't
Hi Mark
On Tue, 8 Jan 2013, Mark A. Greer wrote:
Sorry to nag but I think the comment needs to be updated to remove the
sentence about the missing EMAC hwmod.
You are absolutely right, and the correction is very much appreciated.
Updated patch follows.
- Paul
From: Paul Walmsley
Hi Paul,
On 01/17/2013 12:51 PM, Paul Walmsley wrote:
Hi Jon
On Thu, 10 Jan 2013, Jon Hunter wrote:
During the migration to the common clock framework, calls to the
functions omap2xxx_clkt_vps_late_init() and
omap2xxx_clkt_vps_check_bootloader_rates() were not preserved for
OMAP2420 and
On Thu, 17 Jan 2013 13:29:07 +0200 Roger Quadros rog...@ti.com wrote:
On 01/17/2013 01:01 PM, NeilBrown wrote:
On Wed, 16 Jan 2013 12:57:08 +0200 Roger Quadros rog...@ti.com wrote:
On 01/16/2013 12:27 PM, NeilBrown wrote:
On Wed, 16 Jan 2013 12:00:48 +0200 Roger Quadros rog...@ti.com
When booting with CONFIG_ARM_APPENDED_DTB (either because of using an old
U-Boot, not wanting the hassle of 2 files or when using Falcon fast boot
mode in U-Boot), nothing updates the ethernet hwaddr specified for the
CPSW slaves, causing the driver to use a random hwaddr, which is some times
Tony == Tony Lindgren t...@atomide.com writes:
Hi,
The way I've handled it is similar to how it is done on atleast one
other arm subarchicture, see
arch/arm/mach-mxs/mach-mxs.c::update_fec_mac_prop()
Tony Cool this seems like the cleanest way to deal with it so far. Can
Tony you please
Hi Jon,
On Thu, 17 Jan 2013, Jon Hunter wrote:
Yes I still see it. You don't see it on reboot?
Ah that's probably explains the discrepancy - I missed the part about the
reboot.
The reason why there is such a large number is because
omap2_round_to_table_rate() is returning the value
On Thu, Jan 17, 2013 at 07:13:36PM +, Paul Walmsley wrote:
Hi Mark,
Hi Paul.
I regret the delay,
On Tue, 8 Jan 2013, Mark A. Greer wrote:
On Sun, Dec 23, 2012 at 08:40:43AM +, Paul Walmsley wrote:
- The patch series causes AM3517/3505 to crash. I'd guess this is due to
On Thu, Jan 17, 2013 at 07:21:42PM +, Paul Walmsley wrote:
Hi Mark
On Tue, 8 Jan 2013, Mark A. Greer wrote:
Sorry to nag but I think the comment needs to be updated to remove the
sentence about the missing EMAC hwmod.
You are absolutely right, and the correction is very much
* Luciano Coelho coe...@ti.com [130117 10:04]:
Hi Tony,
On Thu, 2013-01-17 at 09:31 -0800, Tony Lindgren wrote:
* Peter Ujfalusi peter.ujfal...@ti.com [130117 02:44]:
On 01/17/2013 11:35 AM, Luciano Coelho wrote:
This out-of-tree code doesn't explain why we need to do the
Here's the updated version (at the bottom of this message). Seems to work
based on a quick test on 2430SDP.
# shutdown -r -n now
shutdown: sending all processes the TERM signal...
shutdown: sending all processes the KILL signal.
shutdown: turning off swap
shutdown: unmounting all file systems
On Thu, Jan 10, 2013 at 03:36:57AM -0600, Omar Ramirez Luna wrote:
Patches for staging-next, fixing comments and suggestions provided
by Chen Gang.
There is an additional scm patch, that removes hardcoded defines
related to direct register handling for SCM, it was dependent on
changes that
* Greg Kroah-Hartman gre...@linuxfoundation.org [130117 16:51]:
On Thu, Jan 10, 2013 at 03:36:57AM -0600, Omar Ramirez Luna wrote:
Patches for staging-next, fixing comments and suggestions provided
by Chen Gang.
There is an additional scm patch, that removes hardcoded defines
related
On Thu, Jan 17, 2013 at 17:36:15, Artem Bityutskiy wrote:
On Wed, 2013-01-16 at 12:22 +, Philip, Avinash wrote:
This series is based on linux 3.8-rc2 and tested with [1].
Also this patch series depend on [1] for NAND flash device
tree data and gpmc nand device tree binding
On Thu, Jan 17, 2013 at 21:22:18, Thierry Reding wrote:
On Thu, Jan 10, 2013 at 06:35:26PM +0530, Philip Avinash wrote:
From: Philip, Avinash avinashphi...@ti.com
The clock framework has changed and it's now better to invoke
clock_prepare_enable() and clk_disable_unprepare() rather than
On Thu, Jan 17, 2013 at 21:29:04, Thierry Reding wrote:
On Thu, Jan 17, 2013 at 02:50:02PM +0530, Philip Avinash wrote:
In low power modes of AM33XX platforms, peripherals power is cut off.
This patch supports low power sleep transition support for EHRPWM
driver.
Signed-off-by: Philip
On Thu, Jan 17, 2013 at 21:29:14, Thierry Reding wrote:
On Thu, Jan 17, 2013 at 02:50:03PM +0530, Philip Avinash wrote:
In low power modes of AM33XX platforms, peripherals power is cut off.
This patch supports low power sleep transition support for ECAP driver.
Signed-off-by: Philip
In case ELM module available, omap2 NAND driver can opt for hardware
correction method for bit flip errors in NAND flash with BCH. Hence the
detection of ELM module is done through devicetree population of elm_id.
This patch update device tree documentation for gpmc-nand for elm-id
data
On 1/18/2013 3:48 AM, Peter Korsgaard wrote:
When booting with CONFIG_ARM_APPENDED_DTB (either because of using an old
U-Boot, not wanting the hassle of 2 files or when using Falcon fast boot
mode in U-Boot), nothing updates the ethernet hwaddr specified for the
CPSW slaves, causing the driver
On Friday 18 January 2013 12:15 AM, Jon Hunter wrote:
On 01/10/2013 10:37 PM, Bedia, Vaibhav wrote:
On Tue, Jan 08, 2013 at 20:45:10, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
The current OMAP timer code registers two timers -
one as clocksource and
Hi,
On Thursday 17 January 2013 09:37 PM, Roger Quadros wrote:
On 01/16/2013 05:00 PM, Kishon Vijay Abraham I wrote:
In order to add support for multipe PHY's of the same type, the API's
for adding PHY and getting PHY has been changed. Now the binding
information of the PHY and controller
This patch series adds device tree support for NAND flash in am335x-evm.
Also ELM node is populated in device tree and been used for BCH error
correction in NAND flash part. Also this patch series ensures RBL ecc
layout maintained in Linux kernel with BCH8 ecc scheme.
This patch series based on
From: Philip, Avinash avinashphi...@ti.com
Add ELM data node to AM33XX device tree file.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi
From: Philip, Avinash avinashphi...@ti.com
Add GPMC data node to AM33XX device tree file.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi
NAND flash connected in am335x-evm on GPMC controller. This patch adds
device tree node in am335x-evm with GPMC controller timing for NAND flash
interface, NAND partition table, ECC scheme, elm handle id, pin-mux
setup.
Signed-off-by: Philip Avinash avinashphi...@ti.com
---
On Fri, Jan 18, 2013 at 04:18:27AM +, Philip, Avinash wrote:
On Thu, Jan 17, 2013 at 21:22:18, Thierry Reding wrote:
On Thu, Jan 10, 2013 at 06:35:26PM +0530, Philip Avinash wrote:
From: Philip, Avinash avinashphi...@ti.com
The clock framework has changed and it's now better to
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change from RFC version:
Clarify
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change from RFC version:
No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 47
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change from RFC version:
Get rid of extra lines
arch/arm/mach-omap2/cm33xx.h |2 ++
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
---
Change from RFC version:
No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |1 +
1 files changed, 1 insertions(+), 0
Since AM33XX supports only DT-boot, this is needed
for the appropriate device nodes to be created.
Note: OCMC RAM is part of the PER power domain and supports
retention. The assembly code for low power entry/exit will
run from OCMC RAM. To ensure that the OMAP PM code does not
attempt to disable
Some of the included header files are not needed so
remove them.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change from RFC version:
No change
arch/arm/mach-omap2/cm33xx.h |7 +--
1 files changed, 1 insertions(+), 6
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar santosh.shilim...@ti.com i have split
out the changes which update the various data files related
to AM33XX support.
These patches apply on top of
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change from RFC version:
No change
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change from
The current HWMOD code expects the memory region with
the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT
flag.
CPGMAC0 hwmod entry specifies two memory regions and marks
both with the flag ADDR_TYPE_RT although only the 2nd region
has the SYSCONFIG register. This leads to the HWMOD code
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