On 5/13/2014 9:20 PM, Felipe Balbi wrote:
Hi,
On Thu, May 08, 2014 at 03:03:07PM +0530, George Cherian wrote:
Enabling the core interrupts in complete is too late for XHCI, and stops
xhci from proper operation. So remove prepare and complete and disable/enable
isn't this a bug in xhci ? I
On 13/05/14 18:25, Tony Lindgren wrote:
Well ideally the revision info for a device would come from device
revision registers rather using the SoC revision. In the DSS case when
the SoC revision is needed by a device it maybe it can be deciphered
from a combination of compatible flag and the
On 13/05/14 18:26, Tony Lindgren wrote:
* Tomi Valkeinen tomi.valkei...@ti.com [140512 07:45]:
On 12/05/14 17:39, Tony Lindgren wrote:
* Tomi Valkeinen tomi.valkei...@ti.com [140512 04:36]:
On 09/05/14 17:37, Tony Lindgren wrote:
This is just the 3730-evm with the Sharp VGA panel mentioned
Hello Jhon,
On Wed, May 14, 2014 at 7:44 AM, John Syn john3...@gmail.com wrote:
On 5/13/14, 8:39 PM, Pantelis Antoniou pantelis.anton...@gmail.com
wrote:
Hi John,
On May 13, 2014, at 1:24 PM, John Syn wrote:
On 5/13/14, 10:51 AM, Javier Martinez Canillas jav...@dowhile0.org
wrote:
On 05/13/2014 08:18 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [140505 02:55]:
Add USB pinmux information and USB modes
for the USB controllers.
CC: Benoît Cousson bcous...@baylibre.com
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
From: Roger Quadros rog...@ti.com
Add USB pinmux information and USB modes
for the USB controllers.
CC: Benoît Cousson bcous...@baylibre.com
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 24
1 file
Hi Pekon,
On 05/09/2014 11:40 PM, Pekon Gupta wrote:
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16,
Hi Pekon,
On 05/12/2014 12:05 PM, Gupta, Pekon wrote:
From: Javier Martinez Canillas [mailto:jav...@dowhile0.org]
[...]
Newer platforms have upgraded version of GPMC engine which supports
BCH16 ECC scheme in hardware. Thus the GPMC address space was
expanded to include some extra registers
Hi Roger,
For now, I'll use GPMC address-space size = 0x380 as it matches with
actual hardware and is working.
How did you get 0x380?
From DRA7 TRM, GPMC address range is 0x5000 : 0x5000 02D0
So the address-space size should be 0x2D4 (as last register@2D0 is 32-bits
wide)
I think that
On 05/14/2014 11:25 AM, Roger Quadros wrote:
Hi Pekon,
On 05/12/2014 12:05 PM, Gupta, Pekon wrote:
From: Javier Martinez Canillas [mailto:jav...@dowhile0.org]
[...]
Newer platforms have upgraded version of GPMC engine which supports
BCH16 ECC scheme in hardware. Thus the GPMC address
On 04/26/2014 02:02 AM, Joel Fernandes wrote:
From: Lokesh Vutla lokeshvu...@ti.com
DES IP already has main and interface clk as des_fck.
Node for des_fck is missing in clk tree. Adding the same.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Joel Fernandes jo...@ti.com
---
From: Quadros, Roger
[...]
For now, I'll use GPMC address-space size = 0x380 as it matches with
actual hardware and is working.
How did you get 0x380?
From DRA7 TRM, GPMC address range is 0x5000 : 0x5000 02D0
So the address-space size should be 0x2D4 (as last register@2D0 is 32-bits
Hi Roger,
On 05/09/2014 11:40 PM, Pekon Gupta wrote:
[...]
+
+elm {
+ status = disabled;
+};
+
+gpmc {
+ status = disabled;
+};
Why are you disabling the elm and gpmc modules here?
Shouldn't they be disabled by default in the soc.dtsi file?
Yes both GPMC and ELM are 'disabled'
On 05/14/2014 12:09 PM, Gupta, Pekon wrote:
From: Quadros, Roger
[...]
For now, I'll use GPMC address-space size = 0x380 as it matches with
actual hardware and is working.
How did you get 0x380?
From DRA7 TRM, GPMC address range is 0x5000 : 0x5000 02D0
So the address-space size
On Wed, May 14, 2014 at 11:17 AM, Roger Quadros rog...@ti.com wrote:
On 05/14/2014 12:09 PM, Gupta, Pekon wrote:
From: Quadros, Roger
[...]
For now, I'll use GPMC address-space size = 0x380 as it matches with
actual hardware and is working.
How did you get 0x380?
From DRA7 TRM, GPMC
On 3 May 2014 03:07, Axel Lin axel@ingics.com wrote:
Also uses NSEC_PER_SEC and USEC_PER_SEC instead of hard-coded value.
This makes the intention more clear.
Signed-off-by: Axel Lin axel@ingics.com
Thanks Axel!
Will include this patch in the next PR to Chris.
Kind regards
Ulf
On 05/13/2014 12:13 AM, Joachim Eastwood wrote:
On 12 May 2014 11:12, Jyri Sarha jsa...@ti.com wrote:
...
hey, this worked straight away :)
But there seems to be something wrong with the channel mapping.
For stereo (speaker-test -c 2) the mapping is correct.
But for -c 4 and -c 8 it gets
On 11 May 2014 13:28, Andreas Fenkart afenk...@gmail.com wrote:
Hi Balaji, Tony, all
v12
- drop !CONFIG_OF compile break only exists when
#undef CONFIG_OF after include headers 1/7(Sebastian Reichel)
- do not emit falling back to polling if wake_irq not specified
since MMC does not need
From: Afzal Mohammed af...@ti.com
Currently oscillator frequency is determined based on sysboot settings,
it may not be the case always. To determine it properly, efuse settings
also has to be read. CONTROL_STATUS register holds this information.
Bit 31: if 0, frequency to be determined based on
Commit 5610b8ede (ARM: OMAP2+: AM33XX: omap2plus_defconfig:
Add support for few drivers) added support for different
drivers including GPIO based leds.
But LEDS_GPIO config option depends on LEDS_CLASS which was
not included so GPIO leds option is not selected. Adding as
built-in option since the
Commit c66d039197e4 broke NAND for non-DT boot on all OMAP2 and OMAP3
boards using board_nand_init(). Following error is seen at boot
[0.154998] (null): Unsupported NAND ECC scheme selected
For OMAP2 and OMAP3 platforms, the ecc_opt parameter in platform data
must be set to
On Wednesday 14 May 2014 11:14:45 Kishon Vijay Abraham I wrote:
hi Arnd,
On Tuesday 13 May 2014 07:04 PM, Arnd Bergmann wrote:
On Tuesday 13 May 2014 15:27:46 Arnd Bergmann wrote:
On Tuesday 13 May 2014 18:56:23 Kishon Vijay Abraham I wrote:
If you have a case where the outbound
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On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
PCIe PHY uses an external pll instead of the internal pll used by SATA
and USB3. So added support in pipe3 PHY to use external pll.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Reviewed-by: Roger Quadros rog...@ti.com
--
cheers,
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
Export an API to be called by PIPE3 PHY to enable external clock for
PCIE PHY. Added a new compatible for PCIE in omap-control in order to
enable it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Reviewed-by: Roger Quadros
Hi Kishon,
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
APLL used by PCIE phy can either use external clock as input or the clock
from DPLL. Added support for the APLL to use external clock as input here.
Cc: Rajendra Nayak rna...@ti.com
Cc: Tero Kristo t-kri...@ti.com
Cc: Paul
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
8-bit delay value (0xF1) is required for GEN2 devices to be enumerated
consistently. Added an API to be called from PHY drivers to set this delay
value and called it from PIPE3 driver to set the delay value.
Signed-off-by: Kishon Vijay
Hi Kishon,
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
Added missing 32khz clock used by PCIe PHY.
The documention for this node can be found @ ../bindings/clock/ti/gate.txt.
Typo in $subject
s/clocks/clock
--
cheers,
-roger
Cc: Tony Lindgren t...@atomide.com
Cc: Rajendra
George,
On Wed, May 14, 2014 at 12:37 AM, George Cherian george.cher...@ti.com wrote:
On 5/14/2014 12:07 AM, Bin Liu wrote:
Hi,
On Tue, May 13, 2014 at 8:24 AM, George Cherian george.cher...@ti.com
wrote:
Hi Daniel,
On 5/13/2014 6:44 PM, Daniel Mack wrote:
Hi George,
On 05/13/2014
Hi Arnd,
On Wednesday 14 May 2014 06:15 PM, Arnd Bergmann wrote:
On Wednesday 14 May 2014 11:14:45 Kishon Vijay Abraham I wrote:
hi Arnd,
On Tuesday 13 May 2014 07:04 PM, Arnd Bergmann wrote:
On Tuesday 13 May 2014 15:27:46 Arnd Bergmann wrote:
On Tuesday 13 May 2014 18:56:23 Kishon Vijay
* Javier Martinez Canillas jav...@dowhile0.org [140514 04:46]:
Commit 5610b8ede (ARM: OMAP2+: AM33XX: omap2plus_defconfig:
Add support for few drivers) added support for different
drivers including GPIO based leds.
But LEDS_GPIO config option depends on LEDS_CLASS which was
not included so
Hi Roger,
On Wednesday 14 May 2014 06:46 PM, Roger Quadros wrote:
Hi Kishon,
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
APLL used by PCIE phy can either use external clock as input or the clock
from DPLL. Added support for the APLL to use external clock as input here.
Cc:
On Wednesday 14 May 2014 06:53 PM, Roger Quadros wrote:
Hi Kishon,
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
Added missing 32khz clock used by PCIe PHY.
The documention for this node can be found @ ../bindings/clock/ti/gate.txt.
Typo in $subject
s/clocks/clock
Will fix
* Santosh Shilimkar santosh.shilim...@ti.com [140513 07:40]:
On OMAP4 panda board, there have been several bug reports about boot
hang and lock-ups with CPU_IDLE enabled. The root cause of the issue
is missing interrupts while in idle state. Commit cb7094e8 {cpuidle / omap4 :
use
* Roger Quadros rog...@ti.com [140514 05:36]:
Commit c66d039197e4 broke NAND for non-DT boot on all OMAP2 and OMAP3
boards using board_nand_init(). Following error is seen at boot
[0.154998] (null): Unsupported NAND ECC scheme selected
For OMAP2 and OMAP3 platforms, the ecc_opt
On Wed, May 14, 2014 at 10:19 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi Roger,
On Wednesday 14 May 2014 06:46 PM, Roger Quadros wrote:
Hi Kishon,
On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote:
APLL used by PCIE phy can either use external clock as input or the clock
from
* Tomi Valkeinen tomi.valkei...@ti.com [140513 23:20]:
On 13/05/14 18:25, Tony Lindgren wrote:
Well ideally the revision info for a device would come from device
revision registers rather using the SoC revision. In the DSS case when
the SoC revision is needed by a device it maybe it can
On 14 May 2014 12:02, Jyri Sarha jsa...@ti.com wrote:
On 05/13/2014 12:13 AM, Joachim Eastwood wrote:
On 12 May 2014 11:12, Jyri Sarha jsa...@ti.com wrote:
...
hey, this worked straight away :)
But there seems to be something wrong with the channel mapping.
For stereo (speaker-test -c
Hello Tony,
On Wed, May 14, 2014 at 5:10 PM, Tony Lindgren t...@atomide.com wrote:
* Javier Martinez Canillas jav...@dowhile0.org [140514 04:46]:
Commit 5610b8ede (ARM: OMAP2+: AM33XX: omap2plus_defconfig:
Add support for few drivers) added support for different
drivers including GPIO based
On 20/03/14 19:30, Felipe Balbi wrote:
LDISCs shouldn't call tty-ops-write() from within
-write_wakeup().
-write_wakeup() is called with port lock taken and
IRQs disabled, tty-ops-write() will try to acquire
the same port lock and we will deadlock.
I think the work queue should be placed into
George,
On Wed, May 14, 2014 at 9:34 AM, Bin Liu binml...@gmail.com wrote:
George,
On Wed, May 14, 2014 at 12:37 AM, George Cherian george.cher...@ti.com
wrote:
On 5/14/2014 12:07 AM, Bin Liu wrote:
Hi,
On Tue, May 13, 2014 at 8:24 AM, George Cherian george.cher...@ti.com
wrote:
Hi
Here are some basic OMAP test results for Linux v3.15-rc5.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.15-rc5/20140511121007/
Test summary
Build: uImage+dtb:
Pass ( 9/ 9): omap2plus_defconfig_am33xx_only/am335x-bone,
On Fri, 9 May 2014, Peter Ujfalusi wrote:
McPDM need to be configured to NO_IDLE mode when it is in used otherwise
vital clocks will be gated which results 'slow motion' audio playback.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Thanks, queued for v3.15-rc.
- Paul
--
To
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tony,
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
On Fri, 9 May 2014, Tomi Valkeinen wrote:
On 08/05/14 19:01, Paul Walmsley wrote:
Hi Archit,
On Thu, 8 May 2014, Archit Taneja wrote:
Hi Paul,
On Thursday 08 May 2014 10:07 AM, Paul Walmsley wrote:
Hi,
On Wed, 12 Mar 2014, Tomi Valkeinen wrote:
This patch adds hwmod
On 05/13/2014 04:39 PM, Santosh Shilimkar wrote:
On OMAP4 panda board, there have been several bug reports about boot
hang and lock-ups with CPU_IDLE enabled. The root cause of the issue
is missing interrupts while in idle state. Commit cb7094e8 {cpuidle / omap4 :
use CPUIDLE_FLAG_TIMER_STOP
On Wednesday 14 May 2014 03:44 PM, Daniel Lezcano wrote:
On 05/13/2014 04:39 PM, Santosh Shilimkar wrote:
On OMAP4 panda board, there have been several bug reports about boot
hang and lock-ups with CPU_IDLE enabled. The root cause of the issue
is missing interrupts while in idle state. Commit
* Paul Walmsley p...@pwsan.com [140514 11:52]:
Hi Tony,
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
On 05/14/2014 09:50 PM, Santosh Shilimkar wrote:
On Wednesday 14 May 2014 03:44 PM, Daniel Lezcano wrote:
On 05/13/2014 04:39 PM, Santosh Shilimkar wrote:
On OMAP4 panda board, there have been several bug reports about boot
hang and lock-ups with CPU_IDLE enabled. The root cause of the issue
* Daniel Lezcano daniel.lezc...@linaro.org [140514 13:02]:
On 05/14/2014 09:50 PM, Santosh Shilimkar wrote:
On Wednesday 14 May 2014 03:44 PM, Daniel Lezcano wrote:
On 05/13/2014 04:39 PM, Santosh Shilimkar wrote:
On OMAP4 panda board, there have been several bug reports about boot
hang and
* Roger Quadros rog...@ti.com [140423 10:36]:
From: Balaji T K balaj...@ti.com
Add support for sata.
Adding this into omap-for-v3.16/dt thanks.
Tony
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* Roger Quadros rog...@ti.com [140507 01:15]:
Tony,
On 04/23/2014 08:36 PM, Roger Quadros wrote:
From: Balaji T K balaj...@ti.com
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.
+ sata: sata@4a141100 {
+ compatible = snps,dwc-ahci;
+
On Wednesday 14 May 2014 04:02 PM, Daniel Lezcano wrote:
On 05/14/2014 09:50 PM, Santosh Shilimkar wrote:
On Wednesday 14 May 2014 03:44 PM, Daniel Lezcano wrote:
On 05/13/2014 04:39 PM, Santosh Shilimkar wrote:
On OMAP4 panda board, there have been several bug reports about boot
hang and
* Roger Quadros rog...@ti.com [140507 04:59]:
From: Balaji T K balaj...@ti.com
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.
[Roger Q] Clean up. Updated IRQ for interrupt crossbar.
Adding this too into omap-for-v3.16/dt.
Regards,
Tony
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* Roger Quadros rog...@ti.com [140506 01:44]:
Hi Tony,
On 04/23/2014 08:30 PM, Roger Quadros wrote:
Hi Tony,
These are the pending HWMOD and DTS patches to get SATA working
on OMAP5-uevm and DRA7-evm. Please queue them for -next. Thanks.
gentle reminder. Thanks.
I picked up the
* Roger Quadros rog...@ti.com [140514 00:59]:
From: Roger Quadros rog...@ti.com
Add USB pinmux information and USB modes
for the USB controllers.
Thanks, applying all the .dts changes in this series
into omap-for-v3.16/dt. Using the non-irqbar versions.
Tony
--
To unsubscribe from this
* Sourav Poddar sourav.pod...@ti.com [140507 23:01]:
For SOCs with dt enabled, device should be build through device tree.
Prevent device build call from platform code, if device tree is
enabled.
Picking this patch into omap-for-v3.16/dt thanks.
Tony
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* Sourav Poddar sourav.pod...@ti.com [140507 23:01]:
Add device tree nodes and pinmux for hdq/1wire on
am43x epos evm.
Picking this too. The hwmod changes should go through Paul,
and the driver changes through the driver list.
Regards,
Tony
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* Johan Hovold jhov...@gmail.com [140508 01:59]:
Make sure ethernet and mdio nodes are disabled by default and enable
them explicitly only on boards that actually use them.
Thanks applying into omap-for-v3.16/dt.
Tony
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* George Cherian george.cher...@ti.com [140508 23:34]:
Re arrange the USB dt for AM33xx to take it a bit closer
to the hardware configuration.
The USBSS is designed as follows
USB control Module0x44e10_0620
USBSS 0x4740_
USB0 0x4740_1000
* Sebastian Reichel s...@kernel.org [140510 09:40]:
Add modem device tree data to Nokia N900's DTS file.
Picking this patch too.
Tony
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* Sebastian Reichel s...@kernel.org [140510 09:40]:
Add SSI device tree data for OMAP3 and Nokia N900.
Picking this patch into omap-for-v3.16/dt thanks.
Tony
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More
* Joachim Eastwood manab...@gmail.com [140512 11:17]:
The OMAP4/5 TRMs primarily list address offsets from the padconf
physical address (which is not driver base address) and not
always the absolute physical address for padconf registers like
some other OMAP TRMs. So create a new macro to use
Follow up to this:
I found the patch from 9/oct/2009 ([PATCH 1/1] OMAP: DSS2: RFBI
driver update) suggesting that perhaps the interface clocks in the
RFBI module are not disabled correctly by the autoidle mechanism. When
I mask off bits 3 and 4 in the RFBI SYSCONFIG register during susepnd
the
* Joachim Eastwood manab...@gmail.com [140512 11:33]:
Hello,
This patch set adds support for Variscite OM44 series of system on
modules and boards.
Thanks applying into omap-for-v3.16/dt.
Tony
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* Mugunthan V N mugunthan...@ti.com [140513 01:54]:
Tony/Benoit
On Tuesday 13 May 2014 01:34 PM, Mugunthan V N wrote:
Adding device tree entry for CPSW to make it work in Dual EMAC mode.
DRA7 cpsw phy sel driver patch has been pulled in net-next git with the
following commit id
* Mugunthan V N mugunthan...@ti.com [140513 01:45]:
Add AM437x GP EVM cpsw device tree node
Mugunthan V N (2):
ARM: dts: am4372: Add cpsw phy sel dt node
ARM: dts: am437x-gp-evm: Add ethernet support for GP EVM
Thanks applying both into omap-for-v3.16/dt.
Tony
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* Peter Ujfalusi peter.ujfal...@ti.com [140513 03:31]:
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
This too:
Acked-by: Tony Lindgren t...@atomide.com
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* Peter Ujfalusi peter.ujfal...@ti.com [140513 03:31]:
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Sounds like this must go with the edma patches or else
applied later on. Probably best to merge
* Tony Lindgren t...@atomide.com [140514 13:57]:
* Daniel Lezcano daniel.lezc...@linaro.org [140514 13:02]:
So the broadcast timer does not operate with this revert. Moreover, I am not
sure reverting this patch is the right solution.
OK I'll hold on sending anything until there's some
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