On Mon, 22 Dec 2014 16:35:40 +0100 Ulf Hansson ulf.hans...@linaro.org wrote:
On 20 December 2014 at 00:07, NeilBrown ne...@suse.de wrote:
One of the reasons omap_hsmmc doesn't use the slot-gpio library
is that it has some non-standard functionality in the card-detect
interrupt service
On Tuesday 16 December 2014 02:52 PM, Vignesh R wrote:
Since phyid is no longer used by pcie driver, this field can be dropped
from the DT.
Signed-off-by: Vignesh R vigne...@ti.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 2 --
1 file changed, 2
From: Tomasz Figa t.f...@samsung.com
Because certain secure hypervisor do not allow writes to individual L2C
registers, but rather expect set of parameters to be passed as argument
to secure monitor calls, there is a need to provide an interface for the
L2C driver to ask the firmware to configure
From: Tomasz Figa t.f...@samsung.com
Exynos4 SoCs equipped with an L2C-310 cache controller and running under
secure firmware require certain registers of aforementioned IP to be
accessed only from secure mode. This means that SMC calls are required
for certain register writes. To handle this, an
This is an updated patchset, which intends to add support for L2 cache
on Exynos4 SoCs on boards running under secure firmware, which requires
certain initialization steps to be done with help of firmware, as
selected registers are writable only from secure mode.
First patch updates Omap2+
From: Tomasz Figa t.f...@samsung.com
Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
settings configured in registers leading to crashes if L2C is enabled
without overriding them. This patch introduces bindings to enable
prefetch settings to be specified from DT and
From: Tomasz Figa t.f...@samsung.com
On Exynos SoCs it is necessary to resume operation of L2C early in
assembly code, because otherwise certain systems will crash. This patch
adds necessary code to non-secure resume handler.
Signed-off-by: Tomasz Figa t.f...@samsung.com
[rewrote the code
From: Tomasz Figa t.f...@samsung.com
This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: Kukjin Kim
From: Tomasz Figa t.f...@samsung.com
Certain platforms (i.e. Exynos) might need to set .write_sec callback
from firmware initialization which is happenning in .init_early callback
of machine descriptor. However current code will overwrite the pointer
with whatever is present in machine
From: Tomasz Figa t.f...@samsung.com
Certain implementations of secure hypervisors (namely the one found on
Samsung Exynos-based boards) do not provide access to individual L2C
registers. This makes the .write_sec()-based interface insufficient and
provoking ugly hacks.
This patch is first step
This patch implements generic DT L2C initialisation (the one from
init_IRQ in arch/arm/kernel/irq.c) for Omap4 and AM43 platforms and
kills the SoC specific stuff in arch/arm/mach-omap2/omap4-common.c.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
Hello,
On 2014-12-22 18:28, Russell King - ARM Linux wrote:
On Mon, Dec 22, 2014 at 11:12:42AM -0600, Nishanth Menon wrote:
On Mon, Dec 22, 2014 at 11:04 AM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
That only leaves the non-DT stuff to worry about this, and from what I
On Tue, Dec 23, 2014 at 12:00:00PM +0100, Marek Szyprowski wrote:
I hope I did it right: https://lkml.org/lkml/2014/12/23/158
Please test, because I have no access to Omap hardware.
Patch 1/8 looks like I'd expect it to. Nishanth, please test with your
failing scenario, thanks.
--
FTTC
On 23 December 2014 at 09:48, NeilBrown ne...@suse.de wrote:
On Mon, 22 Dec 2014 16:35:40 +0100 Ulf Hansson ulf.hans...@linaro.org wrote:
On 20 December 2014 at 00:07, NeilBrown ne...@suse.de wrote:
One of the reasons omap_hsmmc doesn't use the slot-gpio library
is that it has some
Hi!
+ /* We should always send word aligned data to h4+ devices */
+ if (skb-len % 2) {
+ err = skb_pad(skb, 1);
+ if (!err)
+ *skb_put(skb, 1) = 0x00;
+ }
+ if (err)
+ return err;
This is crazy code.
if (skb-len
Hi!
Add hci_h4p bluetooth driver. This device is used for example on Nokia N900
cell phone.
the driver is called nokia_h4p. And you could be a little bit more verbose
here explaining where the driver came from.
Signed-off-by: Pavel Machek pa...@ucw.cz
Thanks-to: Sebastian Reichel
Add HCI driver for H4 with Nokia extensions. This device is used on
Nokia N900 cell phone.
Older version of this driver lived in staging, before being reverted
in a4102f90e87cfaa3fdbed6fdf469b23f0eeb4bfd .
Signed-off-by: Pavel Machek pa...@ucw.cz
Thanks-to: Sebastian Reichel s...@debian.org
On 12/23/2014 05:10 AM, Russell King - ARM Linux wrote:
On Tue, Dec 23, 2014 at 12:00:00PM +0100, Marek Szyprowski wrote:
I hope I did it right: https://lkml.org/lkml/2014/12/23/158
Please test, because I have no access to Omap hardware.
Patch 1/8 looks like I'd expect it to. Nishanth,
On Tue, Dec 23, 2014 at 09:30:45AM +0200, Igor Grinberg wrote:
Hi Felipe,
On 12/22/14 20:05, Felipe Balbi wrote:
[...]
CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_MD=y
+CONFIG_ATA=m
+CONFIG_SATA_AHCI_PLATFORM=m
Isn't this needed for the
* Felipe Balbi ba...@ti.com [141223 08:22]:
On Tue, Dec 23, 2014 at 09:30:45AM +0200, Igor Grinberg wrote:
On 12/22/14 20:05, Felipe Balbi wrote:
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_TWL4030=y
-CONFIG_W1=y
+CONFIG_GPIO_TWL4030=m
w/o this devices wired to
On Tue, Dec 23, 2014 at 08:56:35AM -0800, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [141223 08:22]:
On Tue, Dec 23, 2014 at 09:30:45AM +0200, Igor Grinberg wrote:
On 12/22/14 20:05, Felipe Balbi wrote:
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_TWL4030=y
* Marek Szyprowski m.szyprow...@samsung.com [141223 02:51]:
From: Tomasz Figa t.f...@samsung.com
Certain implementations of secure hypervisors (namely the one found on
Samsung Exynos-based boards) do not provide access to individual L2C
registers. This makes the .write_sec()-based interface
On 12/23/2014 11:06 AM, Tony Lindgren wrote:
* Marek Szyprowski m.szyprow...@samsung.com [141223 02:51]:
From: Tomasz Figa t.f...@samsung.com
Certain implementations of secure hypervisors (namely the one found on
Samsung Exynos-based boards) do not provide access to individual L2C
registers.
Em Wed, 3 Dec 2014 22:46:41 +0100
Pavel Machek pa...@ucw.cz escreveu:
We are moving to device tree support on OMAP3, but that currently
breaks ADP1653 driver. This adds device tree support, plus required
documentation.
Signed-off-by: Pavel Machek pa...@ucw.cz
Please be sure to check your
Hi,
(no top-posting)
On Fri, Dec 19, 2014 at 12:16:04PM +0100, Eduard Gavin wrote:
Hi Everybody,
After several test with IGEPv2 board (OMAP3) and linux kernel 3.17 and
3.18, the OTG works but, (from my point of view) with an weird
behaviour.
The OTG like a Host only is activated after
On Tue 2014-12-23 15:23:25, Mauro Carvalho Chehab wrote:
Em Wed, 3 Dec 2014 22:46:41 +0100
Pavel Machek pa...@ucw.cz escreveu:
We are moving to device tree support on OMAP3, but that currently
breaks ADP1653 driver. This adds device tree support, plus required
documentation.
This series is rebase of v4 onto v3.19-rc1. It also fixes concerns
expressed on v4 wrt simultaneous use of IIO and TSC.
I have tested this patch series on am335x-evm and Beaglebone black
with lcd7-cape.
Note that, these patches do not work as expected on Beaglebone Black
with BB-View 4.3 Cape
Previously, delta filtering was applied TSC co-ordinate readouts before
reporting a single value to user space. This patch replaces delta filtering
with median filtering. Median filtering sorts co-ordinate readouts, drops min
and max values, and reports the average of remaining values. This method
The charge delay value is by default 0x400. But it can be set to lower
values on some boards, as long as false pen-ups are avoided. Lowering the
value increases the sampling rate (though current sampling rate is
sufficient for TSC operation). In some boards, the value has to be
increased to avoid
From: Brad Griffis bgrif...@ti.com
This patch makes the initial changes required to workaround TSC-false
pen-up interrupts. It is required to implement these changes in order to
remove udelay in the TSC interrupt handler and false pen-up events.
The charge step is to be executed immediately after
From: Brad Griffis bgrif...@ti.com
TSC interrupt handler had udelay to avoid reporting of false pen-up
interrupt to user space. This patch implements workaround suggesting in
Advisory 1.0.31 of silicon errata for am335x, thus eliminating udelay
and touchscreen lag. This also improves performance
In one shot mode, sequencer automatically disables all enabled steps at
the end of each cycle. (both ADC steps and TSC steps) Hence these steps
need not be saved in reg_se_cache for clearing these steps at a later
stage.
Also, when ADC wakes up Sequencer should not be busy executing any of the
This patch reads charge delay from tsc DT node and writes to
REG_CHARGEDELAY register. If the charge delay is not specified in DT
then default value of 0x400(CHARGEDLY_OPENDLY) is used.
Signed-off-by: Vignesh R vigne...@ti.com
---
v5:
- print out a warning when ti,charge-delay is not specified
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