Re: EDMA oftree entry for AM335x
On 06/10/2015 08:10 AM, Tony Lindgren wrote: * Robert Schwebel r.schwe...@pengutronix.de [150608 04:01]: On Wed, May 06, 2015 at 07:39:52AM -0700, Tony Lindgren wrote: That may never happen considering that davinci is using it too.. It's best to not count on that happening anytime soon at least. So my current understanding is that we have the situation that the kernel warns about the oftree being wrong, but isn't able to handle an oftree that would be right. Shouldn't the warning being added when the kernel driver supports that new mechanism? This particular driver is broken and it needs to be fixed properly. I had a warning free mainline kernel without patches on my customer hardware before, so this smells a bit like a regression ... :-/ Yes sorry I'm not patching away the warning as it does not fix the driver. Peter, I assume you are busy fixing it? Well, I was not. But I'm now ;) -- Péter -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/5] usb: dwc3: ep0: preparation for handling non maxpacket aligned transfers 512
No functional change. This is in preparation for handling non maxpacket
aligned transfers greater than bounce buffer size. This is basically to
avoid code duplication when using chained TRB transfers to handle
non maxpacket aligned transfers greater than bounce buffer size.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/ep0.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 713e46a..4998074 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -779,7 +779,11 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
struct usb_request *ur;
struct dwc3_trb *trb;
struct dwc3_ep *ep0;
- u32 transferred;
+ unsignedtransfer_size = 0;
+ unsignedmaxp;
+ unsignedremaining_ur_length;
+ void*buf;
+ u32 transferred = 0;
u32 status;
u32 length;
u8 epnum;
@@ -808,20 +812,24 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
}
ur = r-request;
+ buf = ur-buf;
+ remaining_ur_length = ur-length;
length = trb-size DWC3_TRB_SIZE_MASK;
+ maxp = ep0-endpoint.maxpacket;
+
if (dwc-ep0_bounced) {
- unsigned maxp = ep0-endpoint.maxpacket;
- unsigned transfer_size = roundup(ur-length, maxp);
+ transfer_size = roundup((ur-length - transfer_size),
+ maxp);
/* Maximum of DWC3_EP0_BOUNCE_SIZE can only be received */
if (transfer_size DWC3_EP0_BOUNCE_SIZE)
transfer_size = DWC3_EP0_BOUNCE_SIZE;
- transferred = min_t(u32, ur-length,
- transfer_size - length);
- memcpy(ur-buf, dwc-ep0_bounce, transferred);
+ transferred = min_t(u32, remaining_ur_length,
+ transfer_size - length);
+ memcpy(buf, dwc-ep0_bounce, transferred);
} else {
transferred = ur-length - length;
}
@@ -930,7 +938,7 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
DWC3_TRBCTL_CONTROL_DATA);
} else if (!IS_ALIGNED(req-request.length, dep-endpoint.maxpacket)
(dep-number == 0)) {
- u32 transfer_size;
+ u32 transfer_size = 0;
u32 maxpacket;
ret = usb_gadget_map_request(dwc-gadget, req-request,
@@ -941,7 +949,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
}
maxpacket = dep-endpoint.maxpacket;
- transfer_size = roundup(req-request.length, maxpacket);
+ transfer_size = roundup((req-request.length - transfer_size),
+ maxpacket);
if (transfer_size DWC3_EP0_BOUNCE_SIZE) {
dev_WARN(dwc-dev, bounce buf can't handle req len\n);
--
1.7.9.5
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[PATCH 5/5] usb: dwc3: ep0: handle non maxpacket aligned transfers 512
Use chained TRB mechanism to handle non maxpacket aligned transfers
greater than bounce buffer size. With this the first TRB will be programmed
to receive 'ALIGN(ur-length - maxp, maxp)' data and the second TRB
will be programmed to receive the remaining data using bounce buffer.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/ep0.c | 42 --
1 file changed, 28 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 6847afe..4c777fe 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -830,13 +830,26 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
maxp = ep0-endpoint.maxpacket;
if (dwc-ep0_bounced) {
+ /*
+* Handle the first TRB before handling the bounce buffer if
+* the request length is greater than the bounce buffer size
+*/
+ if (ur-length DWC3_EP0_BOUNCE_SIZE) {
+ transfer_size = ALIGN(ur-length - maxp, maxp);
+ transferred = transfer_size - length;
+ buf = (u8 *)buf + transferred;
+ ur-actual += transferred;
+ remaining_ur_length -= transferred;
+
+ trb++;
+ length = trb-size DWC3_TRB_SIZE_MASK;
+
+ ep0-free_slot = 0;
+ }
+
transfer_size = roundup((ur-length - transfer_size),
maxp);
- /* Maximum of DWC3_EP0_BOUNCE_SIZE can only be received */
- if (transfer_size DWC3_EP0_BOUNCE_SIZE)
- transfer_size = DWC3_EP0_BOUNCE_SIZE;
-
transferred = min_t(u32, remaining_ur_length,
transfer_size - length);
memcpy(buf, dwc-ep0_bounce, transferred);
@@ -959,21 +972,22 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
}
maxpacket = dep-endpoint.maxpacket;
- transfer_size = roundup((req-request.length - transfer_size),
- maxpacket);
- if (transfer_size DWC3_EP0_BOUNCE_SIZE) {
- dev_WARN(dwc-dev, bounce buf can't handle req len\n);
- transfer_size = DWC3_EP0_BOUNCE_SIZE;
+ if (req-request.length DWC3_EP0_BOUNCE_SIZE) {
+ transfer_size = ALIGN(req-request.length - maxpacket,
+ maxpacket);
+ ret = dwc3_ep0_start_trans(dwc, dep-number,
+ req-request.dma,
+ transfer_size,
+ DWC3_TRBCTL_CONTROL_DATA,
+ true);
}
+ transfer_size = roundup((req-request.length - transfer_size),
+ maxpacket);
+
dwc-ep0_bounced = true;
- /*
-* REVISIT in case request length is bigger than
-* DWC3_EP0_BOUNCE_SIZE we will need two chained
-* TRBs to handle the transfer.
-*/
ret = dwc3_ep0_start_trans(dwc, dep-number,
dwc-ep0_bounce_addr, transfer_size,
DWC3_TRBCTL_CONTROL_DATA, false);
--
1.7.9.5
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[PATCH 3/5] usb: dwc3; ep0: Modify _dwc3_ep0_start_trans_ API to take 'chain' parameter
No functional change. Added a new parameter in _dwc3_ep0_start_trans_ to
indicate whether the TRB is a chained TRB or last TRB. This is in
preparation for adding chained TRB support for ep0.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/ep0.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 4998074..d1a2be1 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -56,7 +56,7 @@ static const char *dwc3_ep0_state_string(enum dwc3_ep0_state
state)
}
static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
- u32 len, u32 type)
+ u32 len, u32 type, unsigned chain)
{
struct dwc3_gadget_ep_cmd_params params;
struct dwc3_trb *trb;
@@ -302,7 +302,7 @@ void dwc3_ep0_out_start(struct dwc3 *dwc)
int ret;
ret = dwc3_ep0_start_trans(dwc, 0, dwc-ctrl_req_addr, 8,
- DWC3_TRBCTL_CONTROL_SETUP);
+ DWC3_TRBCTL_CONTROL_SETUP, false);
WARN_ON(ret 0);
}
@@ -851,7 +851,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
ret = dwc3_ep0_start_trans(dwc, epnum,
dwc-ctrl_req_addr, 0,
- DWC3_TRBCTL_CONTROL_DATA);
+ DWC3_TRBCTL_CONTROL_DATA, false);
WARN_ON(ret 0);
}
}
@@ -935,7 +935,7 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
if (req-request.length == 0) {
ret = dwc3_ep0_start_trans(dwc, dep-number,
dwc-ctrl_req_addr, 0,
- DWC3_TRBCTL_CONTROL_DATA);
+ DWC3_TRBCTL_CONTROL_DATA, false);
} else if (!IS_ALIGNED(req-request.length, dep-endpoint.maxpacket)
(dep-number == 0)) {
u32 transfer_size = 0;
@@ -966,7 +966,7 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
*/
ret = dwc3_ep0_start_trans(dwc, dep-number,
dwc-ep0_bounce_addr, transfer_size,
- DWC3_TRBCTL_CONTROL_DATA);
+ DWC3_TRBCTL_CONTROL_DATA, false);
} else {
ret = usb_gadget_map_request(dwc-gadget, req-request,
dep-number);
@@ -976,7 +976,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
}
ret = dwc3_ep0_start_trans(dwc, dep-number, req-request.dma,
- req-request.length, DWC3_TRBCTL_CONTROL_DATA);
+ req-request.length, DWC3_TRBCTL_CONTROL_DATA,
+ false);
}
WARN_ON(ret 0);
@@ -991,7 +992,7 @@ static int dwc3_ep0_start_control_status(struct dwc3_ep
*dep)
: DWC3_TRBCTL_CONTROL_STATUS2;
return dwc3_ep0_start_trans(dwc, dep-number,
- dwc-ctrl_req_addr, 0, type);
+ dwc-ctrl_req_addr, 0, type, false);
}
static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
--
1.7.9.5
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[PATCH 1/5] usb: dwc3: ep0: use _roundup_ to calculate the transfer size
No functional change. Used _roundup_ macro to calculate the transfer
size aligned to maxpacket in dwc3_ep0_complete_data. It also makes it
similar to how transfer size is calculated in __dwc3_ep0_do_control_data.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/ep0.c |4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 8858c60..713e46a 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -812,10 +812,8 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
length = trb-size DWC3_TRB_SIZE_MASK;
if (dwc-ep0_bounced) {
- unsigned transfer_size = ur-length;
unsigned maxp = ep0-endpoint.maxpacket;
-
- transfer_size += (maxp - (transfer_size % maxp));
+ unsigned transfer_size = roundup(ur-length, maxp);
/* Maximum of DWC3_EP0_BOUNCE_SIZE can only be received */
if (transfer_size DWC3_EP0_BOUNCE_SIZE)
--
1.7.9.5
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Re: [PATCH 09/15] mfd: kill off set_irq_flags usage
On Tue, Jun 9, 2015 at 8:26 PM, Rob Herring r...@kernel.org wrote: set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID - !IRQ_NOREQUEST IRQF_PROBE - !IRQ_NOPROBE IRQF_NOAUTOEN - IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also set IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by: Rob Herring r...@kernel.org Cc: Samuel Ortiz sa...@linux.intel.com Cc: Lee Jones lee.jo...@linaro.org Cc: Linus Walleij linus.wall...@linaro.org Cc: Milo Kim milo@ti.com Cc: Kumar Gala ga...@codeaurora.org Cc: Andy Gross agr...@codeaurora.org Cc: David Brown dav...@codeaurora.org Cc: Tony Lindgren t...@atomide.com Cc: linux-arm-ker...@lists.infradead.org Cc: patc...@opensource.wolfsonmicro.com Cc: linux-arm-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-omap@vger.kernel.org Acked-by: Linus Walleij linus.wall...@linaro.org Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: DRA7: hwmod: fix gpmc hwmod
Paul, On Tue, 2 Jun 2015 21:34:58 + Paul Walmsley p...@pwsan.com wrote: On Tue, 2 Jun 2015, Roger Quadros wrote: GPMC smart idle is not really broken but it does not support smart idle with wakeup. Fixes: 556708fe8718 (ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is broken) Signed-off-by: Roger Quadros rog...@ti.com Thanks, queued for v4.2-rc fixes. you might want to take v2 of the patch [1] or did you fix the conflict yourself? cheers, -roger [1] http://article.gmane.org/gmane.linux.ports.arm.omap/126730 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/5] usb: dwc3: ep0: Add chained TRB support
Add chained TRB support to ep0. Now TRB's can be chained just by
invoking _dwc3_ep0_start_trans_ with 'chain' parameter set to true.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/ep0.c| 16 +---
drivers/usb/dwc3/gadget.c |2 +-
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index d1a2be1..6847afe 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -70,7 +70,10 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum,
dma_addr_t buf_dma,
return 0;
}
- trb = dwc-ep0_trb;
+ trb = dwc-ep0_trb[dep-free_slot];
+
+ if (chain)
+ dep-free_slot++;
trb-bpl = lower_32_bits(buf_dma);
trb-bph = upper_32_bits(buf_dma);
@@ -78,10 +81,17 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum,
dma_addr_t buf_dma,
trb-ctrl = type;
trb-ctrl |= (DWC3_TRB_CTRL_HWO
- | DWC3_TRB_CTRL_LST
- | DWC3_TRB_CTRL_IOC
| DWC3_TRB_CTRL_ISP_IMI);
+ if (chain)
+ trb-ctrl |= DWC3_TRB_CTRL_CHN;
+ else
+ trb-ctrl |= (DWC3_TRB_CTRL_IOC
+ | DWC3_TRB_CTRL_LST);
+
+ if (chain)
+ return 0;
+
memset(params, 0, sizeof(params));
params.param0 = upper_32_bits(dwc-ep0_trb_addr);
params.param1 = lower_32_bits(dwc-ep0_trb_addr);
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 8946c32..b8d0a84 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2677,7 +2677,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
goto err0;
}
- dwc-ep0_trb = dma_alloc_coherent(dwc-dev, sizeof(*dwc-ep0_trb),
+ dwc-ep0_trb = dma_alloc_coherent(dwc-dev, sizeof(*dwc-ep0_trb) * 2,
dwc-ep0_trb_addr, GFP_KERNEL);
if (!dwc-ep0_trb) {
dev_err(dwc-dev, failed to allocate ep0 trb\n);
--
1.7.9.5
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[PATCH 0/5] usb: dwc3: handle non maxpacket aligned transfers 512
Patch series adds support to handle non maxpacket aligned transfers greater than bounce buffer size (512). It first adds chained TRB support and then uses it to handle non maxpacket aligned transfers greater than bounce buffer size. Also included a cleanup patch to use 'roundup' macro. This series is created after applying [1] Non maxpacket aligned transfers can be initiated by ./testusb -t 14 -c 1 -s 520 -v 1 Before this series: unknown speed /dev/bus/usb/001/0180 /dev/bus/usb/001/018 test 14 -- 110 (Connection timed out) After this series: unknown speed /dev/bus/usb/001/0230 /dev/bus/usb/001/023 test 14,0.000486 secs Tested this patch using USB3 Gen X CV (ch9 tests: usb2 and usb3, link layer testing and MSC tests) and using USB2 X CV (ch9 tests, MSC tests) and verified this doesn't cause additional failures. Lecroy compliance tests fail even without this patch series so deferred testing it. [1] - http://permalink.gmane.org/gmane.linux.kernel/1972684 Kishon Vijay Abraham I (5): usb: dwc3: ep0: use _roundup_ to calculate the transfer size usb: dwc3: ep0: preparation for handling non maxpacket aligned transfers 512 usb: dwc3; ep0: Modify _dwc3_ep0_start_trans_ API to take 'chain' parameter usb: dwc3: ep0: Add chained TRB support usb: dwc3: ep0: handle non maxpacket aligned transfers 512 drivers/usb/dwc3/ep0.c| 94 ++--- drivers/usb/dwc3/gadget.c |2 +- 2 files changed, 64 insertions(+), 32 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] ARM: DRA: hwmod: RTC: Add lock and unlock functions
RTC IP have kicker feature which prevents spurious writes to its registers.
In order to write into any of the RTC registers, KICK values has to be
written to KICK registers.
Introduce omap_hwmod_rtc_unlock/lock functions, which writes into these
KICK registers inorder to lock and unlock RTC registers.
Also hook these functions to RTC hwmod.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.h | 2 ++
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++
arch/arm/mach-omap2/omap_hwmod_reset.c| 47 +++
3 files changed, 51 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 44c7db9..04855ab 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -742,6 +742,8 @@ const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
*/
extern int omap_hwmod_aess_preprogram(struct omap_hwmod *oh);
+void omap_hwmod_rtc_unlock(struct omap_hwmod *oh);
+void omap_hwmod_rtc_lock(struct omap_hwmod *oh);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 0e64c2f..983042f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1548,6 +1548,8 @@ static struct omap_hwmod_class_sysconfig
dra7xx_rtcss_sysc = {
static struct omap_hwmod_class dra7xx_rtcss_hwmod_class = {
.name = rtcss,
.sysc = dra7xx_rtcss_sysc,
+ .unlock = omap_hwmod_rtc_unlock,
+ .lock = omap_hwmod_rtc_lock,
};
/* rtcss */
diff --git a/arch/arm/mach-omap2/omap_hwmod_reset.c
b/arch/arm/mach-omap2/omap_hwmod_reset.c
index 65e186c..1fb106d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_reset.c
+++ b/arch/arm/mach-omap2/omap_hwmod_reset.c
@@ -25,11 +25,20 @@
*/
#include linux/kernel.h
#include linux/errno.h
+#include linux/delay.h
#include sound/aess.h
#include omap_hwmod.h
+#define OMAP_RTC_STATUS_REG0x44
+#define OMAP_RTC_KICK0_REG 0x6c
+#define OMAP_RTC_KICK1_REG 0x70
+
+#define OMAP_RTC_KICK0_VALUE 0x83E70B13
+#define OMAP_RTC_KICK1_VALUE 0x95A4F1E0
+#define OMAP_RTC_STATUS_BUSY BIT(0)
+
/**
* omap_hwmod_aess_preprogram - enable AESS internal autogating
* @oh: struct omap_hwmod *
@@ -51,3 +60,41 @@ int omap_hwmod_aess_preprogram(struct omap_hwmod *oh)
return 0;
}
+
+static void omap_rtc_wait_not_busy(struct omap_hwmod *oh)
+{
+ int count;
+ u8 status;
+
+ /* BUSY may stay active for 1/32768 second (~30 usec) */
+ for (count = 0; count 50; count++) {
+ status = omap_hwmod_read(oh, OMAP_RTC_STATUS_REG);
+ if (!(status OMAP_RTC_STATUS_BUSY))
+ break;
+ udelay(1);
+ }
+ /* now we have ~15 usec to read/write various registers */
+}
+
+/**
+ * omap_hwmod_rtc_unlock - Reset and unlock the Kicker mechanism.
+ * @oh: struct omap_hwmod *
+ *
+ * RTC IP have kicker feature. This prevents spurious writes to its registers.
+ * In order to write into any of the RTC registers, KICK values has te be
+ * written in respective KICK registers. This is needed for hwmod to write into
+ * sysconfig register.
+ */
+void omap_hwmod_rtc_unlock(struct omap_hwmod *oh)
+{
+ omap_rtc_wait_not_busy(oh);
+ omap_hwmod_write(OMAP_RTC_KICK0_VALUE, oh, OMAP_RTC_KICK0_REG);
+ omap_hwmod_write(OMAP_RTC_KICK1_VALUE, oh, OMAP_RTC_KICK1_REG);
+}
+
+void omap_hwmod_rtc_lock(struct omap_hwmod *oh)
+{
+ omap_rtc_wait_not_busy(oh);
+ omap_hwmod_write(0x0, oh, OMAP_RTC_KICK0_REG);
+ omap_hwmod_write(0x0, oh, OMAP_RTC_KICK1_REG);
+}
--
1.9.1
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[PATCH 3/3] ARM: AMx3xx: hwmod: RTC: Add lock and unlock functions
RTC IP have kicker feature which prevents spurious writes to its registers.
In order to write into any of the RTC registers, KICK values has to be
written to KICK registers.
omap_hwmod_rtc_unlock/lock functions writes into these KICK registers
inorder to lock and unlock RTC registers.
This patch hooks omap_hwmod_rtc_unlock/lock functions into RTC hwmod,
so that SYSCONFIG register is updated properly.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
index cabc569..2d92958 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -904,6 +904,8 @@ static struct omap_hwmod_class_sysconfig am33xx_rtc_sysc = {
static struct omap_hwmod_class am33xx_rtc_hwmod_class = {
.name = rtc,
.sysc = am33xx_rtc_sysc,
+ .unlock = omap_hwmod_rtc_unlock,
+ .lock = omap_hwmod_rtc_lock,
};
struct omap_hwmod am33xx_rtc_hwmod = {
--
1.9.1
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[PATCH 1/3] ARM: OMAP2+: hwmod: add support for lock and unlock hooks
Some IP blocks like RTC, needs an additional setting for writing to its
registers. This is to prevent any spurious writes from changing the
register values.
This patch adds optional lock and unlock function pointers to
the IP block's hwmod data. These unlock and lock function pointers
are called by hwmod code before and after writing sysconfig registers.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 13 +
arch/arm/mach-omap2/omap_hwmod.h | 4
2 files changed, 17 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 752969f..44c916d3 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -299,7 +299,20 @@ static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
/* Module might have lost context, always update cache and register */
oh-_sysc_cache = v;
+
+ /*
+* Some IP blocks (such as RTC) require unlocking of IP before
+* accessing its registers. If a function pointer is present
+* to unlock, then call it before accessing sysconfig and
+* call lock after writing sysconfig.
+*/
+ if (oh-class-unlock)
+ oh-class-unlock(oh);
+
omap_hwmod_write(v, oh, oh-class-sysc-sysc_offs);
+
+ if (oh-class-lock)
+ oh-class-lock(oh);
}
/**
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 9611c91..44c7db9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -570,6 +570,8 @@ struct omap_hwmod_omap4_prcm {
* @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
* @reset: ptr to fn to be executed in place of the standard hwmod reset fn
* @enable_preprogram: ptr to fn to be executed during device enable
+ * @lock: ptr to fn to be executed to lock IP registers
+ * @unlock: ptr to fn to be executed to unlock IP registers
*
* Represent the class of a OMAP hardware modules (e.g. timer,
* smartreflex, gpio, uart...)
@@ -594,6 +596,8 @@ struct omap_hwmod_class {
int (*pre_shutdown)(struct
omap_hwmod *oh);
int (*reset)(struct omap_hwmod *oh);
int (*enable_preprogram)(struct
omap_hwmod *oh);
+ void(*lock)(struct omap_hwmod *oh);
+ void(*unlock)(struct omap_hwmod *oh);
};
/**
--
1.9.1
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[PATCH 0/3] ARM: OMAP2+: hwmod: RTC: Add lock and unlock hooks
Some IP blocks like RTC, needs an additional unlocking mechanism for writing to its registers. This patch adds optional lock and unlock function pointers to the IP block's hwmod data which gets executed before and after writing into IP sysconfig register. And also hook lock and unlock functions to AMx3xx, DRA7 RTC hwmod data, so that sysconfig registers are updated properly. Tested on: DRA7-evm: http://pastebin.ubuntu.com/1169/ DRA72-evm: http://pastebin.ubuntu.com/11688901/ BeagleBoard-x15: http://pastebin.ubuntu.com/11688907/ BeagleBoneBlack: http://pastebin.ubuntu.com/11688923/ AM437x-gp-evm: http://pastebin.ubuntu.com/11689157/ (Used an out of tree patch to enable RTC) Lokesh Vutla (3): ARM: OMAP2+: hwmod: add support for lock and unlock hooks ARM: DRA: hwmod: RTC: Add lock and unlock functions ARM: AMx3xx: RTC: Add lock and unlock functions arch/arm/mach-omap2/omap_hwmod.c | 13 ++ arch/arm/mach-omap2/omap_hwmod.h | 6 +++ .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 + arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 + arch/arm/mach-omap2/omap_hwmod_reset.c | 47 ++ 5 files changed, 70 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: next-20150604 build: 2 failures 37 warnings (next-20150604)
* Greg Kroah-Hartman gre...@linuxfoundation.org [150608 13:58]: On Fri, Jun 05, 2015 at 06:16:52PM +0100, Mark Brown wrote: On Fri, Jun 05, 2015 at 07:49:00PM +0900, Greg Kroah-Hartman wrote: On Thu, Jun 04, 2015 at 10:20:26AM -0700, Tony Lindgren wrote: Greg, there's now commit 9809889c708e in tty-linus and commit 9e91597f2423 in tty-next. Yes, I can't go back and remove the one in tty-next, I'm guessing when they are merged there is an issue. I'll look into that after Linus pulls in my tty-linus tree. Yeah, git isn't always spectacularly good at resolving add/add if there's context changes between two things in a merge - it sometimes ends up double adding things. Ok, I've now merged these branches together, if someone can verify that my tty-next branch is correct, that would be great. I've verified that things are working for 8250_omap thanks. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/5] usb: dwc3: ep0: Add chained TRB support
Hello. On 06/10/2015 12:18 PM, Kishon Vijay Abraham I wrote: Add chained TRB support to ep0. Now TRB's can be chained just by invoking _dwc3_ep0_start_trans_ with 'chain' parameter set to true. Signed-off-by: Kishon Vijay Abraham I kis...@ti.com --- drivers/usb/dwc3/ep0.c| 16 +--- drivers/usb/dwc3/gadget.c |2 +- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index d1a2be1..6847afe 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c [...] @@ -78,10 +81,17 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, trb-ctrl = type; trb-ctrl |= (DWC3_TRB_CTRL_HWO - | DWC3_TRB_CTRL_LST - | DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI); + if (chain) + trb-ctrl |= DWC3_TRB_CTRL_CHN; + else + trb-ctrl |= (DWC3_TRB_CTRL_IOC + | DWC3_TRB_CTRL_LST); Parens not needed here (and above too). [...] WBR, Sergei -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/5] usb: dwc3: ep0: preparation for handling non maxpacket aligned transfers 512
On 06/10/2015 12:18 PM, Kishon Vijay Abraham I wrote:
No functional change. This is in preparation for handling non maxpacket
aligned transfers greater than bounce buffer size. This is basically to
avoid code duplication when using chained TRB transfers to handle
non maxpacket aligned transfers greater than bounce buffer size.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/ep0.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 713e46a..4998074 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
[...]
@@ -808,20 +812,24 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
}
ur = r-request;
+ buf = ur-buf;
+ remaining_ur_length = ur-length;
length = trb-size DWC3_TRB_SIZE_MASK;
+ maxp = ep0-endpoint.maxpacket;
+
if (dwc-ep0_bounced) {
- unsigned maxp = ep0-endpoint.maxpacket;
- unsigned transfer_size = roundup(ur-length, maxp);
+ transfer_size = roundup((ur-length - transfer_size),
+ maxp);
The innermost parens shouldn't be needed (if thay are, fix the macro
instead).
[...]
@@ -941,7 +949,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
}
maxpacket = dep-endpoint.maxpacket;
- transfer_size = roundup(req-request.length, maxpacket);
+ transfer_size = roundup((req-request.length - transfer_size),
+ maxpacket);
Likewise.
[...]
WBR, Sergei
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Re: [PATCH 3/5] usb: dwc3; ep0: Modify _dwc3_ep0_start_trans_ API to take 'chain' parameter
Hello. On 06/10/2015 12:18 PM, Kishon Vijay Abraham I wrote: No functional change. Added a new parameter in _dwc3_ep0_start_trans_ to indicate whether the TRB is a chained TRB or last TRB. This is in preparation for adding chained TRB support for ep0. Signed-off-by: Kishon Vijay Abraham I kis...@ti.com --- drivers/usb/dwc3/ep0.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index 4998074..d1a2be1 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -56,7 +56,7 @@ static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state) } static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, - u32 len, u32 type) + u32 len, u32 type, unsigned chain) Why not *bool*? You're passing boolean values anyway... [...] WBR, Sergei -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
