[PATCH 0/3] Add Palmas iio gpadc

2015-09-23 Thread H. Nikolaus Schaller 
Add iio driver for the TI Palmas (twl6035, 6037) including device tree bindings.
It enables the gpadc for the OMAP5 uevm.

This patch series is based on original code taken from Android Tegra kernels:
(https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc)

Tegra code was developed by:
Pradeep Goudagunta 
Laxman Dewangan 

Edited and extended for mainline by:
H. Nikolaus Schaller 
Marek Belisko 



H. Nikolaus Schaller (2):
 iio:adc: add iio driver for Palmas (twl6035/7) gpadc
 ARM: dts: omap5-uevm: enable iio gpadc for Palmas

Marek Belisko (1):
 iio:adc:palmas: add DT support

.../devicetree/bindings/iio/adc/palmas-gpadc.txt   |  67 ++
arch/arm/boot/dts/omap5-uevm.dts   |  22 +
drivers/iio/adc/Kconfig|   9 +
drivers/iio/adc/Makefile   |   1 +
drivers/iio/adc/palmas_gpadc.c | 883 +
include/linux/mfd/palmas.h |  59 +-
6 files changed, 1037 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt
create mode 100644 drivers/iio/adc/palmas_gpadc.c

-- 
2.5.1

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[PATCH 1/3] iio:adc: add iio driver for Palmas (twl6035/7) gpadc

2015-09-23 Thread H. Nikolaus Schaller 
This driver code was found as:

https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc

Fixed various compilation issues and test this driver on omap5 evm.

Signed-off-by: Pradeep Goudagunta 
Signed-off-by: H. Nikolaus Schaller 
Signed-off-by: Marek Belisko 
---
drivers/iio/adc/Kconfig|   9 +
drivers/iio/adc/Makefile   |   1 +
drivers/iio/adc/palmas_gpadc.c | 797 +
include/linux/mfd/palmas.h |  59 ++-
4 files changed, 862 insertions(+), 4 deletions(-)
create mode 100644 drivers/iio/adc/palmas_gpadc.c

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index eb0cd89..f6df9db 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -242,6 +242,15 @@ config NAU7802
  To compile this driver as a module, choose M here: the
  module will be called nau7802.

+config PALMAS_GPADC
+   tristate "TI Palmas General Purpose ADC"
+   depends on MFD_PALMAS
+   help
+ Palmas series pmic chip by texas Instruments (twl6035/6037)
+ is used in smartphones and tablets and supports a 16 channel
+ general purpose ADC. Add iio driver to read different channel
+ of the GPADCs.
+
config QCOM_SPMI_IADC
tristate "Qualcomm SPMI PMIC current ADC"
depends on SPMI
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index a096210..716f112 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
obj-$(CONFIG_MCP3422) += mcp3422.o
obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
obj-$(CONFIG_NAU7802) += nau7802.o
+obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
new file mode 100644
index 000..17abb28
--- /dev/null
+++ b/drivers/iio/adc/palmas_gpadc.c
@@ -0,0 +1,797 @@
+/*
+ * palmas-adc.c -- TI PALMAS GPADC.
+ *
+ * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
+ *
+ * Author: Pradeep Goudagunta 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MOD_NAME "palmas-gpadc"
+#define ADC_CONVERSION_TIMEOUT (msecs_to_jiffies(5000))
+#define TO_BE_CALCULATED 0
+
+struct palmas_gpadc_info {
+/* calibration codes and regs */
+   int x1;
+   int x2;
+   int v1;
+   int v2;
+   u8 trim1_reg;
+   u8 trim2_reg;
+   int gain;
+   int offset;
+   int gain_error;
+   bool is_correct_code;
+};
+
+#define PALMAS_ADC_INFO(_chan, _x1, _x2, _v1, _v2, _t1, _t2, _is_correct_code)\
+[PALMAS_ADC_CH_##_chan] = {\
+   .x1 = _x1,  \
+   .x2 = _x2,  \
+   .v1 = _v1,  \
+   .v2 = _v2,  \
+   .gain = TO_BE_CALCULATED,   \
+   .offset = TO_BE_CALCULATED, \
+   .gain_error = TO_BE_CALCULATED, \
+   .trim1_reg = PALMAS_GPADC_TRIM##_t1,\
+   .trim2_reg = PALMAS_GPADC_TRIM##_t2,\
+   .is_correct_code = _is_correct_code \
+   }
+
+static struct palmas_gpadc_info palmas_gpadc_info[] = {
+   PALMAS_ADC_INFO(IN0, 2064, 3112, 630, 950, 1, 2, false),
+   PALMAS_ADC_INFO(IN1, 2064, 3112, 630, 950, 1, 2, false),
+   PALMAS_ADC_INFO(IN2, 2064, 3112, 1260, 1900, 3, 4, false),
+   PALMAS_ADC_INFO(IN3, 2064, 3112, 630, 950, 1, 2, false),
+   PALMAS_ADC_INFO(IN4, 2064, 3112, 630, 950, 1, 2, false),
+   PALMAS_ADC_INFO(IN5, 2064, 3112, 630, 950, 1, 2, false),
+   PALMAS_ADC_INFO(IN6, 2064, 3112, 2520, 3800, 5, 6, false),
+   PALMAS_ADC_INFO(IN7, 2064, 3112, 2520, 3800, 7, 8, false),
+   PALMAS_ADC_INFO(IN8, 2064, 3112, 3150, 4750, 9, 10, false),
+   PALMAS_ADC_INFO(IN9, 2064, 3112, 5670, 8550, 11, 12, false),
+   PALMAS_ADC_INFO(IN10, 2064, 3112, 3465, 5225, 13, 14, false),
+   PALMAS_ADC_INFO(IN11, 0, 0, 0, 0, INVALID, INVALID, true),
+   PALMAS_ADC_INFO(IN12, 0, 0, 0, 0, INVALID, INVALID, true),
+   PALMAS_ADC_INFO(IN13, 0, 0, 0, 0, INVALID, INVALID, true),
+   PALMAS_ADC_INFO(IN14, 2064, 3112,

[PATCH 2/3] iio:adc:palmas: add DT support

2015-09-23 Thread H. Nikolaus Schaller 
From: Marek Belisko 

Code was found at:
https://android.googlesource.com/kernel/tegra/+/a90856a6626d502d42c6e7abccbdf9d730b36270%5E%21/#F1

Signed-off-by: Laxman Dewangan 
[Fixed minor typos + add channels list to documentation]
Signed-off-by: Marek Belisko 
---
.../devicetree/bindings/iio/adc/palmas-gpadc.txt   |  67 +++
drivers/iio/adc/palmas_gpadc.c | 130 +
2 files changed, 175 insertions(+), 22 deletions(-)
create mode 100644 Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt

diff --git a/Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt 
b/Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt
new file mode 100644
index 000..a5a33ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt
@@ -0,0 +1,67 @@
+* Palmas general purpose ADC IP block devicetree bindings
+
+Channels list:
+   0 battery type
+1 battery temp NTC
+   2 GP
+   3 temp (with ext. diode)
+   4 GP
+   5 GP
+   6 VBAT_SENSE
+   7 VCC_SENSE
+   8 Backup Battery voltage
+   9 external charger (VCHG)
+   10 VBUS
+   11 DC-DC current probe (how does this work?)
+   12 internal die temp
+   13 internal die temp
+   14 USB ID pin voltage
+   15 test network
+
+Required properties:
+- compatible : Must be "ti,palmas-gpadc".
+
+Optional sub-nodes:
+ti,channel0-current-microamp: Channel 0 current in uA.
+   Valid values 0uA, 5uA, 15uA, 20uA.
+ti,channel3-current-microamp: Channel 3 current in uA.
+   Valid value 0uA, 10uA, 400uA, 800uA.
+ti,enable-channel3-dual-current: Enable dual current on channel 3.
+ti,enable-extended-delay: Enable extended delay.
+
+Optional sub-node:
+The Palmas ADC node has optional subnode to define the iio mapping.
+It is the name with "iio_map". This node has again subnode to define
+the property of the channel. The sub subnode has following properties:
+- ti,adc-channel-number: ADC channel number.
+- ti,adc-consumer-device: Consumer device name.
+- ti,adc-consumer-channel: ADC consumer channel name.
+
+Example:
+
+pmic {
+   compatible = "ti,twl6035-pmic", "ti,palmas-pmic";
+   ...
+   gpadc {
+   compatible = "ti,palmas-gpadc";
+   interrupts = <18 0
+ 16 0
+ 17 0>;
+   ti,channel0-current-microamp = <5>;
+   ti,channel3-current-microamp = <10>;
+   iio_map {
+   ch1 {
+   ti,adc-channel-number = <1>;
+   ti,adc-consumer-device = 
"generic-adc-thermal.0";
+   ti,adc-consumer-channel ="battery-temp-channel";
+   };
+
+   ch6 {
+   ti,adc-channel-number = <6>;
+   ti,adc-consumer-device = "palmas-battery";
+   ti,adc-consumer-channel ="vbat_channel";
+   };
+   };
+   };
+   ...
+};
diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
index 17abb28..bc4db43 100644
--- a/drivers/iio/adc/palmas_gpadc.c
+++ b/drivers/iio/adc/palmas_gpadc.c
@@ -20,6 +20,8 @@
#include 
#include 
#include 
+#include 
+#include 
#include 
#include 
#include 
@@ -434,20 +436,97 @@ static const struct iio_chan_spec 
palmas_gpadc_iio_channel[] = {
PALMAS_ADC_CHAN_IIO(IN15, IIO_VOLTAGE),
};

+static int palmas_gpadc_get_adc_dt_data(struct platform_device *pdev,
+   struct palmas_gpadc_platform_data **gpadc_pdata)
+{
+   struct device_node *np = pdev->dev.of_node;
+   struct palmas_gpadc_platform_data *gp_data;
+   struct device_node *map_node;
+   struct device_node *child;
+   struct iio_map *palmas_iio_map;
+   int ret;
+   u32 pval;
+   int nmap, nvalid_map;
+
+   gp_data = devm_kzalloc(>dev, sizeof(*gp_data), GFP_KERNEL);
+   if (!gp_data)
+   return -ENOMEM;
+
+   ret = of_property_read_u32(np, "ti,channel0-current-microamp", );
+   if (!ret)
+   gp_data->ch0_current = pval;
+
+   ret = of_property_read_u32(np, "ti,channel3-current-microamp", );
+   if (!ret)
+   gp_data->ch3_current = pval;
+
+   gp_data->extended_delay = of_property_read_bool(np,
+   "ti,enable-extended-delay");
+
+   map_node = of_get_child_by_name(np, "iio_map");
+   if (!map_node) {
+   dev_warn(>dev, "IIO map table not found\n");
+   goto done;
+   }
+
+   nmap = of_get_child_count(map_node);
+   if (!nmap)
+   goto done;
+
+   nmap++;
+   palmas_iio_map = devm_kzalloc(>dev,
+   sizeof(*palmas_iio_map) * nmap, GFP_KERNEL);
+   if (!palmas_iio_map)
+   goto done;
+
+

[PATCH 3/3] ARM: dts: omap5-uevm: enable iio gpadc for Palmas

2015-09-23 Thread H. Nikolaus Schaller 
Signed-off-by: H. Nikolaus Schaller 
---
arch/arm/boot/dts/omap5-uevm.dts | 22 ++
1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 3b16e8f..0d4c8ff 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -342,6 +342,28 @@

ti,ldo6-vibrator;

+   gpadc {
+   compatible = "ti,palmas-gpadc";
+   interrupts = <18 0
+ 16 0
+ 17 0>;
+   ti,channel0-current-microamp = <5>;
+   ti,channel3-current-microamp = <10>;
+   iio_map {
+   ch1 {
+   ti,adc-channel-number = <1>;
+   ti,adc-consumer-device = 
"generic-adc-thermal.0";
+   ti,adc-consumer-channel 
="battery-temp-channel";
+   };
+
+   ch6 {
+   ti,adc-channel-number = <6>;
+   ti,adc-consumer-device = 
"palmas-battery";
+   ti,adc-consumer-channel 
="vbat_channel";
+   };
+   };
+   };
+
regulators {
smps123_reg: smps123 {
/* VDD_OPP_MPU */
-- 
2.5.1

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Re: [PATCH 1/3] iio:adc: add iio driver for Palmas (twl6035/7) gpadc

2015-09-23 Thread Peter Meerwald 

> This driver code was found as:
> 
> https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc
> 
> Fixed various compilation issues and test this driver on omap5 evm.

several minor comments below
probably the mfd part should be split out in a separate patch
 
> Signed-off-by: Pradeep Goudagunta 
> Signed-off-by: H. Nikolaus Schaller 
> Signed-off-by: Marek Belisko 
> ---
> drivers/iio/adc/Kconfig|   9 +
> drivers/iio/adc/Makefile   |   1 +
> drivers/iio/adc/palmas_gpadc.c | 797 +
> include/linux/mfd/palmas.h |  59 ++-
> 4 files changed, 862 insertions(+), 4 deletions(-)
> create mode 100644 drivers/iio/adc/palmas_gpadc.c
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index eb0cd89..f6df9db 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -242,6 +242,15 @@ config NAU7802
> To compile this driver as a module, choose M here: the
> module will be called nau7802.
> 
> +config PALMAS_GPADC
> + tristate "TI Palmas General Purpose ADC"
> + depends on MFD_PALMAS
> + help
> +   Palmas series pmic chip by texas Instruments (twl6035/6037)
> +   is used in smartphones and tablets and supports a 16 channel
> +   general purpose ADC. Add iio driver to read different channel
> +   of the GPADCs.

PMIC
_T_exas

drop meaningless "Add iio driver to read different channel of the GPADCs."

> +
> config QCOM_SPMI_IADC
>   tristate "Qualcomm SPMI PMIC current ADC"
>   depends on SPMI
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index a096210..716f112 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -26,6 +26,7 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
> obj-$(CONFIG_MCP3422) += mcp3422.o
> obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
> obj-$(CONFIG_NAU7802) += nau7802.o
> +obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
> obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
> obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
> obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
> diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
> new file mode 100644
> index 000..17abb28
> --- /dev/null
> +++ b/drivers/iio/adc/palmas_gpadc.c
> @@ -0,0 +1,797 @@
> +/*
> + * palmas-adc.c -- TI PALMAS GPADC.
> + *
> + * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
> + *
> + * Author: Pradeep Goudagunta 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation version 2.
> + */

newline

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define MOD_NAME "palmas-gpadc"
> +#define ADC_CONVERSION_TIMEOUT   (msecs_to_jiffies(5000))
> +#define TO_BE_CALCULATED 0

add prefix PALMAS_

> +
> +struct palmas_gpadc_info {
> +/* calibration codes and regs */
> + int x1;
> + int x2;
> + int v1;
> + int v2;
> + u8 trim1_reg;
> + u8 trim2_reg;
> + int gain;
> + int offset;
> + int gain_error;
> + bool is_correct_code;
> +};
> +
> +#define PALMAS_ADC_INFO(_chan, _x1, _x2, _v1, _v2, _t1, _t2, 
> _is_correct_code)\

whitespace and indentation

> +[PALMAS_ADC_CH_##_chan] = {  \
> + .x1 = _x1,  \
> + .x2 = _x2,  \
> + .v1 = _v1,  \
> + .v2 = _v2,  \
> + .gain = TO_BE_CALCULATED,   \
> + .offset = TO_BE_CALCULATED, \
> + .gain_error = TO_BE_CALCULATED, \
> + .trim1_reg = PALMAS_GPADC_TRIM##_t1,\
> + .trim2_reg = PALMAS_GPADC_TRIM##_t2,\
> + .is_correct_code = _is_correct_code \
> + }
> +
> +static struct palmas_gpadc_info palmas_gpadc_info[] = {
> + PALMAS_ADC_INFO(IN0, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN1, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN2, 2064, 3112, 1260, 1900, 3, 4, false),
> + PALMAS_ADC_INFO(IN3, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN4, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN5, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN6, 2064, 3112, 2520, 3800, 5, 6, false),
> + PALMAS_ADC_INFO(IN7, 2064, 3112, 2520, 3800, 7, 8, false),
> + PALMAS_ADC_INFO(IN8, 2064, 3112,

[PATCH] clk: ti: fix dual-registration of uart4_ick

2015-09-23 Thread Ben Dooks 
On the OMAP AM3517 platform the uart4_ick gets registered
twice, causing any power managment to /dev/ttyO3 to fail
when trying to wake the device up.

This solves the following oops:

[] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
[] PC is at serial_omap_pm+0x48/0x15c
[] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c

Signed-off-by: Ben Dooks 
---
 drivers/clk/ti/clk-3xxx.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
index 5e12f32..2e7ef1f 100644
--- a/drivers/clk/ti/clk-3xxx.c
+++ b/drivers/clk/ti/clk-3xxx.c
@@ -374,7 +374,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
DT_CLK(NULL, "gpio2_ick", "gpio2_ick"),
DT_CLK(NULL, "wdt3_ick", "wdt3_ick"),
DT_CLK(NULL, "uart3_ick", "uart3_ick"),
-   DT_CLK(NULL, "uart4_ick", "uart4_ick"),
DT_CLK(NULL, "gpt9_ick", "gpt9_ick"),
DT_CLK(NULL, "gpt8_ick", "gpt8_ick"),
DT_CLK(NULL, "gpt7_ick", "gpt7_ick"),
-- 
2.5.1

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Re: [PATCH] clk: ti: fix dual-registration of uart4_ick

2015-09-23 Thread Greg KH 
On Wed, Sep 23, 2015 at 03:48:34PM +0100, Ben Dooks wrote:
> On the OMAP AM3517 platform the uart4_ick gets registered
> twice, causing any power managment to /dev/ttyO3 to fail
> when trying to wake the device up.
> 
> This solves the following oops:
> 
> [] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
> [] PC is at serial_omap_pm+0x48/0x15c
> [] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c
> 
> Signed-off-by: Ben Dooks 
> ---
>  drivers/clk/ti/clk-3xxx.c | 1 -
>  1 file changed, 1 deletion(-)



This is not the correct way to submit patches for inclusion in the
stable kernel tree.  Please read Documentation/stable_kernel_rules.txt
for how to do this properly.


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Re: [PATCH] clk: ti: Fix FAPLL udelay in clk_enable with clk_prepare

2015-09-23 Thread Tony Lindgren 
* Peter Ujfalusi  [150922 23:17]:
> Tony,
> 
> On 09/23/2015 12:23 AM, Tony Lindgren wrote:
> > As recently pointed out (again) by Thomas and Russell, we must not
> > wait in in clk_enable. The wait for PLL to lock needs to happen
> > in clk_prepare instead.
> > 
> > It seems this is a common copy paste error with the PLL drivers,
> > and similar fixes should be applied to other PLL drivers after
> > testing.
> 
> One thing to note:
> because of how the hwmod code works, at boot time we prepare all clocks for
> the devices and in runtime the hwmod only uses clk_enable/disable, it will
> never unprepare the clock(s). This will means that these clocks will be
> enabled all the time and will never turned off.

Good point, we need to check that for hwmod pm_runtime related
functions. Basically the PLLs we can't disable until in
pm_runtime_disable.

I think the approach we need to take to be that clk_enable/disable
is really optional clk_gate_enable/disable. And in many cases PLLs
don't have a gate, so it's correct for pm_runtime enable/disable
to not do anything for the PLLs.

And the reason we don't want to change pm_runtime hooks to use
clk_prepare_enable/disable is that then drivers can't use
pm_runtime_irq_safe like some do currently.

Regards,

Tony
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Re: [PATCH 3/3] ARM: dts: omap5-uevm: enable iio gpadc for Palmas

2015-09-23 Thread H. Nikolaus Schaller 
Hi,

Am 23.09.2015 um 18:56 schrieb Tony Lindgren :

> * H. Nikolaus Schaller  [150923 05:53]:
> 
> Missing description?

well, description is “ARM: dts: omap5-uevm: enable iio gpadc for Palmas"

and I didn’t catch that the commit is otherwise empty. Sorry.

> BTW, this I want to queue separately
> as I have patches in works to support omap5 variants with
> omap5-board-common.dtsi to avoid duplicating things as
> we get omap5 better supported for things like regulators.

Yes, it should work for all Palmas based OMAP5 boards and a 
omap5-board-common.dtsi would be the right place (after
it comes to existence).

> 
> Regards,
> 
> Tony
> 
>> Signed-off-by: H. Nikolaus Schaller 
>> ---
>> arch/arm/boot/dts/omap5-uevm.dts | 22 ++
>> 1 file changed, 22 insertions(+)
>> 
>> diff --git a/arch/arm/boot/dts/omap5-uevm.dts 
>> b/arch/arm/boot/dts/omap5-uevm.dts
>> index 3b16e8f..0d4c8ff 100644
>> --- a/arch/arm/boot/dts/omap5-uevm.dts
>> +++ b/arch/arm/boot/dts/omap5-uevm.dts
>> @@ -342,6 +342,28 @@
>> 
>>  ti,ldo6-vibrator;
>> 
>> +gpadc {
>> +compatible = "ti,palmas-gpadc";
>> +interrupts = <18 0
>> +  16 0
>> +  17 0>;
>> +ti,channel0-current-microamp = <5>;
>> +ti,channel3-current-microamp = <10>;
>> +iio_map {
>> +ch1 {
>> +ti,adc-channel-number = <1>;
>> +ti,adc-consumer-device = 
>> "generic-adc-thermal.0";
>> +ti,adc-consumer-channel 
>> ="battery-temp-channel";
>> +};
>> +
>> +ch6 {
>> +ti,adc-channel-number = <6>;
>> +ti,adc-consumer-device = 
>> "palmas-battery";
>> +ti,adc-consumer-channel 
>> ="vbat_channel";
>> +};
>> +};
>> +};
>> +
>>  regulators {
>>  smps123_reg: smps123 {
>>  /* VDD_OPP_MPU */
>> -- 
>> 2.5.1
>> 

BR,
Nikolaus

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Re: [PATCH 3/3] ARM: dts: omap5-uevm: enable iio gpadc for Palmas

2015-09-23 Thread Tony Lindgren 
* H. Nikolaus Schaller  [150923 05:53]:

Missing description? BTW, this I want to queue separately
as I have patches in works to support omap5 variants with
omap5-board-common.dtsi to avoid duplicating things as
we get omap5 better supported for things like regulators.

Regards,

Tony

> Signed-off-by: H. Nikolaus Schaller 
> ---
> arch/arm/boot/dts/omap5-uevm.dts | 22 ++
> 1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/omap5-uevm.dts 
> b/arch/arm/boot/dts/omap5-uevm.dts
> index 3b16e8f..0d4c8ff 100644
> --- a/arch/arm/boot/dts/omap5-uevm.dts
> +++ b/arch/arm/boot/dts/omap5-uevm.dts
> @@ -342,6 +342,28 @@
> 
>   ti,ldo6-vibrator;
> 
> + gpadc {
> + compatible = "ti,palmas-gpadc";
> + interrupts = <18 0
> +   16 0
> +   17 0>;
> + ti,channel0-current-microamp = <5>;
> + ti,channel3-current-microamp = <10>;
> + iio_map {
> + ch1 {
> + ti,adc-channel-number = <1>;
> + ti,adc-consumer-device = 
> "generic-adc-thermal.0";
> + ti,adc-consumer-channel 
> ="battery-temp-channel";
> + };
> +
> + ch6 {
> + ti,adc-channel-number = <6>;
> + ti,adc-consumer-device = 
> "palmas-battery";
> + ti,adc-consumer-channel 
> ="vbat_channel";
> + };
> + };
> + };
> +
>   regulators {
>   smps123_reg: smps123 {
>   /* VDD_OPP_MPU */
> -- 
> 2.5.1
> 
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Re: [PATCH v3 10/24] ARM: davinci: Add set dma_mask to eDMA devices

2015-09-23 Thread Tony Lindgren 
* Peter Ujfalusi  [150922 03:01]:
> The upcoming change to merge the arch/arm/common/edma.c into
> drivers/dma/edma.c will need this change when booting daVinci devices in
> no DT mode.
> 
> Signed-off-by: Peter Ujfalusi 
> ---
>  arch/arm/Kconfig  |1 -
>  arch/arm/common/Kconfig   |3 -
>  arch/arm/common/Makefile  |1 -
>  arch/arm/common/edma.c| 1431 
>  arch/arm/mach-davinci/devices-da8xx.c |2 +
>  arch/arm/mach-davinci/dm355.c |1 +
>  arch/arm/mach-davinci/dm644x.c|1 +
>  arch/arm/mach-davinci/dm646x.c|1 +
>  arch/arm/mach-omap2/Kconfig   |1 -
>  drivers/dma/Kconfig   |1 -
>  drivers/dma/edma.c| 1447 
> +++--
>  include/linux/platform_data/edma.h|   74 --
>  12 files changed, 1394 insertions(+), 1570 deletions(-)
>  delete mode 100644 arch/arm/common/edma.c

Hmm I think I already acked the mach-omap2/Kconfig change,
but if not, here you are:

Acked-by: Tony Lindgren 
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Re: [PATCH] clk: ti: fix dual-registration of uart4_ick

2015-09-23 Thread Tony Lindgren 
* Ben Dooks  [150923 07:53]:
> On the OMAP AM3517 platform the uart4_ick gets registered
> twice, causing any power managment to /dev/ttyO3 to fail
> when trying to wake the device up.
> 
> This solves the following oops:
> 
> [] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
> [] PC is at serial_omap_pm+0x48/0x15c
> [] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c

No uart4 on 34xx/35xx, that got introduced with 36xx so:

Acked-by: Tony Lindgren 

> Signed-off-by: Ben Dooks 
> ---
>  drivers/clk/ti/clk-3xxx.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
> index 5e12f32..2e7ef1f 100644
> --- a/drivers/clk/ti/clk-3xxx.c
> +++ b/drivers/clk/ti/clk-3xxx.c
> @@ -374,7 +374,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
>   DT_CLK(NULL, "gpio2_ick", "gpio2_ick"),
>   DT_CLK(NULL, "wdt3_ick", "wdt3_ick"),
>   DT_CLK(NULL, "uart3_ick", "uart3_ick"),
> - DT_CLK(NULL, "uart4_ick", "uart4_ick"),
>   DT_CLK(NULL, "gpt9_ick", "gpt9_ick"),
>   DT_CLK(NULL, "gpt8_ick", "gpt8_ick"),
>   DT_CLK(NULL, "gpt7_ick", "gpt7_ick"),
> -- 
> 2.5.1
> 
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Re: [PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

2015-09-23 Thread Tony Lindgren 
* Suman Anna  [150903 16:01]:
>  On 07/23/2015 02:24 AM, Tony Lindgren wrote:
> > OK maybe check the syss/sysc registers involved here for each hardware
> > module here and which driver tinkers with which registers? This will
> > make things a lot easier in the long run for sure.
> 
> The OMAP remoteproc driver typically deals with only the reset registers
> and another register in the Control module for programming the boot
> address for the DSPs. You can look up the OMAP4 hwmod data for
> reference. There is currently a .prcm.omap4.modulemode set for these,
> and I have a patch to remove those. I haven't yet posted it yet [1],
> because OMAP remoteprocs are still not bootable on mainline.

Thanks for checking that. Like we chatted, let's make sure we don't
end up with iommu and remoteproc "consumer device" specific data
in the iommu and remoteproc code.

Regards,

Tony

> [1]
> http://git.ti.com/gitweb/?p=rpmsg/remoteproc.git;a=commit;h=0dd2a6a2d8869ee6cec92f75d70663259a41c11f
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Re: [PATCH] ARM: OMAP2+: PM: Denote the cpuidle tracepoints as _rcuidle()

2015-09-23 Thread Kevin Hilman 
Jisheng Zhang  writes:

> The cpuidle tracepoints are called within a rcu_idle_exit() section, and
> must be denoted with the _rcuidle() version of the tracepoint.
>
> Signed-off-by: Jisheng Zhang 
 
Acked-by: Kevin Hilman 
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Re: [PATCH] ARM: OMAP2+: PM: Denote the cpuidle tracepoints as _rcuidle()

2015-09-23 Thread Tony Lindgren 
* Kevin Hilman  [150923 11:03]:
> Jisheng Zhang  writes:
> 
> > The cpuidle tracepoints are called within a rcu_idle_exit() section, and
> > must be denoted with the _rcuidle() version of the tracepoint.
> >
> > Signed-off-by: Jisheng Zhang 
>  
> Acked-by: Kevin Hilman 

Hmm is this needed as a fix for the -rc cycle or can this wait
for v4.4?

Regards,

Tony
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Re: [PATCH] clk: ti: Fix FAPLL udelay in clk_enable with clk_prepare

2015-09-23 Thread Peter Ujfalusi 
Tony,

On 09/23/2015 12:23 AM, Tony Lindgren wrote:
> As recently pointed out (again) by Thomas and Russell, we must not
> wait in in clk_enable. The wait for PLL to lock needs to happen
> in clk_prepare instead.
> 
> It seems this is a common copy paste error with the PLL drivers,
> and similar fixes should be applied to other PLL drivers after
> testing.

One thing to note:
because of how the hwmod code works, at boot time we prepare all clocks for
the devices and in runtime the hwmod only uses clk_enable/disable, it will
never unprepare the clock(s). This will means that these clocks will be
enabled all the time and will never turned off.

-- 
Péter

> Cc: Brian Hutchinson 
> Cc: Felipe Balbi 
> Cc: Grygorii Strashko 
> Cc: Nishanth Menon 
> Cc: Russell King - ARM Linux 
> Cc: Thomas Gleixner 
> Cc: Sekhar Nori 
> Signed-off-by: Tony Lindgren 
> ---
>  drivers/clk/ti/fapll.c | 18 +-
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c
> index f4b2e98..e1db74a 100644
> --- a/drivers/clk/ti/fapll.c
> +++ b/drivers/clk/ti/fapll.c
> @@ -37,7 +37,7 @@
>  #define FAPLL_PWD_OFFSET 4
>  
>  #define MAX_FAPLL_OUTPUTS7
> -#define FAPLL_MAX_RETRIES1000
> +#define FAPLL_MAX_RETRIES5
>  
>  #define to_fapll(_hw)container_of(_hw, struct fapll_data, hw)
>  #define to_synth(_hw)container_of(_hw, struct fapll_synth, 
> hw)
> @@ -126,7 +126,7 @@ static int ti_fapll_wait_lock(struct fapll_data *fd)
>   if (retries-- <= 0)
>   break;
>  
> - udelay(1);
> + usleep_range(200, 300);
>   }
>  
>   pr_err("%s failed to lock\n", fd->name);
> @@ -134,7 +134,7 @@ static int ti_fapll_wait_lock(struct fapll_data *fd)
>   return -ETIMEDOUT;
>  }
>  
> -static int ti_fapll_enable(struct clk_hw *hw)
> +static int ti_fapll_prepare(struct clk_hw *hw)
>  {
>   struct fapll_data *fd = to_fapll(hw);
>   u32 v = readl_relaxed(fd->base);
> @@ -146,7 +146,7 @@ static int ti_fapll_enable(struct clk_hw *hw)
>   return 0;
>  }
>  
> -static void ti_fapll_disable(struct clk_hw *hw)
> +static void ti_fapll_unprepare(struct clk_hw *hw)
>  {
>   struct fapll_data *fd = to_fapll(hw);
>   u32 v = readl_relaxed(fd->base);
> @@ -155,7 +155,7 @@ static void ti_fapll_disable(struct clk_hw *hw)
>   writel_relaxed(v, fd->base);
>  }
>  
> -static int ti_fapll_is_enabled(struct clk_hw *hw)
> +static int ti_fapll_is_prepared(struct clk_hw *hw)
>  {
>   struct fapll_data *fd = to_fapll(hw);
>   u32 v = readl_relaxed(fd->base);
> @@ -261,7 +261,7 @@ static int ti_fapll_set_rate(struct clk_hw *hw, unsigned 
> long rate,
>   v |= pre_div_p << FAPLL_MAIN_DIV_P_SHIFT;
>   v |= mult_n << FAPLL_MAIN_MULT_N_SHIFT;
>   writel_relaxed(v, fd->base);
> - if (ti_fapll_is_enabled(hw))
> + if (ti_fapll_is_prepared(hw))
>   ti_fapll_wait_lock(fd);
>   ti_fapll_clear_bypass(fd);
>  
> @@ -269,9 +269,9 @@ static int ti_fapll_set_rate(struct clk_hw *hw, unsigned 
> long rate,
>  }
>  
>  static struct clk_ops ti_fapll_ops = {
> - .enable = ti_fapll_enable,
> - .disable = ti_fapll_disable,
> - .is_enabled = ti_fapll_is_enabled,
> + .prepare = ti_fapll_prepare,
> + .unprepare = ti_fapll_unprepare,
> + .is_prepared = ti_fapll_is_prepared,
>   .recalc_rate = ti_fapll_recalc_rate,
>   .get_parent = ti_fapll_get_parent,
>   .round_rate = ti_fapll_round_rate,
> 


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Plan for the PBIAS regulator fix?

2015-09-23 Thread Tony Lindgren 
Hi Mark,

Got any estimate on when you might be sending out the pull request
for the pending regulator fixes for the -rc cycle? Or are you OK
for me to consider commit b9c93646fd5c immutable and use it as
a base for a fixes branch for the related dts change?

Commit b9c93646fd5c ("regulator: pbias: program pbias register
offset in pbias driver") is on -rc1 and would not merge other
regulator fixes upstream even if it got merged with dts changes
before your other regulator fixes.

Regards,

Tony
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Re: [PATCH 2/2] ARM: dts: Fix WLAN regression on omap5-uevm

2015-09-23 Thread Tony Lindgren 
* Tony Lindgren  [150921 07:16]:
> * Javier Martinez Canillas  [150921 02:17]:
> > > Then getting the 32k clock from palmas is not working either, it
> > > seems some better deferred probe handling is needed there if
> > > omap_hsmmc is built-in and palmas-clk is a loadable module.
> > >
> > 
> > IIUC from another email, you already solved this.
> 
> That deferred probe fix did not solve this one, need to debug further.

FYI, found the MMC pwrseq clock issue, I had a typo in my dts
file with "ext_clk" instead of "ext_clock" :)

Will send v2 of $subject patch after some more testing using
both a GPIO regulator-fixed and mmc pwrseq for the clock.

Regards,

Tony
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Re: [PATCH] ARM: OMAP: Remove duplicated operand in OR operation

2015-09-23 Thread Paul Walmsley 
On Mon, 21 Sep 2015, Roger Quadros wrote:

> On 17/09/15 16:22, Javier Martinez Canillas wrote:
> > Commit b483a4a5a711 ("ARM: OMAP4+: hwmod data: Don't prevent RESET of
> > USB Host module") added the SYSC_HAS_RESET_STATUS flag to both OMAP4
> > and OMAP5 USB host module hwmon sysconfig but that flag was already
> > set for OMAP5. So now the flag appears twice in the expression.
> > 
> > make coccicheck complains with the following message:
> > 
> > omap_hwmod_54xx_data.c:1846:37-58: duplicated argument to & or |
> > 
> > Signed-off-by: Javier Martinez Canillas 
> 
> Acked-by: Roger Quadros 

Thanks, queued for v4.4.

- Paul
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Re: [PATCH] ARM: OMAP2+: PM: Denote the cpuidle tracepoints as _rcuidle()

2015-09-23 Thread Jisheng Zhang 
Dear Tony,

On Wed, 23 Sep 2015 11:08:15 -0700
Tony Lindgren  wrote:

> * Kevin Hilman  [150923 11:03]:
> > Jisheng Zhang  writes:
> > 
> > > The cpuidle tracepoints are called within a rcu_idle_exit() section, and
> > > must be denoted with the _rcuidle() version of the tracepoint.
> > >
> > > Signed-off-by: Jisheng Zhang 
> >  
> > Acked-by: Kevin Hilman 
> 
> Hmm is this needed as a fix for the -rc cycle or can this wait
> for v4.4?

IMHO, this is a fix. But it can wait for v4.4 merge window.

Thanks,
Jisheng

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Re: [PATCH v3 0/3] ARM: OMAP2+: hwmod: RTC: Add lock and unlock hooks

2015-09-23 Thread Lokesh Vutla 
Hi Paul,

On Thursday 27 August 2015 09:51 AM, Lokesh Vutla wrote:
> Hi Paul,
> 
> On Thursday 23 July 2015 06:55 PM, Lokesh Vutla wrote:
>> This series implements lock and unlock functions for RTC and hooks
>> the same to DRA7 and AMx3xx hwmod.
>> This is dependent on the patch https://patchwork.kernel.org/patch/6578281/,
>> which is queued recently by Paul.
> Gentle ping on this series.
Do you have any comments on this series?

Thanks and regards,
Lokesh
> 
> Thanks and regards,
> Lokesh
>>
>> Changes since v2:
>> - Add kerneldoc for omap_hwmod_rtc_lock() function.
>>
>> Lokesh Vutla (3):
>>   ARM: hwmod: RTC: Add lock and unlock functions
>>   ARM: DRA7: RTC: Add lock and unlock functions
>>   ARM: AMx3xx: RTC: Add lock and unlock functions
>>
>>  arch/arm/mach-omap2/omap_hwmod.h   |  2 +
>>  .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c |  2 +
>>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c  |  2 +
>>  arch/arm/mach-omap2/omap_hwmod_reset.c | 65 
>> ++
>>  4 files changed, 71 insertions(+)
>>
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