From: Cyril Chemparathy cy...@ti.com
Date: Fri, 03 Sep 2010 14:20:47 -0400
Hi Kevin,
[...]
Although am3517 (omap) board support code has been updated as needed,
emac does not work on this platform.
Just to clarify... did EMAC work on AM3517 before this series?
No. It didn't work
From: Bernard Blackham bern...@largestprime.net
Date: Tue, 19 Oct 2010 10:16:39 +1100
The smsc95xx driver currently generates a new random MAC address
every time the interface is brought up. This makes it impossible to
override using the standard `ifconfig hw ether` approach.
Past patches
From: John Faith jfai...@gmail.com
Date: Mon, 1 Nov 2010 14:30:08 -0700
The SMSC911x supports 128 x 8-bit EEPROMs. Increase the EEPROM size
so more than just the MAC address can be stored.
Signed-off-by: John Faith jfai...@gmail.com
Applied.
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From: Jason Wang jason77.w...@gmail.com
Date: Thu, 23 Dec 2010 18:43:13 +0800
When kernel enters irqhanlder, it will check the Rx interrupt status
bit, if Rx status is set but can't call napi_schedule(), it will do
nothing and directly return form irqhandler. This situation is prone
to be
From: Tony Lindgren t...@atomide.com
Date: Thu, 15 Jan 2009 11:13:16 +0200
Could you please change the linux-omap git link to point to
kernel.org instead of source.mvista.com as discussed in the
thread below?
Done.
It will show up on the web site the next time the cron
jobs runs.
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From: Russell King - ARM Linux li...@arm.linux.org.uk
Date: Mon, 2 Feb 2009 21:39:53 +
The patch to fix these issues would seem to be relatively small (12
lines in the smc911x and one line change in board-ldp.c) - is it
something we want done for -rc4 or do we scrap the ethernet support
From: Russell King - ARM Linux li...@arm.linux.org.uk
Date: Tue, 10 Feb 2009 21:37:12 +
On Tue, Feb 10, 2009 at 01:02:02PM -0800, Tony Lindgren wrote:
Yeah, the smsc updates for omap might take a while longer to get going.
So here's my ack for this smc911x patch:
Acked-by: Tony
From: Piet Delaney [EMAIL PROTECTED]
Date: Mon, 08 Sep 2008 22:07:26 -0700
Wonder why the update_mmu_cache() for sun4c has to do so much more
work that sun4m.
Caches are virtually indexed and virtually tagged on sun4c, that's why.
Keep on wonderin'
Wonder why SPARC has to do more work that
From: Sebastien Jan s-...@ti.com
Date: Wed, 5 May 2010 20:45:52 +0200
CCR register contains information on companion eeprom availability.
Signed-off-by: Sebastien Jan s-...@ti.com
APplied.
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From: Sebastien Jan s-...@ti.com
Date: Wed, 5 May 2010 20:45:53 +0200
Low-level functions provide 16bits words read and write capability
to ks8851 companion eeprom.
Signed-off-by: Sebastien Jan s-...@ti.com
Applied.
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From: Sebastien Jan s-...@ti.com
Date: Wed, 5 May 2010 20:45:54 +0200
Accessing ks8851 companion eeprom permits modifying the ks8851 stored
MAC address.
Example how to change the MAC address using ethtool, to set the
01:23:45:67:89:AB MAC address:
$ echo 0:AB8976452301 | xxd -r mac.bin
From: Sebastien Jan s-...@ti.com
Date: Wed, 5 May 2010 20:45:55 +0200
A more elegant alternative to ethtool for updating the ks8851
MAC address stored on its companion eeprom.
Using this debugfs interface does not require any knowledge on the
ks8851 companion eeprom organization to update
From: Arce, Abraham x0066...@ti.com
Date: Tue, 25 May 2010 20:48:02 -0500
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index f8abf68..eb81f76 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -334,7 +334,7 @@ static void skb_release_data(struct sk_buff *skb)
if
From: Eric Dumazet eric.duma...@gmail.com
Date: Wed, 26 May 2010 22:48:53 +0200
Le mercredi 26 mai 2010 à 15:19 -0500, Arce, Abraham a écrit :
By increasing the allocation length of our rx skbuff the corruption issue is
fixed... I have increased it by 2... Were we writing outside our
From: Sebastien Jan s-...@ti.com
Date: Fri, 25 Jun 2010 16:20:36 +0200
Hi Steve,
Thanks for your answer.
On 06/25/2010 10:43 AM, steve.glendinn...@smsc.com wrote:
[...]
I can see you have a different use case, but I don't think this specific
driver is the place for this logic. I'd
From: Sonasath, Moiz m-sonas...@ti.com
Date: Mon, 6 Jul 2009 17:23:36 -0500
There seems to be a bug in the ioctl implementation in /kernel/net/core/dev.c
dev_ifsioc_locked()
case SIOCGIFMAP:
ifr-ifr_map.irq = dev-irq; // ?? type mismatch
Here
From: Pandita, Vikram vikram.pand...@ti.com
Date: Wed, 8 Jul 2009 02:27:51 +0530
On Zoom2 TI OMAP3 based board, the IRQ we are requesting is
value=381 and hence the problem reported.
The IRQ reported by this user call is only reliable for
ISA devices.
Or, ARM platforms could opt to use a
From: Eric Dumazet eric.duma...@gmail.com
Date: Wed, 02 Nov 2011 23:55:11 +0100
There is a problem with your kmalloc() or alignments on your architecture.
What is the SMP_CACHE_BYTES value ?
kmalloc() behavior doesn't have anything to do with this bug.
The issue is calculation of skb-end,
From: David Miller da...@davemloft.net
Date: Wed, 02 Nov 2011 19:09:55 -0400 (EDT)
From: Eric Dumazet eric.duma...@gmail.com
Date: Wed, 02 Nov 2011 23:55:11 +0100
There is a problem with your kmalloc() or alignments on your architecture.
What is the SMP_CACHE_BYTES value ?
kmalloc
c
The issue is calculation of skb-end, which is based upon calculated
'size' variable.
skb-end determines alignment of skb_shared_info, which is where the
alignment problem is occuring for Tony.
Right, and SMP_CACHE_BYTES setting should save us in any case.
For ARM, SMP_CACHE_BYTES seems
From: Tony Lindgren t...@atomide.com
Date: Wed, 2 Nov 2011 16:19:17 -0700
* David Miller da...@davemloft.net [02 15:42]:
c
The issue is calculation of skb-end, which is based upon calculated
'size' variable.
skb-end determines alignment of skb_shared_info, which is where
From: Tony Lindgren t...@atomide.com
Date: Wed, 2 Nov 2011 16:40:28 -0700
Subject: [PATCH] net: Add back alignment for size for __alloc_skb
Applied, thanks a lot!
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More
From: Mark A. Greer mgr...@animalcreek.com
Date: Fri, 20 Jul 2012 18:19:20 -0700
From: Mark A. Greer mgr...@animalcreek.com
This series fixes a compile error in, and adds pm_runtime support
to, the davinci_emac driver.
To test on a davinci platform, you will need another patch just
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 6 Aug 2012 20:35:56 +0530
This patch set adds support for device tree for Davinci MDIO driver and fixes
CPSW DT binding documentation to make it copy pastable to dts file.
This patch set is tested with the following git tree on AM335X Beagle
From: Kim, Milo milo@ti.com
Date: Mon, 2 Jul 2012 01:17:03 +
To remove warning messages about 'EXPORT_SYMBOL_GPL', include export header.
...
@@ -19,6 +19,7 @@
#include linux/err.h
#include linux/dma-mapping.h
#include linux/io.h
+#include linux/export.h
You aren't generating
Also, networking patches should always be CC:'d to net...@vger.kernel.org
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From: Robert Marklund robert.markl...@stericsson.com
Date: Thu, 24 Nov 2011 12:03:07 +0100
Add some basic regulator support for the power pins, as needed
by the ST-Ericsson Snowball platform that powers up the SMSC911
chip using an external regulator.
Platforms that use regulators and the
From: Benoit Cousson b-cous...@ti.com
Date: Mon, 13 Feb 2012 18:37:12 +0100
This fix a similar problem as in 72092cc45378176ba700034c91b7af2db524df26
and 481a8199142c050b72bff8a1956a49fd0a75bbe0 (can:
fix NOHZ local_softirq_pending 08 warning). This fix replaces netif_rx()
with netif_rx_ni()
From: Mugunthan V N mugunthan...@ti.com
Date: Thu, 15 Nov 2012 00:37:53 +0530
This patch-series adds support for,
[1/7]: Typo mistake in CPSW driver while invoking runtime_pm api's
[2/7]: Adds parent-child relation between CPSW MDIO module inside cpsw
driver, as in case of AM33XX,
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 27 Nov 2012 23:23:40 +0530
CC drivers/net/ethernet/ti/cpsw.o
drivers/net/ethernet/ti/cpsw.c: In function 'cpsw_ndo_ioctl':
drivers/net/ethernet/ti/cpsw.c:881:20: warning: unused variable 'priv'
The build warning is generated when
You cannot do this.
After your changes the driver no longer does any TX flow control.
It never stops the TX queue and never wakes it up later.
It just drops packets on the floor when it runs out of descriptors.
This breaks everything, and in particular packet schedulers and
TCP.
I'm not
From: David Miller da...@davemloft.net
Date: Tue, 11 Dec 2012 13:30:58 -0500 (EST)
You cannot do this.
After your changes the driver no longer does any TX flow control.
It never stops the TX queue and never wakes it up later.
It just drops packets on the floor when it runs out
From: Eric Dumazet erdnet...@gmail.com
Date: Tue, 11 Dec 2012 10:54:56 -0800
Suggested fix : add a TCQ_F_MQSLAVE flag to allow dequeue_skb() to test
the netif_xmit_frozen_or_stopped() status _before_ dequeing packet from
qdisc.
This sounds fine to me.
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From: Richard Cochran richardcoch...@gmail.com
Date: Fri, 14 Dec 2012 12:09:18 +0100
On Fri, Dec 14, 2012 at 10:55:56AM +0100, Koen Kooi wrote:
Op 14 dec. 2012, om 08:13 heeft Richard Cochran richardcoch...@gmail.com
het volgende geschreven:
On Thu, Dec 13, 2012 at 01:36:41PM -0800,
From: Richard Cochran richardcoch...@gmail.com
Date: Mon, 24 Dec 2012 08:19:08 +0100
Changed in v2:
Use clk_prepare_enable instead of clk_prepare + clk_enable.
The new cpts driver has two small issues, but it otherwise seems to be
working in -rc1.
Both applied, thanks.
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From: Mugunthan V N mugunthan...@ti.com
Date: Fri, 1 Feb 2013 00:33:20 +0530
diff --git a/Documentation/devicetree/bindings/net/cpsw.txt
b/Documentation/devicetree/bindings/net/cpsw.txt
index 6ddd028..99696bf 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 5 Feb 2013 23:56:46 +0530
CPSW is capable of filtering VLAN packets in hardware. This patch series
implements VLAN support to CPSW driver.
This patch series is tested on net-next with AM335x EVM with ping test.
Series applied.
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From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 12 Feb 2013 01:22:17 +0530
This patch series implements Dual EMAC mode implementation of CPSW
which acts as two standalone EMAC by segregating the switch using VIDs
and port VLAN
Mugunthan V N (3):
driver: net: ethernet: davinci_cpdma:
From: Mugunthan V N mugunthan...@ti.com
Date: Thu, 14 Feb 2013 23:56:46 +0530
+enum {
+ CPDMA_EOI_RX_THRESH = 0,
+ CPDMA_EOI_RX,
+ CPDMA_EOI_TX,
+ CPDMA_EOI_MISC,
+};
Do not use enumerations for hardware register values, which must be
exact, otherwise you are potentially
Also please indicate, clearly, what tree your patch is targetted at.
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From: Joe Perches j...@perches.com
Date: Fri, 15 Feb 2013 12:18:59 -0800
On Fri, 2013-02-15 at 15:05 -0500, David Miller wrote:
From: Mugunthan V N mugunthan...@ti.com
Date: Thu, 14 Feb 2013 23:56:46 +0530
+enum {
+ CPDMA_EOI_RX_THRESH = 0,
+ CPDMA_EOI_RX,
+ CPDMA_EOI_TX
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 18 Feb 2013 13:49:20 +0530
CPDMA interrupts are not properly acknowledged which leads to interrupt
storm, only cpdma interrupt 0 is acknowledged in Davinci CPDMA driver.
Changed cpdma_ctlr_eoi api to acknowledge 1 and 2 interrupts which are
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 12 Mar 2013 14:46:33 +0530
This patch serires implements the following features in CPSW driver
* get/set phy link settings
* interrupt pacing
* get phy id via ioctl cmd SIOCGMIIPHY
Changes from initial version
* Made active-slave common
From: Prabhakar Lad prabhakar.cse...@gmail.com
Date: Sat, 16 Mar 2013 12:43:14 +0530
Hi Mugunthan
Thanks for the patch!
On Fri, Mar 15, 2013 at 7:40 PM, Mugunthan V N mugunthan...@ti.com wrote:
Fix which was done in the following commit in cpsw driver has
to be taken forward to davinci
From: Mugunthan V N mugunthan...@ti.com
Date: Wed, 27 Mar 2013 15:28:07 +0530
@@ -179,7 +179,7 @@ cpdma_desc_pool_create(struct device *dev, u32 phys, u32
hw_addr,
} else {
pool-cpumap = dma_alloc_coherent(dev, size, pool-phys,
From: Mugunthan V N mugunthan...@ti.com
Date: Wed, 27 Mar 2013 20:11:58 +0530
This patch series improves network performance of TI CPSW and Davinci EMAC
drivers during bulk transfer. During heavy Tx load CPDMA may run out of
descriptors and tx queue is stopped. When it descriptors are
You really need to CC: net...@vger.kernel.org rather than me explicitly
on this patch set.
Thanks.
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From: Kishon Vijay Abraham I kis...@ti.com
Date: Wed, 3 Apr 2013 11:29:53 +0530
Hi,
On Friday 29 March 2013 12:01 AM, David Miller wrote:
You really need to CC: net...@vger.kernel.org rather than me
explicitly
on this patch set.
I was CC'ing whatever get_maintainer shows. I'll make
From: Kishon Vijay Abraham I kis...@ti.com
Date: Wed, 3 Apr 2013 12:05:30 +0530
This patch series is about drivers/phy which will be used for now by
usb, sata and maybe some video PHY's. Network itself has a
comprehensive PHY in drivers/net/phy which we'd like to merge it with
drivers/phy so
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 15 Apr 2013 23:01:28 +0530
Dual EMAC slave VLAN id must be got from slave node instead of cpsw node as
VLAN id for each slave will be different.
Reported-by: Mark Jackson mpfj-l...@mimc.co.uk
Signed-off-by: Mugunthan V N mugunthan...@ti.com
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 22 Apr 2013 23:50:36 +0530
In earlier case phy fixup are added in board file as this is no more the case
so adding support for phy register fixup in Device Tree
Signed-off-by: Mugunthan V N mugunthan...@ti.com
When people put a series of
From: Sebastian Andrzej Siewior bige...@linutronix.de
Date: Fri, 26 Apr 2013 14:03:24 +0200
David, how did this happen? The patch I've sent
http://www.spinics.net/lists/netdev/msg234240.html
adds this to the probe function, according to the net-next tree it was
added to
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 30 Apr 2013 14:57:28 +0530
With the commit a11fbba (net/cpsw: fix irq_disable() with threaded interrupts)
from Sebastian Siewior, a kernel warning is generated as below. This warning
is generated as the irq_enabled is not initialized for the
Please read:
http://marc.info/?l=linux-netdevm=136730964130303w=2
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From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 21 May 2013 15:24:58 +0530
+ priv-pins_default = pinctrl_lookup_state(priv-pinctrl,
+ PINCTRL_STATE_DEFAULT);
This is not indented correctly.
Argument on the second, and subsequent,
From: Hebbar, Gururaja gururaja.heb...@ti.com
Date: Thu, 23 May 2013 11:28:38 +
On Thu, May 23, 2013 at 12:27:41, David Miller wrote:
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 21 May 2013 15:24:58 +0530
+ priv-pins_default = pinctrl_lookup_state(priv-pinctrl
From: Mugunthan V N mugunthan...@ti.com
Date: Thu, 23 May 2013 18:00:23 +0530
From: Hebbar Gururaja gururaja.heb...@ti.com
Amend cpsw controller to optionally take a pin control handle and set
the state of the pins to:
- default on boot, resume
- sleep on suspend()
This should make it
From: Mugunthan V N mugunthan...@ti.com
Date: Thu, 30 May 2013 11:52:01 +0530
Additional 4 bytes found in the skb is the CRC calculated by the
CPDMA hardware, check the CRC bit in CPDMA status field of
Descriptor and remove the CRC length from the skb. This extra
4 byte can be seen when
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 4 Jun 2013 11:40:03 +0530
This patch series adds the following feature
* Atheros phy driver code cleanup
* Add AT8031 phy driver to at803x driver
* Add RGMII tx delay support via phy_if
* Add phy_if DT enhancement to CPSW Driver and DT
From: Linus Walleij linus.wall...@linaro.org
Date: Fri, 7 Jun 2013 09:31:58 +0200
On Thu, Jun 6, 2013 at 10:50 AM, Mark Brown broo...@kernel.org wrote:
On Thu, Jun 06, 2013 at 11:29:39AM +0530, Mugunthan V N wrote:
On 6/6/2013 12:53 AM, Mark Brown wrote:
Linus Walleij posted some patches
From: Linus Walleij linus.wall...@linaro.org
Date: Mon, 10 Jun 2013 17:48:16 +0200
On Fri, Jun 7, 2013 at 4:49 PM, Mugunthan V N mugunthan...@ti.com wrote:
If you want to merge the direct networking parts of this series into
another tree, I'm fine with that:
Acked-by: David S. Miller
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 11 Jun 2013 15:32:03 +0530
This patch series fixes the following issues with Davinci MDIO
* Bring up MDIO driver earlier than Ethernet driver so that ethernet driver
can communicate with the phy as soon as it is resumed.
* On suspend/resume
From: Mugunthan V N mugunthan...@ti.com
Date: Fri, 19 Jul 2013 19:37:21 +0530
Add support to show CPSW hardware statistics to user via ethtool get_regs
ops so user can find if there were any error reported or the system is
over loaded duing hagh data rate transfer.
Signed-off-by: Mugunthan
From: Mugunthan V N mugunthan...@ti.com
Date: Tue, 23 Jul 2013 15:38:17 +0530
Add support to show CPSW hardware statistics to user via ethtool
so user can find if there were any error reported by hardware or
the system is over loaded duing high data rate transfer.
Signed-off-by: Mugunthan V
From: Mugunthan V N mugunthan...@ti.com
Date: Wed, 31 Jul 2013 17:42:26 +0530
The new IP version has a minor changes and the offsets are same as the
previous
version, so instead of adding CPSW version number in the driver, make the
driver
to fall through to the latest versions so that the
From: Felipe Balbi ba...@ti.com
Date: Fri, 2 Aug 2013 10:44:10 +0300
IRQF_DISABLED is a no-op by now and should be
removed.
Signed-off-by: Felipe Balbi ba...@ti.com
Applied.
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From: Mugunthan V N mugunthan...@ti.com
Date: Sat, 3 Aug 2013 16:39:45 +0530
IRQF_DISABLED is a no-op by now and should be removed.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Applied, thanks.
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From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 5 Aug 2013 17:30:05 +0530
The new IP version has a minor changes and the offsets are same as the
previous version, so adding new IP version support in the driver.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Reviewed-by: Felipe Balbi
Patch #3 doesn't apply to net-next because it makes changes to
a file include/linux/platform_data/cpsw.h which doesn't exist.
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From: Mugunthan V N mugunthan...@ti.com
Date: Sat, 21 Sep 2013 00:50:37 +0530
This patch series adds the support for configuring GMII_SEL register
of control module to select the phy mode type and also to configure
the clock source for RMII phy mode whether to use internal clock or
the
From: Mugunthan V N mugunthan...@ti.com
Date: Sun, 20 Oct 2013 12:32:26 +0530
When interrupt pacing is enabled, receive/transmit statistics are not
updated properly by hardware which leads to ISR return with IRQ_NONE
and inturn kernel disables the interrupt. This patch removed the checking
of
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 2 Dec 2013 12:53:39 +0530
When only one port of the two port is pinned out, then dt probe is failing
because second port phy is not found. fixing this by checking the number of
slaves and breaking the loop.
Signed-off-by: Mugunthan V N
From: Tony Lindgren t...@atomide.com
Date: Tue, 3 Dec 2013 15:13:02 -0800
When booted with device tree, we may still have platform data passed
as auxdata. For am3517 this is needed for passing the interrupt_enable
and interrupt_disable callbacks that access the omap system control module
From: Mugunthan V N mugunthan...@ti.com
Date: Fri, 6 Dec 2013 12:28:27 +0530
From: George Cherian george.cher...@ti.com
Use netdev_name while requesting irq so that eth* name is shown
in /proc/interrupts. Previously it was showing device name as (null)
for cpsw interrupts. For using
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 9 Dec 2013 14:59:05 +0530
commit 50a5fb068
This commit doesn't appear in any tree.
And any change which makes a real struct device return NULL
for dev_name() is broken.
I'm not applying this patch, you have completely failed to
provide any
From: Olof Johansson o...@lixom.net
Date: Wed, 11 Dec 2013 15:51:20 -0800
Silences the below warnings when building with ARM_LPAE enabled, which
gives longer dma_addr_t by default:
drivers/net/ethernet/ti/davinci_cpdma.c: In function 'cpdma_desc_pool_create':
From: Olof Johansson o...@lixom.net
Date: Wed, 11 Dec 2013 15:58:07 -0800
Minor fix for printk format of a phys_addr_t, and the switch of two local
functions to static since they're not used outside of the file.
Signed-off-by: Olof Johansson o...@lixom.net
Applied.
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From: Olof Johansson o...@lixom.net
Date: Wed, 11 Dec 2013 15:51:21 -0800
Only used locally. Found by sparse.
Signed-off-by: Olof Johansson o...@lixom.net
Applied.
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From: Felipe Balbi ba...@ti.com
Date: Wed, 11 Dec 2013 22:09:05 -0600
From: Mugunthan V N mugunthan...@ti.com
When CPSW and Davinci MDIO are build as modules, CPSW crashes when
accessing CPSW registers in CPSW probe. The same is working in built-in
as the CPSW clocks are enabled in Davindi
From: Mugunthan V N mugunthan...@ti.com
Date: Fri, 13 Dec 2013 14:35:27 +0530
During checking the interrupts with cat /proc/interrupts, it is showing
device name as (null), this change was done with commit id aa1a15e2d where
request_irq is changed to devm_request_irq also changing the irq name
From: Mugunthan V N mugunthan...@ti.com
Date: Fri, 13 Dec 2013 18:42:55 +0530
This patch adds support for enabling In Band mode in 10 mbps speed.
RGMII supports 1 Gig and 100 mbps mode for Forced mode of operation.
For 10mbps mode it should be configured to in band mode so that link
status,
From: Mugunthan V N mugunthan...@ti.com
Date: Wed, 18 Dec 2013 21:33:50 +0530
During checking the interrupts with cat /proc/interrupts, it is showing
device name as (null), this change was done with commit id aa1a15e2d where
request_irq is changed to devm_request_irq also changing the irq name
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 20 Jan 2014 17:38:38 +0530
+ if (!enable ((priv-slaves[0].ndev-flags IFF_PROMISC) ||
+ (priv-slaves[1].ndev-flags IFF_PROMISC))) {
This assumption that there are exactly 2 slaves is not valid.
Use
From: Mugunthan V N mugunthan...@ti.com
Date: Thu, 23 Jan 2014 00:03:12 +0530
Enable promiscuous mode support for CPSW.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Applied, thanks.
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From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 3 Mar 2014 16:19:06 +0530
From: Schuyler Patton spat...@ti.com
This patch fixes a CPDMA RX Descriptor leak that occurs after taking
the interface down when the CPSW is in Dual MAC mode. Previously
the CPSW_ALE port was left open up which
From: Nishanth Menon n...@ti.com
Date: Fri, 21 Mar 2014 01:52:48 -0500
Few platforms use external regulator to keep the ethernet MAC supplied.
So, request and enable the regulator for driver functionality.
Fixes: 66fda75f47dc (regulator: core: Replace direct ops-disable usage)
Reported-by:
From: George Cherian george.cher...@ti.com
Date: Fri, 2 May 2014 12:01:58 +0530
The series adds CPTS support for AM4372.
Patch 1 - DT changes w.r.t clock changes for AM33xx.
Patch 2 - CPTS clock name harcoding in the driver is removed.
Easier to pass the clock name from dt rather
From: Markus Pargmann m...@pengutronix.de
Date: Sun, 28 Sep 2014 18:59:14 +0200
This is a resend of v6 of this series. I added the Acked-by of Tony Lindgren
for patch 5/7. There are no other changes.
This series adds support to the cpsw driver to read the MACIDs of the am335x
chip and use
From: Markus Pargmann m...@pengutronix.de
Date: Mon, 29 Sep 2014 08:53:12 +0200
Another resend of this series to add the netdev list.
This series adds support to the cpsw driver to read the MACIDs of the am335x
chip and use them as fallback. These addresses are only used if there are no
mac
From: Tony Lindgren t...@atomide.com
Date: Mon, 27 Oct 2014 13:25:56 -0700
+/**
+ * of_try_set_control_gpio - configure a gpio if it exists
+ */
+static int try_toggle_control_gpio(struct device *dev,
+struct gpio_desc **desc,
+
From: Lokesh Vutla lokeshvu...@ti.com
Date: Thu, 4 Dec 2014 10:24:29 +0530
CPSW is present in AM33xx, AM43xx, DRA7xx.
Updating the Kconfig to depend on ARCH_OMAP2PLUS instead of listing
all SoC's.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Applied to net-next, thanks.
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From: Felipe Balbi ba...@ti.com
Date: Fri, 2 Jan 2015 12:10:24 -0600
In any case, patch 1 should go in during the -rc an get backported
all the way back to v3.9, while the other patches can (should) be
delayed for v3.20 merge window.
If that's what you want, the way you submitted these
From: Felipe Balbi ba...@ti.com
Date: Fri, 2 Jan 2015 15:53:35 -0600
On Fri, Jan 02, 2015 at 04:45:36PM -0500, David Miller wrote:
You should instead submit patch #1 all by itself, correctly targetting
'net'.
Then, after the next time I merge 'net' into 'net-next', you can submit
the rest
From: Felipe Balbi ba...@ti.com
Date: Thu, 15 Jan 2015 09:20:53 -0600
On Thu, Jan 15, 2015 at 01:19:16PM +0530, Mugunthan V N wrote:
On Wednesday 14 January 2015 10:28 PM, Felipe Balbi wrote:
CPSW never uses RX_THRESHOLD or MISC interrupts. In
fact, they are always kept masked in their
From: Felipe Balbi ba...@ti.com
Date: Thu, 15 Jan 2015 19:28:52 -0600
On Thu, Jan 15, 2015 at 06:16:15PM -0500, David Miller wrote:
Indeed, I agree that adding something as a placeholder that just gets
immediately removed should be avoided unless it is extremely difficult
to do so.
what
From: Tony Lindgren t...@atomide.com
Date: Thu, 15 Jan 2015 14:45:08 -0800
Here's a repost of the fixes for davinci_emac with patches
updated for comments and acks collected.
Series applied, thanks Tony.
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From: Felipe Balbi ba...@ti.com
Date: Fri, 16 Jan 2015 10:11:11 -0600
This patch is in preparation for a nicer IRQ
handling scheme where we use different IRQ
handlers for each IRQ line (as it should be).
Later, we will also drop IRQs offset 0 and 3
because they are always disabled in this
From: Felipe Balbi ba...@ti.com
Date: Fri, 16 Jan 2015 10:11:12 -0600
CPSW never uses RX_THRESHOLD or MISC interrupts. In
fact, they are always kept masked in their appropriate
IRQ Enable register.
Instead of allocating an IRQ that never fires, it's best
to remove that code altogether and
From: Felipe Balbi ba...@ti.com
Date: Mon, 19 Jan 2015 08:40:17 -0600
On Sun, Jan 18, 2015 at 01:07:50AM -0500, David Miller wrote:
From: Felipe Balbi ba...@ti.com
Date: Fri, 16 Jan 2015 10:11:12 -0600
CPSW never uses RX_THRESHOLD or MISC interrupts. In
fact, they are always kept masked
From: Felipe Balbi ba...@ti.com
Date: Mon, 19 Jan 2015 11:52:36 -0600
Commit c03abd84634d (net: ethernet: cpsw: don't requests IRQs we don't
use) left one build breakage when NET_POLL_CONTROLLER is enabled.
Fix this build break by referring to the correct irqs_table array.
Fixes:
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