Please ignore this patch. This is the same as the previous one.
From: ext Hiroshi DOYU [EMAIL PROTECTED]
Subject: [PATCH 2/4] ARM: OMAP: IOMMU driver: VMA management
Date: Mon, 8 Sep 2008 08:56:32 +0300
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When git kernel tree is used on a OMAP3EVM board file for touch screen
testing, it shows lot of jitter. With this patch the jitter can be
reduced.
Signed-off-by: Naveen Atmakuri [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-omap3evm.c | 10 ++
1 files changed, 10 insertions(+), 0
ext Paul Walmsley [EMAIL PROTECTED] writes:
Hello Tero,
On Wed, 27 Aug 2008, Tero Kristo wrote:
Target states for each powerdomain can now be set via sysfs interface.
E.g. echo 0 /sys/power/suspend/mpu_pwrdm will program MPU suspend
state to be OFF.
Is this all debugging code, or is
Hi Richard,
From: ext Woodruff, Richard [EMAIL PROTECTED]
Subject: RE: [PATCH 1/1] Use pmd_table() MACRO for unmap_area_sections()
Date: Sun, 7 Sep 2008 21:04:56 -0500
From: [EMAIL PROTECTED] [mailto:linux-omap-
[EMAIL PROTECTED] On Behalf Of Russell King - ARM Linux
Well, the first
Signed-off-by: Jarkko Nikula [EMAIL PROTECTED]
---
sound/soc/omap/omap-mcbsp.c | 95 ++
1 files changed, 77 insertions(+), 18 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index 35310e1..a217cf2 100644
---
Here is second version of patch adding support for 2430 in McBSP driver.
Updated version uses phys_base instead of virt_base. See following commits from
Russell King:
ecec3b3e080464cc1b4e792cf4d8e7e89d50b011
2cfd6fcda3b8c6ee7a5fa9a4573e3246532a0716
Second patch is the same than first version.
Signed-off-by: Jarkko Nikula [EMAIL PROTECTED]
---
arch/arm/mach-omap2/mcbsp.c | 73 ++
arch/arm/plat-omap/include/mach/mcbsp.h |3 +
2 files changed, 66 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c
- Original Message -
From: Tony Lindgren [EMAIL PROTECTED]
To: Madhusudhan Chikkature [EMAIL PROTECTED]
Cc: Felipe Balbi [EMAIL PROTECTED]; linux-omap@vger.kernel.org; Felipe
Balbi [EMAIL PROTECTED]
Sent: Friday, September 05, 2008 11:29 PM
Subject: Re: [PATCH 32/33] add omap 1-wire
A shadow register change has no direct effect on the display
configuration until the GOLCD (DISPC_CONTROL[5]) is set.
Signed-off-by: Arun C [EMAIL PROTECTED]
---
drivers/video/omap/dispc.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap/dispc.c
Hello,
I read that the mmc has 3 clocks: fixed functional clock (MMCi_FCLK),
interface clock (MMCi_ICLK) and debounce clock (MMCi_32).
But, when I look in clock34xx.h, I can only see two of those - there
is the mmchs_fck and mmchs_ick. There is no struct clk for the
debounce clock. Only when I
On Mon, Sep 8, 2008 at 4:49 AM, Woodruff, Richard [EMAIL PROTECTED] wrote:
I believe the driver now calls this via its platform data in
arch/arm/mach-omap2/. Same sequence but now a bit more generalized from the
external driver point of view.
Thank you, I will look into it
Budhee
Hi,
The usage in TI kernels has varied a bit. Some times they are just
load and lock TLB's, for others table walking can be enabled. In
all cases if a table walk miss happens it is fatal and the IP block
device will have to be reset.
In *theory*, from this IOMMU hardware perspective,
ES version definitions were incorrect, also GP/EMU/SEC etc. types were not
detected at all.
Signed-off-by: Tero Kristo [EMAIL PROTECTED]
---
arch/arm/mach-omap2/id.c |9 -
arch/arm/plat-omap/include/mach/cpu.h |2 +-
2 files changed, 9 insertions(+), 2 deletions(-)
ES version definitions were incorrect, also GP/EMU/SEC etc. types were not
detected at all.
Signed-off-by: Tero Kristo [EMAIL PROTECTED]
---
arch/arm/mach-omap2/id.c |11 +--
arch/arm/plat-omap/include/mach/cpu.h |2 +-
2 files changed, 9 insertions(+), 2
From: Vimal Singh [EMAIL PROTECTED]
Following patch taken over the omapzoom.org tree adds
prefetch and DMA support to the OMAP2/3 nand driver.
Signed-off-by: Vimal Singh [EMAIL PROTECTED]
Signed-off-by: Nishant Kamat [EMAIL PROTECTED]
---
arch/arm/mach-omap2/gpmc.c | 95
From: Vimal Singh [EMAIL PROTECTED]
Following patch taken over the omapzoom.org tree adds
prefetch and DMA support to the OMAP2/3 nand driver.
Signed-off-by: Vimal Singh [EMAIL PROTECTED]
Signed-off-by: Nishant Kamat [EMAIL PROTECTED]
---
arch/arm/mach-omap2/gpmc.c | 95
From: Vimal Singh [EMAIL PROTECTED]
Following patch taken over the omapzoom.org tree adds
synchronous burst read support to the OMAP2/3 onenand driver.
Signed-off-by: Vimal Singh [EMAIL PROTECTED]
Signed-off-by: Nishant Kamat [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-3430sdp-flash.c |
On Mon, Sep 08, 2008 at 01:03:35PM -0500, [EMAIL PROTECTED] wrote:
+#ifdef CONFIG_MTD_NAND_OMAP_PREFETCH
+ static int use_prefetch = 1;
+
+ /* modprobe ... use_prefetch=0 etc */
+ module_param(use_prefetch, bool, 0);
+ MODULE_PARM_DESC(use_prefetch, enable/disable use of
On Mon, Sep 8, 2008 at 2:56 AM, Mark Brown [EMAIL PROTECTED] wrote:
On Sat, Sep 06, 2008 at 11:41:42PM -0700, [EMAIL PROTECTED] wrote:
+
+config SND_SOC_TWL4030
+ tristate
+ depends on SND_SOC I2C
+
Sorry, didn't notice earlier: this should depend on whatever the config
option
On Wednesday 13 August 2008, Madhusudhan Chikkature wrote:
A better way to do this would be to let the boards say exactly
what the hardware configuration is, rather than requiring all
OMAP3 boards to be set up exactly like the SDP...
I think the initial version was written specific to SDP.
arun c [EMAIL PROTECTED] writes:
A shadow register change has no direct effect on the display
configuration until the GOLCD (DISPC_CONTROL[5]) is set.
Signed-off-by: Arun C [EMAIL PROTECTED]
---
drivers/video/omap/dispc.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
From: Steve Sakoman [EMAIL PROTECTED]
Signed-off-by: Steve Sakoman [EMAIL PROTECTED]
Acked-by: Mark Brown [EMAIL PROTECTED]
---
sound/soc/codecs/Kconfig |5 +
sound/soc/codecs/Makefile |2 +
sound/soc/codecs/twl4030.c | 653
On Monday 08 September 2008, Kamat, Nishant wrote:
- while (len--)
- *p++ = cpu_to_le16(readw(info-nand.IO_ADDR_R));
+ if (use_prefetch) {
Em, clearly this does not go on top of the NAND patch I
sent recently ... please do that instead, so we don't
need to repeat the
On Monday 08 September 2008, Russell King - ARM Linux wrote:
- while (len--)
- *p++ = cpu_to_le16(readw(info-nand.IO_ADDR_R));
This driver needs work (see endianness explaination below.)
Already done, but this patch doesn't build on that patch...
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On Monday 08 September 2008, Kamat, Nishant wrote:
+config MTD_NAND_OMAP_PREFETCH
+ bool GPMC prefetch support for NAND Flash device
+ depends on MTD_NAND MTD_NAND_OMAP2
+ default n
+ help
+ The NAND device can be accessed for Read/Write using GPMC PREFETCH
* Jarkko Nikula [EMAIL PROTECTED] [080908 03:30]:
Here is second version of patch adding support for 2430 in McBSP driver.
Updated version uses phys_base instead of virt_base. See following commits
from Russell King:
ecec3b3e080464cc1b4e792cf4d8e7e89d50b011
* Steve Sakoman [EMAIL PROTECTED] [080908 11:16]:
On Mon, Sep 8, 2008 at 2:56 AM, Mark Brown [EMAIL PROTECTED] wrote:
On Sat, Sep 06, 2008 at 11:41:42PM -0700, [EMAIL PROTECTED] wrote:
+
+config SND_SOC_TWL4030
+ tristate
+ depends on SND_SOC I2C
+
Sorry, didn't notice
* Felipe Balbi [EMAIL PROTECTED] [080831 14:54]:
On Sun, Aug 31, 2008 at 02:19:05PM -0700, David Brownell wrote:
From: David Brownell [EMAIL PROTECTED]
Minor updates to the OMAP{2,3} NAND driver:
- Rename those buffer PIO routines as *_buf16()
- Get rid of pointless LE16 data
From: Piet Delaney [EMAIL PROTECTED]
Date: Mon, 08 Sep 2008 22:07:26 -0700
Wonder why the update_mmu_cache() for sun4c has to do so much more
work that sun4m.
Caches are virtually indexed and virtually tagged on sun4c, that's why.
Keep on wonderin'
Wonder why SPARC has to do more work that
Hello Rajendra, one more comment from me...
ext Rajendra Nayak [EMAIL PROTECTED] writes:
struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
Index: linux-omap-2.6/arch/arm/mach-omap2/pm34xx.c
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