Hi,
On 4/27/2011 8:45 AM, Grazvydas Ignotas wrote:
Brian,
did you really intend to remove badblockbits? Maybe it should go back
to nand_base.c?
No, I had no intention of the sorts! It surely should not have been
removed in the first place. I will ack a patch to revert it, or next
time I'm
On 4/29/2011 10:44 AM, Artem Bityutskiy wrote:
On Fri, 2011-04-29 at 19:52 +0530, Saxena, Parth wrote:
-Original Message-
From: Artem Bityutskiy [mailto:dedeki...@gmail.com]
Sent: Thursday, April 28, 2011 11:01 PM
To: Saxena, Parth; Brian Norris
Cc: linux-...@lists.infradead.org
On Tue, Nov 29, 2011 at 1:00 AM, Jan Weitzel j.weit...@phytec.de wrote:
Options from struct omap_nand_platform_data are not used.
Apply options after nand_scan_ident to avoid overwrite due to
NAND_CHIPOPTIONS_MSK.
So you can pass options from platformcode
Just to clarify, were the
On Fri, Dec 2, 2011 at 2:20 AM, Grazvydas Ignotas nota...@gmail.com wrote:
On Thu, Dec 1, 2011 at 10:42 AM, Artem Bityutskiy dedeki...@gmail.com wrote:
On Tue, 2011-11-29 at 10:00 +0100, Jan Weitzel wrote:
Signed-off-by: Jan Weitzel j.weit...@phytec.de
Pushed to l2-mtd-2.6.git, thank you!
Hi,
On Mon, Jan 23, 2012 at 12:12 AM, Shubhrajyoti D shubhrajy...@ti.com wrote:
...
include/linux/mtd/mtd.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 1a81fde..c717bb6 100644
---
On Tue, Jan 24, 2012 at 1:06 AM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Jan 24, 2012 at 12:09:04AM -0800, Brian Norris wrote:
However, the bug made it into the 3.3 merge window, so shouldn't this
bugfix be sent upstream immediately?
David is the MTD maintainer
On Mon, Jan 23, 2012 at 12:12 AM, Shubhrajyoti D shubhrajy...@ti.com wrote:
This patch intends to fix the null pointer access.
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
drivers/mtd/mtdcore.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git
On Tue, Aug 20, 2013 at 7:02 AM, Artem Bityutskiy dedeki...@gmail.com wrote:
On Tue, 2013-08-20 at 13:20 +, Gupta, Pekon wrote:
Hi Artem, Brian,
I'll try to go through old e-mails now, and especially ubi/ubifs ones,
including yours, and I'll let Brian handle your patches, if I can? :-)
On Sun, Jul 14, 2013 at 02:24:49AM +0530, Pekon Gupta wrote:
ECC scheme on NAND devices can be implemented in multiple ways.Some using
Software algorithm, while others using in-build Hardware engines.
omap2-nand driver currently supports following flavours of ECC schemes.
Hi Pekon,
I don't think I will take this series (at least not yet), because of the
device-tree ABI breakage.
On Sun, Jul 14, 2013 at 02:24:47AM +0530, Pekon Gupta wrote:
Changes v4 - v5
- Rebased to linux-next
IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous version
On Wed, Sep 25, 2013 at 08:46:19AM -0500, Felipe Balbi wrote:
+ akpm
On Tue, Sep 24, 2013 at 01:04:05PM -0500, Gupta, Pekon wrote:
This patch
- updates DT binding for selection of ecc-scheme
- updates DT binding for detection of ELM h/w engine
- removes following obselete
Hi Pekon,
On Wed, Sep 25, 2013 at 08:46:19AM -0500, Felipe Balbi wrote:
+ akpm
On Tue, Sep 24, 2013 at 01:04:05PM -0500, Gupta, Pekon wrote:
This patch
- updates DT binding for selection of ecc-scheme
- updates DT binding for detection of ELM h/w engine
- removes following
On Thu, Sep 12, 2013 at 05:20:16PM +0530, Pekon Gupta wrote:
OMAP NAND driver support multiple ECC scheme, which can used in following
different flavours, depending on in-build Hardware engines supported by SoC.
+---+---+---+
| ECC
Hi Pekon,
On Thu, Sep 12, 2013 at 05:20:17PM +0530, Pekon Gupta wrote:
OMAP NAND driver support multiple ECC scheme, which can used in following
different flavours, depending on in-build Hardware engines supported by SoC.
BTW, I'll elaborate on a few things that are hidden in the noise here.
On Thu, Sep 12, 2013 at 05:20:17PM +0530, Pekon Gupta wrote:
OMAP NAND driver support multiple ECC scheme, which can used in following
different flavours, depending on in-build Hardware engines supported by SoC.
...
This
On Thu, Sep 12, 2013 at 05:20:18PM +0530, Pekon Gupta wrote:
This patch adds following two flavours of BCH4 ECC scheme in omap2-nand driver
- OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
- uses GPMC H/W engine for calculating ECC.
- uses software library (lib/bch.h nand_bch.h) for error
On Thu, Sep 12, 2013 at 05:20:19PM +0530, Pekon Gupta wrote:
DT property values for OMAP based gpmc-nand have been updated
to match changes in commit:
6faf096 ARM: OMAP2+: cleaned-up DT support of various ECC schemes
Whose commit ID is this? Your patch is not merged yet, so don't use a
On Wed, Sep 25, 2013 at 07:24:26PM +, Gupta, Pekon wrote:
On Wed, Sep 25, 2013 at 08:46:19AM -0500, Felipe Balbi wrote:
+ akpm
On Tue, Sep 24, 2013 at 01:04:05PM -0500, Gupta, Pekon wrote:
[snip]
Dear Olof and other DT Maintainers,
This patch series has missed
On Wed, Sep 25, 2013 at 01:33:27PM -0700, Olof Johansson wrote:
On Wed, Sep 25, 2013 at 1:05 PM, Brian Norris
computersforpe...@gmail.com wrote:
Olof has given good advice on your DT binding and has (slowly) been
responding to other requests for DT review that make it to his list. I
see
On Wed, Sep 25, 2013 at 2:32 PM, Olof Johansson o...@lixom.net wrote:
On Wed, Sep 25, 2013 at 2:29 PM, Brian Norris
computersforpe...@gmail.com wrote:
On Wed, Sep 25, 2013 at 01:33:27PM -0700, Olof Johansson wrote:
On Wed, Sep 25, 2013 at 1:05 PM, Brian Norris
computersforpe...@gmail.com
[I see Mark made some of the same comments while I was typing this
email]
On Thu, Sep 26, 2013 at 06:08:42AM +, Gupta, Pekon wrote:
From: Rob Herring [mailto:robherri...@gmail.com]
From: Pekon Gupta [mailto:pe...@ti.com]
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
Hi Pekon,
On Fri, Oct 11, 2013 at 07:06:43PM +0530, Pekon Gupta wrote:
Managed Device Resource or devm_xx calls takes care of automatic freeing
of the resource in case of:
- failure during driver probe
- failure during resource allocation
- detaching or unloading of driver module (rmmod)
On Fri, Oct 11, 2013 at 11:28 AM, Tony Lindgren t...@atomide.com wrote:
* Brian Norris computersforpe...@gmail.com [131011 11:23]:
Hi Pekon,
On Fri, Oct 11, 2013 at 07:06:43PM +0530, Pekon Gupta wrote:
Managed Device Resource or devm_xx calls takes care of automatic freeing
of the resource
On Fri, Oct 11, 2013 at 07:06:40PM +0530, Pekon Gupta wrote:
OMAP NAND driver support multiple ECC scheme, which can used in following
different flavours, depending on in-build Hardware engines supported by SoC.
+---+---+---+
| ECC
On Fri, Oct 11, 2013 at 07:06:41PM +0530, Pekon Gupta wrote:
This patch adds following two flavours of BCH4 ECC scheme in omap2-nand driver
- OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
- uses GPMC H/W engine for calculating ECC.
- uses software library (lib/bch.h nand_bch.h) for error
Hi Pekon,
I will try to summarize the standing of your patch series.
Patches 1 and 2 look good and have addressed all of the DT maintainers'
comments, AFAICT. They are ready to go in, except that the following
patches are not ready; they should probably go in together.
You ignored most of my
On Fri, Oct 11, 2013 at 2:46 PM, Tony Lindgren t...@atomide.com wrote:
* Brian Norris computersforpe...@gmail.com [131011 12:35]:
On Fri, Oct 11, 2013 at 11:28 AM, Tony Lindgren t...@atomide.com wrote:
FYI, the .dts changes should be queued separately by Benoit to avoid
pointless merge
Hi Pekon,
On 10/12/2013 03:26 PM, Gupta, Pekon wrote:
I will try to summarize the standing of your patch series.
Patches 1 and 2 look good and have addressed all of the DT maintainers'
comments, AFAICT. They are ready to go in, except that the following
patches are not ready; they should
Hi Pekon,
On 10/12/2013 04:58 PM, Gupta, Pekon wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Fri, Oct 11, 2013 at 07:06:40PM +0530, Pekon Gupta wrote:
[...]
Why do you even need the #ifdef's for the #include's? It is not harmful
to include headers for stuff that is only
Hi Pekon,
On Tue, Oct 15, 2013 at 11:19:51AM +0530, Pekon Gupta wrote:
This patch updates following in omap_nand_probe() and omap_nand_remove()
- replaces info-nand with nand_chip (struct nand_chip *nand_chip)
- replaces info-mtd with mtd (struct mtd_info *mtd)
- white-space and formatting
On Tue, Oct 15, 2013 at 11:19:52AM +0530, Pekon Gupta wrote:
Autodetection of NAND device bus-width was added in generic NAND driver as
part of following commit
commit 64b37b2a63eb2f80b65c7185f0013f8ffc637ae3
Author: Matthieu CASTET matthieu.cas...@parrot.com
AuthorDate:
On Tue, Oct 15, 2013 at 11:19:53AM +0530, Pekon Gupta wrote:
current implementation in omap3_init_bch() has some redundant code like:
(1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w
engine on SoC. And based on that it selects implemetation of ecc-scheme.
On Tue, Oct 15, 2013 at 11:19:54AM +0530, Pekon Gupta wrote:
In current implementation omap3_init_bch_tail() is a common function to
define ecc layout for different BCHx ecc schemes.This patch:
(1) removes omap3_init_bch_tail() and defines ecc layout for individual
ecc-schemes along with
+ Ivan, as he has touched this stuff before
On Tue, Oct 15, 2013 at 11:19:55AM +0530, Pekon Gupta wrote:
generic frame-work in mtd/nand/nand_bch.c is a wrapper above lib/bch.h which
encapsulates all control information specific to BCH ecc algorithm in
software.
Thus this patch:
(1) replace
On Tue, Oct 15, 2013 at 11:19:57AM +0530, Pekon Gupta wrote:
Managed Device Resource or devm_xx calls takes care of automatic freeing
of the resource in case of:
- failure during driver probe
- failure during resource allocation
- detaching or unloading of driver module (rmmod)
Reference:
Hi,
On Tue, Oct 15, 2013 at 11:19:48AM +0530, Pekon Gupta wrote:
*changes v8 - v9*
[PATCH 1/9] no update from [PATCH v8 1/6]
[PATCH 2/9] only commit log updated from [PATCH v8 2/6]
As per feedbacks from Brian Norris computersforpe...@gmail.com previous
revision [PATCH v8 3/6] and [PATCH
On Thu, Oct 17, 2013 at 04:42:23AM +, Pekon Gupta wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:52AM +0530, Pekon Gupta wrote:
Autodetection of NAND device bus-width was added in generic NAND
driver as
[...]
@@ -1904,6 +1903,21
On Thu, Oct 17, 2013 at 09:00:27PM +, Pekon Gupta wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Thu, Oct 17, 2013 at 04:42:23AM +, Pekon Gupta wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:52AM +0530, Pekon
Hi Pekon,
On Sat, Oct 19, 2013 at 02:14:08PM +0530, Pekon Gupta wrote:
As per comments below, NAND_CMD_RESET, NAND_CMD_READID, and NAND_CMD_PARAM
would
work only in x8 mode.
commit 64b37b2a63eb2f80b65c7185f0013f8ffc637ae3
Author: Matthieu CASTET matthieu.cas...@parrot.com
On Thu, Oct 17, 2013 at 3:14 AM, Gupta, Pekon pe...@ti.com wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Tue, Oct 15, 2013 at 11:19:55AM +0530, Pekon Gupta wrote:
[snip]
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index d885298..5836039 100644
On Sat, Oct 19, 2013 at 02:14:04PM +0530, Pekon Gupta wrote:
*changes v9 - v10*
[PATCH 1/10], [PATCH 2/10]
swapped [PATCH v9 1/9] and [PATCH v9 2/9] so that DT parsing updates
(with backward compatibility) happen before the deprecation of DT values.
This way DTB does not break
On 10/22/2013 10:07 PM, Gupta, Pekon wrote:
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Sat, Oct 19, 2013 at 02:14:08PM +0530, Pekon Gupta wrote:
[...]
Thus this patch run nand_scan_ident() with driver configured as x8 device.
So are you saying that the driver currently
On Thu, Oct 24, 2013 at 06:27:15PM -0300, Ezequiel Garcia wrote:
On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
This patch:
- calls nand_scan_ident() using bus-width as passed by DT
- removes double calls to nand_scan_ident(), incase first call fails
then omap_nand_probe
On Thu, Oct 24, 2013 at 9:52 AM, Ezequiel Garcia
ezequiel.gar...@free-electrons.com wrote:
Just as suggestion, I think you should reconsider your 'upstream strategy'.
On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
[..]
Pekon Gupta (10):
ARM: OMAP2+: cleaned-up DT support of
Hi,
On Wed, Oct 30, 2013 at 06:53:07AM -0300, Ezequiel Garcia wrote:
As it was discussed recently in the mailing list, the omap2-nand driver
currently
has an issue preventing proper ONFI detection of 16-bit devices (other drivers
may suffer from this same issue).
First of all, thanks for
On Tue, Nov 12, 2013 at 05:45:56PM -0300, Ezequiel Garcia wrote:
On Fri, Oct 25, 2013 at 11:26:06AM +, Gupta, Pekon wrote:
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
Subject: [PATCH v2 3/5] mtd: nand: omap2: Fix OMAP_BCH option
dependency
This option
Hi Ezequiel,
On Fri, Nov 29, 2013 at 10:40:55AM -0300, Ezequiel Garcia wrote:
Here's my proposal, based in Pekon's latest work.
This patch removes the flash device bus-width configuration, prior to
the device detection. With this modification, a NAND driver is no longer
able to force the
Hi Ezequiel,
Dragging up an old piece of the conversation, but I think this
highlights some of the difficulty we're still having. Perhaps I should
have headed this off a month ago...
On Wed, Oct 30, 2013 at 08:19:57PM -0300, Ezequiel Garcia wrote:
On Wed, Oct 30, 2013 at 09:18:53PM +,
On Thu, Dec 5, 2013 at 10:26 AM, Ezequiel Garcia
ezequiel.gar...@free-electrons.com wrote:
(CCing Brian: What do you think about this?)
On Thu, Dec 05, 2013 at 06:39:10PM +0100, Javier Martinez Canillas wrote:
On Thu, Dec 5, 2013 at 6:13 PM, Tony Lindgren t...@atomide.com wrote:
In the
On Thu, Dec 5, 2013 at 11:06 AM, Thomas Petazzoni
thomas.petazz...@free-electrons.com wrote:
On Thu, 5 Dec 2013 19:02:22 +, Gupta, Pekon wrote:
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
[...]
AFAIK, there's no hardware limitation that would prevent us from setting
Hi Pekon,
Sorry, I'm revisiting your patch series a bit late. There are a few
factors that contributed to this, though.
1. This patch series talks extensively about U-Boot. U-Boot is not my
interest, nor should it be the focus of kernel (driver) development.
Any work done here should be
On Fri, Dec 13, 2013 at 02:42:57PM +0530, Pekon Gupta wrote:
This patch updates starting offset for free bytes in OOB which can be used by
file-systems to store their metadata (like clean-marker in case of JFFS2).
This should be describing a regression fix, right? We don't just
arbitrarily
On Fri, Dec 13, 2013 at 02:42:58PM +0530, Pekon Gupta wrote:
@@ -1851,7 +1854,13 @@ static int omap_nand_probe(struct platform_device
*pdev)
ecclayout-eccbytes = nand_chip-ecc.bytes *
(mtd-writesize /
Hi Pekon,
On Tue, Jan 28, 2014 at 07:42:09AM +, Pekon Gupta wrote:
From: Brian Norris
On Fri, Dec 13, 2013 at 02:42:56PM +0530, Pekon Gupta wrote:
As there were parallel set of patches running between u-boot and kernel.
I don't know what patches you're talking about.
Following
+ devicet...@vger.kernel.org
On Fri, May 09, 2014 at 02:29:15PM +0530, Pekon Gupta wrote:
- Adds DT binding property for BCH16 ECC scheme
- Adds describes on factors which determine choice of ECC scheme for
particular device
Signed-off-by: Pekon Gupta pe...@ti.com
---
On Fri, May 09, 2014 at 02:29:13PM +0530, Pekon Gupta wrote:
ELM hardware engine is used to detect ECC errors for BCHx ecc-schemes
(like BCH4/BCH8/BCH16). This patch extends configuration of ELM registers
for loading of BCH16 ECC syndrome.
Signed-off-by: Pekon Gupta pe...@ti.com
---
On Mon, May 19, 2014 at 01:24:38PM +0530, Pekon Gupta wrote:
As this series touches both linux-mtd and linux-omap (GPMC) sub-systems but in
independent patch-sets, so looping both maintainers. 'Ack' from maintainers
would
help in getting this series accepted for 3.16
*changes v3 - v4*
On Mon, May 19, 2014 at 01:24:41PM +0530, Pekon Gupta wrote:
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1201,6 +1219,41 @@ static int __maybe_unused
omap_calculate_ecc_bch(struct mtd_info *mtd,
*ecc_code++ = ((bch_val1 4) 0xFF);
gic_init_irq() is no longer used as of:
commit b42b918194c4791510ac049e3d507169a7de8544
Author: Tony Lindgren t...@atomide.com
Date: Thu May 30 12:53:05 2013 -0700
ARM: OMAP2+: Remove board-omap4panda.c
Drop it.
Signed-off-by: Brian Norris computersforpe...@gmail.com
Cc
cause various problems, so let's just
always mask our interrupts before suspend.
Several platforms already tweak the GIC irqchip flags to do this (and
I'm working on bringing up another platform that needs this), so let's
just set IRQCHIP_MASK_ON_SUSPEND by default.
Signed-off-by: Brian Norris
On Wed, Jun 11, 2014 at 01:34:39AM +0200, Thomas Gleixner wrote:
On Tue, 10 Jun 2014, Brian Norris wrote:
Other random thought: it seems like any irqchip driver which does lazy IRQ
masking ought to use IRQCHIP_MASK_ON_SUSPEND. So maybe the IRQ core should
just
do something like
On Mon, Sep 15, 2014 at 11:27:43AM +0300, Roger Quadros wrote:
On 09/12/2014 07:56 PM, Ezequiel Garcia wrote:
On 12 Sep 12:01 PM, Roger Quadros wrote:
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
This commit adds a hidden option to build the omap_elm as a module, if
omap2_nand is a
, the driver falls back to use OOB
bad block markers only, as before. If the flash BBT is enabled the
kernel will keep track of bad blocks using a BBT, in addition to
the OOB markers.
As explained by Brian Norris the reasons for using a BBT are:
The primary reason would be that NAND datasheets
On Thu, Sep 11, 2014 at 12:02:09PM -0300, Ezequiel Garcia wrote:
The current code abuses ifdefs to determine if the selected ECC scheme
is supported by the running kernel. As a result the code is hard to read,
and it also fails to load as a module.
Yes, a real eyesore, with little benefit from
On Sat, Sep 20, 2014 at 05:53:11PM +0100, Ezequiel Garcia wrote:
I've collected all the changes recently discussed in a whole patchset.
If you are just reading this for the first time please take a look at:
[1] http://www.spinics.net/lists/linux-omap/msg110965.html
[2]
On Sat, Sep 20, 2014 at 05:53:15PM +0100, Ezequiel Garcia wrote:
Rename it to a less generic name, so the module is built with a meaningful
name instead of the previous 'omap2.ko'.
You mention renaming only so that you can change the module name, but
you also (partly at my prompting) argued for
On Sat, Sep 20, 2014 at 05:53:16PM +0100, Ezequiel Garcia wrote:
This fixes the following build error when omap2_nand is chosen built-in,
and omap_elm is chosen as a module:
drivers/mtd/nand/omap2.c:2010: undefined reference to `elm_config'
drivers/mtd/nand/omap2.c:1980: undefined
On Fri, Sep 12, 2014 at 05:56:36PM +0100, Ezequiel Garcia wrote:
Ultimately, I don't care much as I don't think anyone will build it as a
module,
except maybe for testing the driver under probe/remove cycles.
I see that you sort of answered one of my questions here. On what do you
base this
On Wed, Oct 01, 2014 at 02:33:28PM +0300, Roger Quadros wrote:
Hi,
Patch 1 fixes build with OMAP nand driver as built-in and the BCH driver as a
module.
Ezequiel, I took the liberty to address an issue with your original patch so
this is v2.
Patch 2 fixes the help message for
On Tue, Oct 28, 2014 at 11:46:57AM +0200, Roger Quadros wrote:
On 10/27/2014 04:34 PM, Frans Klaver wrote:
Since commit 6d178ef2fd5e (mtd: nand: Move ELM driver and rename as
omap_elm), I don't have any mtd devices present on my am335x. This
changes the link order of the omap_elm and omap2
On Wed, Nov 19, 2014 at 02:22:23PM +0200, Roger Quadros wrote:
3430LDP has NAND flash with 32 bytes OOB size which is sufficient to hold
BCH8 codes but the small page check introduced in
commit b491da7233d5 (mtd: nand: omap: clean-up ecc layout for BCH ecc
schemes)
considers anything below
On Thu, Aug 20, 2015 at 09:07:13AM +0200, Javier Martinez Canillas wrote:
Patches #1 and #2 solves a), patches #3 to #8 solves b) and patches
^^^ I'm dying to know how this sentence ends :)
Patch #18 changes the logic of spi_uevent() to report an OF modalias if
the device was registered using
On Tue, Jul 28, 2015 at 02:11:15PM +0530, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
> (__device_release_driver+0x90/0x114)
> [ 53.970883] [] (__device_release_driver) from []
> (driver_detach+0xb4/0xb8)
> [ 53.979864] [] (driver_detach) from []
> (bus_remove_driver+0x4c/0xa0)
> [ 53.988303] [] (bus_remove_driver) from []
> (SyS_delete_module+
Hi Roger,
I'm not too familiar with OMAP platforms, and I might have missed out on
prior discussions/context, so please forgive if I'm asking silly or old
questions here.
On Fri, Sep 18, 2015 at 05:53:22PM +0300, Roger Quadros wrote:
> - Remove NAND IRQ handling from omap-gpmc driver, share the
+ others
A few comments below.
On Fri, Sep 18, 2015 at 05:53:40PM +0300, Roger Quadros wrote:
> The GPMC WAIT pin status are now available over gpiolib.
> Update the omap_dev_ready() function to use gpio instead of
> directly accessing GPMC register space.
>
> Signed-off-by: Roger Quadros
Hi Boris,
On Mon, Nov 16, 2015 at 02:37:47PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris
On Mon, Nov 16, 2015 at 02:37:51PM +0100, Boris Brezillon wrote:
> Now that all drivers are using the mtd instance embedded in the nand_chip
Do you have a script that verifies this? I thought you did at some
point, and it'd be nice to note it, so I can also use it to verify
things once it gets
In addition to my other comments:
On Tue, Nov 10, 2015 at 10:59:55AM +0530, Vignesh R wrote:
> In addition to providing direct access to SPI bus, some spi controller
> hardwares (like ti-qspi) provide special memory mapped port
> to accesses SPI flash devices in order to increase read
Hi,
On Tue, Nov 17, 2015 at 12:02:29PM +0530, Vignesh R wrote:
> On 11/13/2015 09:35 PM, Cyrille Pitchen wrote:
> >
> > In September I've sent a series of patches to enhance the support of QSPI
> > flash
> > memories. Patch 4 was dedicated to the m25p80 driver and set the
> > rx_nbits /
Hi,
On Wed, Nov 11, 2015 at 12:20:46PM +0530, R, Vignesh wrote:
> On 11/11/2015 4:53 AM, Brian Norris wrote:
> > On Tue, Nov 10, 2015 at 10:59:55AM +0530, Vignesh R wrote:
> >> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> >> index cce80e6d
Hi Vignesh,
Sorry for the late review. I did not have time to review much back when
you submitted your first RFCs for this.
On Tue, Nov 10, 2015 at 10:59:55AM +0530, Vignesh R wrote:
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index cce80e6dc7d1..2f2c431b8917 100644
> ---
On Fri, Aug 21, 2015 at 01:45:35PM +0300, Roger Quadros wrote:
> As both omap2 onenand and omap2 nand driver modules are
> named the same i.e. "omap2.ko", only one of them gets shipped
> during MODPOST if both are configured as loadable modules.
>
> To avoid this ambiguity let's ship the omap2
On Wed, Dec 02, 2015 at 07:03:17AM -0800, Tony Lindgren wrote:
> * Roger Quadros <rog...@ti.com> [151201 21:13]:
> > On 02/12/15 08:56, Brian Norris wrote:
> > >
> > > I'll take another pass over your patch set, but if things are looking
> &g
Hi Roger,
On Wed, Dec 02, 2015 at 10:42:12AM +0530, Roger Quadros wrote:
> On 02/12/15 08:56, Brian Norris wrote:
> > On Tue, Dec 01, 2015 at 04:41:16PM +0200, Roger Quadros wrote:
> >> On 30/11/15 21:54, Brian Norris wrote:
> >>> But anyway, I'm not sure that compl
On Tue, Dec 01, 2015 at 12:03:09PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris Brezillon
Hi Boris,
On Tue, Dec 01, 2015 at 12:03:09PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris
On Tue, Dec 01, 2015 at 12:03:14PM +0100, Boris Brezillon wrote:
> mtd_to_nand() now uses the container_of() approach to transform an
> mtd_info pointer into a nand_chip one. Drop useless mtd->priv
> assignments from NAND controller drivers.
>
> Signed-off-by: Boris Brezillon
Hi Roger,
On Tue, Oct 06, 2015 at 01:35:48PM +0300, Roger Quadros wrote:
> Move NAND specific device tree parsing to NAND driver.
>
> The NAND controller node must have a compatible id, register space
> resource and interrupt resource.
>
> Signed-off-by: Roger Quadros
This
On Thu, Dec 03, 2015 at 11:27:13AM +0530, Roger Quadros wrote:
> On 03/12/15 09:59, Brian Norris wrote:
> > On Tue, Oct 06, 2015 at 01:35:48PM +0300, Roger Quadros wrote:
> >> arch/arm/mach-omap2/gpmc-nand.c | 5 +-
> >> drivers/memory/omap-gpm
Hi,
On Fri, Sep 18, 2015 at 05:53:22PM +0300, Roger Quadros wrote:
> Hi,
>
> We do a couple of things in this series which result in
> cleaner device tree implementation, faster perfomance and
> multi-platform support. As an added bonus we get new GPI/Interrupt pins
> for use in the system.
>
>
(to be clear, this branch of discussion isn't directly regarding the TI
changes; we can handle any generic handling afterward, as long as we get
the DT binding right now)
On Tue, Oct 27, 2015 at 09:28:32AM +0100, Boris Brezillon wrote:
> On Mon, 26 Oct 2015 13:49:00 -0700
> Brian
On Fri, Sep 18, 2015 at 05:53:26PM +0300, Roger Quadros wrote:
> Deprecate nand register passing via platform data and use
> gpmc_omap_get_nand_ops() instead.
>
> Signed-off-by: Roger Quadros
> ---
> arch/arm/mach-omap2/gpmc-nand.c | 2 --
> drivers/mtd/nand/omap2.c
Hi,
On Thu, Dec 03, 2015 at 11:38:14AM +0530, Roger Quadros wrote:
> On 03/12/15 10:39, Brian Norris wrote:
> > On Fri, Sep 18, 2015 at 05:53:22PM +0300, Roger Quadros wrote:
> >> We do a couple of things in this series which result in
> >> cleaner device tree implem
Hi Boris,
On Wed, Dec 02, 2015 at 09:50:01AM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris
Hi,
On Tue, Dec 01, 2015 at 12:02:57PM +0100, Boris Brezillon wrote:
> Hello,
>
> This huge series aims at clarifying the relationship between the mtd and
> nand_chip structures and hiding NAND framework internals to NAND
> controller drivers.
>
> The first part of the series provide an
Hi Roger,
On Tue, Dec 01, 2015 at 04:41:16PM +0200, Roger Quadros wrote:
> On 30/11/15 21:54, Brian Norris wrote:
> > On Tue, Oct 27, 2015 at 11:37:03AM +0200, Roger Quadros wrote:
> >> On 26/10/15 23:23, Brian Norris wrote:
> >>> On Fri, Sep 18, 2015 at 05:53:2
Hi Boris,
On Fri, Dec 11, 2015 at 11:03:05PM +0100, Boris Brezillon wrote:
> On Thu, 10 Dec 2015 16:40:08 -0800
> Brian Norris <computersforpe...@gmail.com> wrote:
> > On Thu, Dec 10, 2015 at 08:59:45AM +0100, Boris Brezillon wrote:
> > > Unregister the NAND device f
Hi Arnd,
On Tue, Dec 08, 2015 at 04:39:45PM +0100, Arnd Bergmann wrote:
> When CONFIG_LPAE is set on ARM, resource_size_t is 64-bit wide
> and we get a warning about an incorrect format string for printing
> the interrupt number in elm_probe:
>
> drivers/mtd/nand/omap_elm.c: In function
On Thu, Dec 10, 2015 at 08:59:45AM +0100, Boris Brezillon wrote:
> Unregister the NAND device from the NAND subsystem when removing a denali
> NAND controller, otherwise the MTD attached to the NAND device is still
> exposed by the MTD layer, and accesses to this device will likely crash
> the
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