On Thursday, October 17, 2013 2:00 PM, Sachin Kamat wrote:
On 16 October 2013 21:30, Tomasz Figa t.f...@samsung.com wrote:
From: Lukasz Majewski l.majew...@samsung.com
+static struct platform_driver exynos_cpufreq_platdrv = {
+ .driver = {
+ .name = exynos-cpufreq,
Exynos5420 SoC has per core thermal management unit, this patch adds
tmu device nodes to the DT device list.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Note: This patch has been tested on kgene's for-next branch
after applying Naveen's patchset
[1/3,v6] thermal: samsung:
Hi Naveen,
On Thursday, October 17, 2013 08:41:13 AM Naveen Krishna Chatradhi wrote:
On Exynos5250, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN, INTSTAT registers and at an offset of
12 in INTCLEAR register.
On Exynos5420, the FALL
On Wed, Oct 16, 2013 at 09:10:51PM +0200, Tomasz Figa wrote:
Since the patches extending support of amba-pl08x DMA engine driver to
PL080S DMA engine (PL080 modified by Samsung) found in Samsung S3C64xx
SoCs got merged into Linux 3.12, it is a good time to migrate the
platform to use this
On Wed, Oct 16, 2013 at 09:10:52PM +0200, Tomasz Figa wrote:
With support for amba-pl08x driver, on S3C64xx the generic DMA engine
API can be used instead of the private s3c-dma interface.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mark Brown broo...@linaro.org
in case we
On Wed, Oct 16, 2013 at 09:10:53PM +0200, Tomasz Figa wrote:
With support for amba-pl08x driver, on S3C64xx the generic DMA engine
API can be used instead of the private s3c-dma interface.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mark Brown broo...@linaro.org
in case we
On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC.
This enables all 8 cores, 4 x A7 and 4 x A15 run at the same time.
IIUC, the 5410 has a CCI-400 bug preventing to use the two clusters
Now that Exynos platforms are DT only, hard-coded irqbase is not
necessary.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/irqchip/exynos-combiner.c |9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/irqchip/exynos-combiner.c
L2x0 cache controller is present only in Cortex-A9 based Exynos4 SoCs.
Thus move this function to Exynos4 early init call to avoid non-Exynos4
SoCs from calling this function in multi-platform support.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera
pm_runtime_put() wasn't called if clock rate could not be set up in
s3c64xx_spi_setup() leading to invalid count of device pm_runtime usage.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/spi/spi-s3c64xx.c |1 +
1 file changed, 1 insertion(+)
diff --git
On 17/10/13 14:45, Krzysztof Kozlowski wrote:
pm_runtime_put() wasn't called if clock rate could not be set up in
s3c64xx_spi_setup() leading to invalid count of device pm_runtime usage.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Reviewed-by: Sylwester Nawrocki
hi Kevin;
Vyacheslav Tyrtov v.tyr...@samsung.com writes:
The series of patches represent support of Exynos 5410 SoC
The Exynos 5410 is the first Samsung SoC based on bigLITTLE architecture.
Patches allow all 8 CPU cores (4 x A7 and 4 x A15) to run at the same time
Patches
Hi Sachin,
On Thursday 17 of October 2013 17:33:12 Sachin Kamat wrote:
L2x0 cache controller is present only in Cortex-A9 based Exynos4 SoCs.
Thus move this function to Exynos4 early init call to avoid non-Exynos4
SoCs from calling this function in multi-platform support.
I believe that at
Suspend scenario in case of ohci-s3c2410 glue was not
properly handled as it was not suspending generic part
of ohci controller. Alan Stern suggested, properly handle
ohci-s3c2410 suspend scenario.
Calling explicitly the ohci_suspend()
routine in ohci_hcd_s3c2410_drv_suspend() will ensure
proper
Suspend scenario in case of ohci-exynos glue was not
properly handled as it was not suspending generic part
of ohci controller. Alan Stern suggested, properly handle
ohci-exynos suspend scenario.
Calling explicitly the ohci_suspend() routine in
exynos_ohci_suspend() will ensure proper handling of
Hi Tomasz,
[ ... ]
/*
* list of controller registers to be saved and restored during a
* suspend/resume cycle.
@@ -288,6 +299,70 @@ static unsigned long exynos4_clk_regs[] __initdata = {
GATE_IP_CPU,
};
+static int exynos4_clk_suspend(void)
+{
+
On 17.10.2013 17:04, Aliaksei Katovich wrote:
hi Kevin;
Vyacheslav Tyrtov v.tyr...@samsung.com writes:
The series of patches represent support of Exynos 5410 SoC
The Exynos 5410 is the first Samsung SoC based on bigLITTLE architecture.
Patches allow all 8 CPU cores (4 x A7 and 4 x
On 17.10.2013 17:04, Aliaksei Katovich wrote:
hi Kevin;
Vyacheslav Tyrtov v.tyr...@samsung.com writes:
The series of patches represent support of Exynos 5410 SoC
The Exynos 5410 is the first Samsung SoC based on bigLITTLE architecture.
Patches allow all 8 CPU cores (4 x A7 and 4 x
On Thursday 17 of October 2013 19:12:08 Yadwinder Singh Brar wrote:
Hi Tomasz,
[ ... ]
/*
* list of controller registers to be saved and restored during a
* suspend/resume cycle.
@@ -288,6 +299,70 @@ static unsigned long exynos4_clk_regs[] __initdata = {
GATE_IP_CPU,
On Thu, Oct 17, 2013 at 7:46 PM, Tomasz Figa t.f...@samsung.com wrote:
On Thursday 17 of October 2013 19:12:08 Yadwinder Singh Brar wrote:
Hi Tomasz,
[ ... ]
/*
* list of controller registers to be saved and restored during a
* suspend/resume cycle.
@@ -288,6 +299,70 @@ static
hi Tarek;
skip
However there seem to be some issues with virq allocations, like this:
snippet
Starting kernel ...
[0.00] [c0014d48] (unwind_backtrace+0x0/0xf8) from [c00117d0]
(show_stack+0x10/0x14)
[0.00] [c00117d0]
On Thu, Oct 17, 2013 at 12:45:29PM +0200, Daniel Lezcano wrote:
On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC.
This enables all 8 cores, 4 x A7 and 4 x A15 run at the same time.
On 10/17/2013 04:32 PM, Dave Martin wrote:
On Thu, Oct 17, 2013 at 12:45:29PM +0200, Daniel Lezcano wrote:
On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC.
This enables all 8 cores, 4 x
Mark device as PM runtime active during initialization to reflect
actual device power/clocks state. This reduces the enable count for SPI
bus controller gate clock so it can be disabled when the bus controller
is not used.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by:
On 17/10/13 18:06, Krzysztof Kozlowski wrote:
Mark device as PM runtime active during initialization to reflect
actual device power/clocks state. This reduces the enable count for SPI
bus controller gate clock so it can be disabled when the bus controller
is not used.
Signed-off-by:
This series intends to improve clock provider impementation of max77686
PMIC driver. First two patches are simple fixes of current implementation
to allow correct control of provided clocks. Further patches refactor
the driver to make the code cleaner and prepare for further patches. Then
last two
It is usually nice to know frequency of a clock, so this patch adds a
.recalc_rate() callback returning rates of provided clocks.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clk/clk-max77686.c | 7 +++
1 file changed, 7
This patch fixes invalid kfree() and adds missing call to clk_unregister()
in error and remove paths in max77686_clk_probe(). While at it, error
handling is also cleaned up.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changing status of clock gates in max77686 requires i2c transfers, which
can sleep, so this is done in prepare and unprepare callbacks. Due to
this, checking whether whether the clock is ungated must be done
in is_prepared() callback as well, for consistency.
Signed-off-by: Tomasz Figa
The function can simply return 0, without jumping to a separate label,
which does exactly the same. This patch does not introduce any
functional change, just a clean-up.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
If max77686 chip is instantiated from device tree, it is desirable to
have an OF clock provider to allow device tree based look-up of clocks.
This patch adds OF clock provider registration to the clk-max77686
driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park
As a prerequisite for further patch adding OF clock provider support to
the driver, this patch changes the driver to store an array of struct
clk * as driver data.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/clk/clk-max77686.c
As a preparation for further patches, this patch modifies the clock
registration helper function to return a pointer to the newly registered
clock. No functional change is done to the driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
This patch adds a label and #clock-cells property to device node of
max77686 PMIC to allow using it as a clock provider.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/cros5250-common.dtsi | 1 +
Hi Arun,
My apologies for the delay.
On 27/09/13 12:59, Arun Kumar K wrote:
s5k6a3 sensor has actual pixel resolution of 1408x1402 against
the active resolution 1392x1392. The real resolution is needed
when raw sensor SRGB data is dumped to memory by fimc-lite.
Signed-off-by: Arun Kumar K
On 27/09/13 12:59, Arun Kumar K wrote:
This patch adds subdev driver for Samsung S5K4E5 raw image sensor.
Like s5k6a3, it is also another fimc-is firmware controlled
sensor. This minimal sensor driver doesn't do any I2C communications
as its done by ISP firmware. It can be updated if needed to
Hi Hans,
Can I still add your Ack to updated patches 2, 3, 4, 10 ?
Thanks,
Sylwester
On 12/10/13 14:31, Sylwester Nawrocki wrote:
Hello,
This patch set adds ioctl helpers to the v4l2-mem2mem module so the
video mem-to-mem drivers can be simplified by removing functions that
are only a
Hi Sylwester,
Hi Hans,
Can I still add your Ack to updated patches 2, 3, 4, 10 ?
Yes, that's OK.
Regards,
Hans
Thanks,
Sylwester
On 12/10/13 14:31, Sylwester Nawrocki wrote:
Hello,
This patch set adds ioctl helpers to the v4l2-mem2mem module so the
video mem-to-mem drivers can
Hi Sachin,
On Thursday 17 of October 2013 16:34:41 Sachin Kamat wrote:
Now that Exynos platforms are DT only, hard-coded irqbase is not
necessary.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/irqchip/exynos-combiner.c |9 +
1 file changed, 1 insertion(+), 8
This patch adds subdev driver for Samsung S5K6A3 raw image sensor.
As it is intended at the moment to be used only with the Exynos
FIMC-IS (camera ISP) subsystem it is pretty minimal subdev driver.
It doesn't do any I2C communication since the sensor is controlled
by the ISP and its own firmware.
This series is intended to add device tree support for both cameras
on the Exynos4412 SoC Trats 2 board. It converts related drivers to use
the v4l2-async API and expose the sensor's master clock, supplied by the
camera host interface, through the common clock API.
This changeset is an updated
Add support for registering external sensor subdevs using
the v4l2-async API. The async API is used only for sensor
subdevs and only for dt platforms.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
This patch removes the common fimc-is-sensor driver for image sensors
that are normally controlled by the FIMC-IS firmware. The FIMC-IS
driver now contains only a table of properties specific to each sensor.
The sensor properties required for the ISP's firmware are parsed from
device tree and
This patch adds binding documentation for the Samsung S5K6A3(YX)
raw image sensor.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since v2:
- added AF regulator supply.
---
This patch adds clock provider to expose the sclk_cam0/1 clocks
for external image sensor devices.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since v2:
- use 'camera' DT node drirectly as clock provider node, rather
This patch adds the V4L2 asynchronous subdev registration and
device tree support. Common clock API is used to control the
sensor master clock from within the subdev.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin
On Thu, 17 Oct 2013, Daniel Lezcano wrote:
On 10/17/2013 04:32 PM, Dave Martin wrote:
On Thu, Oct 17, 2013 at 12:45:29PM +0200, Daniel Lezcano wrote:
On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support)
This patch adds subdev driver for Samsung S5K6A3 raw image sensor.
As it is intended at the moment to be used only with the Exynos
FIMC-IS (camera ISP) subsystem it is pretty minimal subdev driver.
It doesn't do any I2C communication since the sensor is controlled
by the ISP and its own firmware.
Aliaksei Katovich aliaksei.katov...@gmail.com writes:
hi Kevin;
Vyacheslav Tyrtov v.tyr...@samsung.com writes:
The series of patches represent support of Exynos 5410 SoC
The Exynos 5410 is the first Samsung SoC based on bigLITTLE architecture.
Patches allow all 8 CPU cores (4 x
From: Mark Brown broo...@linaro.org
Allow DMA data to be set at probe time for devices that can do that,
avoiding the need to do it every time we start a stream and supporting
non-DT dmaengine users using the helpers.
Signed-off-by: Mark Brown broo...@linaro.org
---
include/sound/soc-dai.h | 7
Tomasz Figa wrote:
Hi Leela,
On Thursday 17 of October 2013 11:25:00 Leela Krishna Amudala wrote:
Adds G-Scaler device nodes to the DT device list
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Changes since V1:
- Changed the patch subject
- Changed
On Thu, Oct 17, 2013 at 02:45:41PM +0200, Krzysztof Kozlowski wrote:
pm_runtime_put() wasn't called if clock rate could not be set up in
s3c64xx_spi_setup() leading to invalid count of device pm_runtime usage.
Applied, thanks.
signature.asc
Description: Digital signature
Tomasz Figa wrote:
Hi Kukjin,
On Saturday 28 of September 2013 19:49:14 Tomasz Figa wrote:
All S3C64XX SoCs come with ARM1176JZF-s core, which fully supports
ARMv6K extensions. This patch lets the kernel use them on S3C6410 by
adding selection of CPU_V6K to ARCH_S3C64XX.
Tomasz Figa wrote:
Hi Kukjin,
Hi,
On Sunday 29 of September 2013 18:12:01 Tomasz Figa wrote:
According to board schematics, for HSMMC1 a GPIO line is used to detect
card presence, while currently it is being configured for internal card
detect line, which is multiplexed with card
Hi Sylwester,
On Thu, Oct 17, 2013 at 10:33 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
Hi Arun,
My apologies for the delay.
On 27/09/13 12:59, Arun Kumar K wrote:
s5k6a3 sensor has actual pixel resolution of 1408x1402 against
the active resolution 1392x1392. The real resolution
Hi Sylwester,
On Thu, Oct 17, 2013 at 10:40 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 27/09/13 12:59, Arun Kumar K wrote:
This patch adds subdev driver for Samsung S5K4E5 raw image sensor.
Like s5k6a3, it is also another fimc-is firmware controlled
sensor. This minimal sensor
Hi Hans,
Thank you for the review.
On Mon, Sep 30, 2013 at 6:13 PM, Hans Verkuil hverk...@xs4all.nl wrote:
On 09/27/2013 12:59 PM, Arun Kumar K wrote:
This patch adds the crucial hardware pipeline control for the
fimc-is driver. All the subdev nodes will call this pipeline
interfaces to
Hi Greg,
On Wednesday 16 October 2013 10:33 PM, Sylwester Nawrocki wrote:
Fix argument passed to the register setup helper function so
the phy is actually disabled. Now due to cutpaste error 1 is
passed to both phy_power_on() and phy_power_off().
Can you take this patch?
Acked-by: Kishon
This patch enables word transfer for s3c64xx spi driver.
User can set bits_per_word to 32 or 16 or 8, before calling
spi_setup, which would enable the corresponding transfer mode.
Change-Id: Ib04f9851a3ea891d2bfa527f2100acd314fe1c98
Signed-off-by: Rajeshwari S Shinde rajeshwar...@samsung.com
---
The patch adds the DT binding documentation for Samsung
Exynos5 SoC series imaging subsystem (FIMC-IS).
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
.../devicetree/bindings/media/exynos5-fimc-is.txt | 84
1
FIMC-IS has two hardware scalers named as scaler-codec and
scaler-preview. This patch adds the common code handling the
video nodes and subdevs of both the scalers.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki
fimc-is driver takes video data input from the ISP video node
which is added in this patch. This node accepts Bayer input
buffers which is given from the IS sensors.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki
The patch series adds support for exynos5 fimc-is driver and a
new sensor s5k4e5. The media driver part is omitted form this series
as it is already applied.
Changes from v9
---
- Addressed review comments from Hans and Sylwester
This driver is for the FIMC-IS IP available in Samsung Exynos5
SoC onwards. This patch adds the core files for the new driver.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
This patch adds the register definition file for the fimc-is driver
and also the header file containing the main context for the driver.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Some sensors to be used with fimc-is are exclusively controlled
by the fimc-is firmware. This minimal sensor driver provides
the required info for the firmware to configure the sensors
sitting on I2C bus.
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Sylwester Nawrocki
S5K4E5 is a Samsung raw image sensor controlled via I2C.
This patch adds the DT binding documentation for the same.
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
.../devicetree/bindings/media/samsung-s5k4e5.txt | 45
This patch adds the crucial hardware pipeline control for the
fimc-is driver. All the subdev nodes will call this pipeline
interfaces to reach the hardware. Responsibilities of this module
involves configuring and maintaining the hardware pipeline involving
multiple sub-ips like ISP, DRC, Scalers,
The hardware interface module finally sends the commands to the
FIMC-IS firmware and runs the interrupt handler for getting the
responses.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
This patch adds subdev driver for Samsung S5K4E5 raw image sensor.
Like s5k6a3, it is also another fimc-is firmware controlled
sensor. This minimal sensor driver doesn't do any I2C communications
as its done by ISP firmware. It can be updated if needed to a
regular sensor driver by adding the I2C
Adds Kconfig and Makefile for exynos5-is driver files.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/Kconfig |1 +
Hi Kamil,
As Shaik is on travel, I will correct this patch and post the updated version.
Hope its ok for you to take the corrected version of this patch alone
without re-spinning the whole series.
Regards
Arun
On Wed, Oct 16, 2013 at 3:26 PM, Kamil Debski k.deb...@samsung.com wrote:
Hi Shaik,
From: Shaik Ameer Basha shaik.am...@samsung.com
This patch adds the Makefile and memory to memory (m2m) interface
functionality for the SCALER driver.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
---
This patch is part of the Exynos5
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