On 16/02/15 13:46, Tobias Jakobi wrote:
v2: Move the commit description into the patch itself.
Signed-off-by: Tobias Jakobi tjak...@math.uni-bielefeld.de
---
tests/exynos/exynos_fimg2d_test.c | 8
1 file changed, 8 insertions(+)
diff --git a/tests/exynos/exynos_fimg2d_test.c
Hi Kukjin, Eduardo
On 01/25/15 06:49, Eduardo Valentin wrote:
On Fri, Jan 23, 2015 at 01:09:53PM +0100, Lukasz Majewski wrote:
1. Introduction
Following patches aim to clean up the current implementation of
the thermal framework on Exynos devices.
The main goal was to use a generic
Lukasz Majewski wrote:
Hi Kukjin, Eduardo
Hi,
On 01/25/15 06:49, Eduardo Valentin wrote:
On Fri, Jan 23, 2015 at 01:09:53PM +0100, Lukasz Majewski wrote:
1. Introduction
Following patches aim to clean up the current implementation of
the thermal framework on Exynos devices.
On 16/02/15 13:46, Tobias Jakobi wrote:
The reason for this change is to let userspace use the header.
Currently 'make install' does not install it.
Hi Tobias,
Afaict that this was done intentionally. I believe the Samsung guys got
this out only to fulfil the no drm(render) driver without
On 16/02/15 13:46, Tobias Jakobi wrote:
Hello,
here are some miscellaneous improvements (small features, bugfixes, spelling
fixes, etc.) for the exynos component of libdrm. The general idea is to let
userspace use the G2D engine functionality more
efficiently.
If someone is interested
On 16/02/15 13:46, Tobias Jakobi wrote:
In almost all functions the base address register is written, so it
makes sense to have a helper function for this.
Signed-off-by: Tobias Jakobi tjak...@math.uni-bielefeld.de
---
exynos/exynos_fimg2d.c | 87
On 16/02/15 13:46, Tobias Jakobi wrote:
Currently getchar() is used to pause execution after each test.
The user isn't informed if one is supposed to do anything for
the tests to continue, so print a simple message to make this
more clear.
Signed-off-by: Tobias Jakobi
On Mon, Feb 23, 2015 at 11:22:09AM +, Emil Velikov wrote:
On 16/02/15 13:46, Tobias Jakobi wrote:
Currently getchar() is used to pause execution after each test.
The user isn't informed if one is supposed to do anything for
the tests to continue, so print a simple message to make this
Hi,
Am 23.02.2015 um 09:29 schrieb Javier Martinez Canillas:
On 02/20/2015 04:27 AM, Tushar Behera wrote:
On 02/20/2015 12:48 AM, Andreas Färber wrote:
If master clock is provided through device tree, then update
the master clock frequency during set_sysclk.
Cc: Tushar Behera
On Mon, Feb 23, 2015 at 12:30:46PM +, Andre Przywara wrote:
The Exynos 7 arm64 support now allows the S3C64xx SPI driver to be
compiled into an ARM64 kernel, so the cast from the [rt]x_dmach int
variable to a void* in this driver now triggers a warning.
Add a long cast to silence the
The Exynos 7 arm64 support now allows the S3C64xx SPI driver to be
compiled into an ARM64 kernel, so the cast from the [rt]x_dmach int
variable to a void* in this driver now triggers a warning.
Add a long cast to silence the compiler.
Signed-off-by: Andre Przywara andre.przyw...@arm.com
---
Hi,
Hi Kukjin,
Lukasz Majewski wrote:
Hi Kukjin, Eduardo
Hi,
On 01/25/15 06:49, Eduardo Valentin wrote:
On Fri, Jan 23, 2015 at 01:09:53PM +0100, Lukasz Majewski wrote:
1. Introduction
Following patches aim to clean up the current implementation of
the thermal
Hi,
On 17/12/14 07:22, Tony K Nadackal wrote:
Bits EXYNOS4_DEC_MODE and EXYNOS4_ENC_MODE do not get cleared
on software reset. These bits need to be cleared explicitly.
Signed-off-by: Tony K Nadackal tony...@samsung.com
---
This patch is created and tested on top of linux-next-20141210.
On 17/12/14 07:25, Tony K Nadackal wrote:
In case of corrupt images, multiple interrupts may occur
due to different error scenarios.
Since we are removing the src and dest buffers in the first
interrupt itself, crash occurs in the second error interrupts.
Disable the global interrupt
2015-02-23 17:25 GMT+01:00 Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com:
Hi,
On Wednesday, February 18, 2015 11:45:25 AM Krzysztof Kozlowski wrote:
On Exynos4412 boards (Trats2, Odroid U3) after enabling L2 cache in
56b60b8bce4a (ARM: 8265/1: dts: exynos4: Add nodes for L2 cache
Exynos has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
BIG FAT WARNING: because the DTs were so far
Document the fact that some Exynos PMUs are capable of acting as
an interrupt controller.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
Documentation/devicetree/bindings/arm/samsung/pmu.txt | 17 +
1 file changed, 17 insertions(+)
diff --git
This series is extracted from [4], which is trying to remove all
traces of gic_arch_extn from the tree. As some maintainers are more
responsive than others (understatement of the year...), I've decided
to split it per sub-arch, and get it moving, at least partially.
This series addresses Exynos
On Mon, Feb 23, 2015 at 05:51:22PM +0100, Lukasz Majewski wrote:
Hi Guenter,
On Mon, Feb 23, 2015 at 05:13:36PM +0100, Lukasz Majewski wrote:
Hi Guenter,
[ ... ]
If devicetree is not configured, of_property_count_elems_of_size
returns -ENOSYS, which is returned,
On Mon, Feb 23, 2015 at 05:13:36PM +0100, Lukasz Majewski wrote:
Hi Guenter,
[ ... ]
If devicetree is not configured, of_property_count_elems_of_size
returns -ENOSYS, which is returned, causing the driver to fail
loading.
Has of_property_count_elems_of_size() returns -ENOSYS?
Hi Guenter,
On 02/18/2015 02:07 AM, Lukasz Majewski wrote:
This patch provides code for reading PWM FAN configuration data via
device tree. The pwm-fan can work with full speed when configuration
is not provided. However, errors are propagated when wrong DT
bindings are found.
Hello Sylwester,
On 02/20/2015 01:12 PM, Sylwester Nawrocki wrote:
On 20/02/15 01:36, Andreas Färber wrote:
So it seems the mclk is not always set up properly by the kernel,
relying on firmware. Who's in charge of setting that clock up?
Right, it seems audio is only working due the
Hi,
On Wednesday, February 18, 2015 11:45:25 AM Krzysztof Kozlowski wrote:
On Exynos4412 boards (Trats2, Odroid U3) after enabling L2 cache in
56b60b8bce4a (ARM: 8265/1: dts: exynos4: Add nodes for L2 cache
controller) the second suspend to RAM failed. First suspend worked fine
but the next
Hi Guenter,
On Mon, Feb 23, 2015 at 05:13:36PM +0100, Lukasz Majewski wrote:
Hi Guenter,
[ ... ]
If devicetree is not configured, of_property_count_elems_of_size
returns -ENOSYS, which is returned, causing the driver to fail
loading.
Has
Hello Chanwoo!
Chanwoo Choi wrote:
As you thought, when maintaining lower clock of memory bus frequency,
some issue related to multimedia feature will happen.
Separately, We have to check the miminum lower clock for working of
multimedia feature.
and then multimedia or other IP have to
Hello,
On 02/20/2015 04:27 AM, Tushar Behera wrote:
On 02/20/2015 12:48 AM, Andreas Färber wrote:
If master clock is provided through device tree, then update
the master clock frequency during set_sysclk.
Cc: Tushar Behera tushar.beh...@linaro.org
Signed-off-by: Andreas Färber
Hi Krzysztof,
I tested this patch for suspend-to-ram on Exynos4412-based trats2 board.
When I tested suspend-to-ram repetitively, I faced on hang issue of
suspend-to-ram for Exynos4 as before.
Could you send .config file for test?
Thanks,
Chanwoo Choi
On 02/18/2015 07:45 PM, Krzysztof
Hello Chanwoo!
Chanwoo Choi wrote:
As you thought, when maintaining lower clock of memory bus frequency,
some issue related to multimedia feature will happen.
Separately, We have to check the miminum lower clock for working of
multimedia feature.
and then multimedia or other IP
This patch fixes wrong hwirq of RTC irq for Exynos3250 SoC. When entering
suspend state, 'enable_irq_wake fail' happen because of the mismatch of RTC
hwirq.
[ 429.200937] Freezing user space processes ... (elapsed 0.002
seconds) done.
[ 429.203383] Freezing remaining freezable
This patch adds only the compatible string for S2MPS13 clock which is identical
with S2MPS14 clock driver.
Cc: Alessandro Zummo a.zu...@towertech.it
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
Changes from v1:
- Send this patch separately from S2MPS13 PMIC patchset[1]
[1]
From: Inha Song ideal.s...@samsung.com
This patch adds ADMA (Advanced DMA) device tree node for Exynos5433 SoC.
In Exynos5433 SoC, ADMA is used for I2S audio interface.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Inha Song ideal.s...@samsung.com
Acked-by: Inki Dae inki@samsung.com
---
This patch adds the necessary Kconfig entries to enable
support for the ARMv8 based Exynos5433 SoC.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
---
arch/arm64/Kconfig |
The current functions in s3c-rtc driver execute the clk_enable/disable() to
control clocks and some functions execute the s3c_rtc_alarm_clk_enable()
unnecessarily. So, This patch deletes the duplicate clock control ane spilt
s3c_rtc_alarm_clk_enable() out as
Dear Mike and Sylwester,
This pull-request was not merged on Linux 4.0-rc1.
Did you have any plan about it?
Best Regards,
Chanwoo Choi
On 02/06/2015 04:44 AM, Sylwester Nawrocki wrote:
Hi Mike,
This pull request includes driver for clock controller of the Exynos
5433 SoC. As the hardware
This patch adds driver data for Exynos5433 SoC. Exynos5433 includes 228 multi-
functional input/output port pins and 135 memory port pins. There are 41 general
port groups and 2 memory port groups.
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Thomas Abraham thomas.abra...@linaro.org
Cc: Linus
Hi Tobias,
On 02/24/2015 04:57 AM, Tobias Jakobi wrote:
Hello Chanwoo!
Chanwoo Choi wrote:
As you thought, when maintaining lower clock of memory bus frequency,
some issue related to multimedia feature will happen.
Separately, We have to check the miminum lower clock for working of
This patch fixes the wrong control of PD_DET_EN (power down detection mode)
for Exynos7 because exynos7_tmu_control() always enables the power down
detection
mode regardless 'on' parameter.
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
Signed-off-by: Chanwoo Choi
This patch cleanup the code to use oneline for entry of exynos compatible
table.
Cc: Zhang Rui rui.zh...@intel.com
Cc: Eduardo Valentin edubez...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/thermal/samsung/exynos_tmu.c
This patch-set fix the bug of PD_DET_EN bit field of Exynos7 TMU.
And the clean-up the exynos compatible table by making oneline entry.
Changes from v1:
- Rebased it on Linux 4.0-rc1
- Add acked message by Lukasz Majewski
- Drop first patch [1] because NULL poiner error don't happen.
[1]
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.
This patch includes following dt node to support Exynos5433 SoC:
1. Octa core for big.LITTLE
This patch adds PMU (Power Management Unit) dt node for Exynos5433 SoC and
set the source clock for CLKOUT register as xxti .
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
[ideal.song: Add the setting of CLKOUT register]
Signed-off-by: Inha Song
This patchset adds new 64-bit Exynos5433 Samsung SoC which contains quad
Cortex-A57 and quad Cortex-A53. It is desigend with the 20nm low power process.
This patchset is based on Linux 4.0-rc1.
Depends on:
- This patch-set has the dependency on Exynos5433 clock driver[1][2] and
pinctrl
From: Jaehoon Chung jh80.ch...@samsung.com
This patch adds MSHC (Mobile Storage Host Controller) dt node for Exynos5433
SoC. MSHC is an interface between the system the SD/MMC card.
Cc: Kukjin Kim kg...@kernel.org
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Marc Zyngier marc.zyng...@arm.com
Cc:
This patch adds SPI (Serial Peripheral Interface) dt node for Exynos5433 SoC.
SPI transfers serial data by using various peripherals. SPI includes
8-bit/16-bit/32-bit shift registers to transmit and receive data. PDMA is used
for SPI communication.
Cc: Kukjin Kim kg...@kernel.org
Cc: Mark Rutland
From: Inha Song ideal.s...@samsung.com
This patch adds I2S device tree node for Exynos5433 SoC.
In Exynos5433 SoC, I2S0 is used for audio interface.
Signed-off-by: Inha Song ideal.s...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae inki@samsung.com
---
This patch adds RTC (Real Time Clock) dt node for Exynos5433 SoC and adds
ADC dt node for Exynos5433 SoC. The c1b501564c98a94b4(iio: adc: exynos_adc:
Add support for exynos7) commit supports the ADC for Exynos7. Exynos5433's ADC
IP is the same with Exynos7's ADC IP. Exynos5433 has a little
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