On Mon, Jun 02, 2014 at 05:11:39PM +0900, Jungseok Lee wrote:
On Tuesday, May 27, 2014 11:03 PM, Christoffer Dall wrote:
On Tue, May 27, 2014 at 03:53:49PM +0200, Christoffer Dall wrote:
On Mon, May 12, 2014 at 06:40:54PM +0900, Jungseok Lee wrote:
This patch sets TCR_EL2.PS, VTCR_EL2
Zyngier marc.zyng...@arm.com
Cc: Christoffer Dall christoffer.d...@linaro.org
Signed-off-by: Jungseok Lee jays@samsung.com
Reviewed-by: Sungjinn Chung sungjinn.ch...@samsung.com
---
arch/arm/kvm/arm.c | 82
+-
arch/arm64/include/asm
On Tue, May 27, 2014 at 03:53:49PM +0200, Christoffer Dall wrote:
On Mon, May 12, 2014 at 06:40:54PM +0900, Jungseok Lee wrote:
This patch sets TCR_EL2.PS, VTCR_EL2.T0SZ and vttbr_baddr_mask in runtime,
not compile time.
In ARMv8, EL2 physical address size (TCR_EL2.PS) and stage2 input
marc.zyng...@arm.com
Cc: Christoffer Dall christoffer.d...@linaro.org
Signed-off-by: Jungseok Lee jays@samsung.com
Reviewed-by: Sungjinn Chung sungjinn.ch...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
I'm going to hold off giving this a final review until we have that
previous
steve.cap...@linaro.org
Signed-off-by: Jungseok Lee jays@samsung.com
Reviewed-by: Sungjinn Chung sungjinn.ch...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
Looks reasonable to me:
Acked-by: Christoffer Dall christoffer.d...@linaro.org
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On Wed, May 07, 2014 at 01:22:50PM +0900, Jungseok Lee wrote:
On Tuesday, May 06, 2014 7:49 PM, Christoffer Dall wrote:
On Thu, May 01, 2014 at 11:34:16AM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels of
page tables with 4KB pages cannot
)(x)
+
+#define __pte(x) (x)
+#define __pmd(x) (x)
+#define __pud(x) (x)
+#define __pgd(x) (x)
+#define __pgprot(x) (x)
+
+#endif /* STRICT_MM_TYPECHECKS */
+
+#endif /* __ASM_PGTABLE_4LEVEL_TYPES_H */
--
1.7.10.4
Reviewed-by: Christoffer Dall christoffer.d
);
/* map all the memory banks */
--
1.7.10.4
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
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) 4KB + 3 levels guest on 64KB + 2 levels host
8) 4KB + 4 levels guest on 64KB + 2 levels host
9) 64KB + 2 levels guest on 64KB + 2 levels host
Cc: Marc Zyngier marc.zyng...@arm.com
Cc: Christoffer Dall christoffer.d...@linaro.org
Signed-off-by: Jungseok Lee jays@samsung.com
Reviewed
On Fri, May 02, 2014 at 10:57:09AM +0900, Jungseok Lee wrote:
On Thursday, May 01, 2014 7:06 PM, Christoffer Dall wrote:
On Thu, May 01, 2014 at 11:33:56AM +0900, Jungseok Lee wrote:
[...]
+
+choice
+ prompt Virtual address space size
+ default ARM64_VA_BITS_39 if ARM64_4K_PAGES
CONFIG_ARM64_64K_PAGES
+#ifndef CONFIG_ARM64_2_LEVELS
static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
unsigned long addr)
{
--
1.7.10.4
Otherwise looks good,
Reviewed-by: Christoffer Dall christoffer.d...@linaro.org
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On Thu, May 01, 2014 at 11:34:05AM +0900, Jungseok Lee wrote:
This patch adds memory layout and translation lookup information
about 48-bit address space with 4K pages. The description is based
on 4 levels of translation tables.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Steve Capper
On Mon, Sep 30, 2013 at 05:28:36PM +0200, Antonios Motakis wrote:
This is a preview of the base work, towards VFIO support on ARM platforms
with an IOMMU. It forms a base on to which to implement the functionality
necessary to enable using device tree devices on ARM (and other platforms
based
On Wed, Mar 13, 2013 at 5:59 PM, Alexander Graf ag...@suse.de wrote:
When running on an exynos 5250 SoC, we don't initialize the architected
timers. The chip however supports architected timers.
When we don't initialize them, KVM will try to access them and run into
NULL pointer dereferences
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