tree.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
This patch helps disable CCI on the Arndale Octa board thus resolving
some imprecise aborts seen on that board. Kindly review.
Acked-by: Nicolas Pitre n...@linaro.org
Regards,
Abhilash
---
drivers/bus/arm-cci.c |3
On Thu, 27 Nov 2014, Abhilash Kesavan wrote:
Hi Kevin,
On Thu, Nov 27, 2014 at 12:11 AM, Nicolas Pitre
nicolas.pi...@linaro.org wrote:
On Wed, 26 Nov 2014, Kevin Hilman wrote:
Abhilash Kesavan kesavan.abhil...@gmail.com writes:
Hi Kevin,
On Wed, Nov 26, 2014 at 6:30 AM
On Wed, 26 Nov 2014, Kevin Hilman wrote:
Abhilash Kesavan kesavan.abhil...@gmail.com writes:
Hi Kevin,
On Wed, Nov 26, 2014 at 6:30 AM, Kevin Hilman khil...@kernel.org wrote:
[...]
More specifically, with only the loopback call to turn off CCI commented
out, the imprecise aborts
: activate the CCI on boot
CPU/cluster using the MCPM loopback)
And this is not clear yet if this commit ID is stable.
Other than that:
Acked-by: Nicolas Pitre n...@linaro.org
Please send to RMK's patch system.
---
arch/arm/mach-exynos/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
to it.
Only a dependency on MCPM alone is needed here. And then:
Acked-by: Nicolas Pitre n...@linaro.org
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index 2f6b33ea6e08..459b7c91407a 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
Another suggestion which might possibly be better: why not looking for
the SYS_PWR_CFG bit in exynos_cpu_power_down() directly? After all,
exynos_cpu_power_down
On Sat, 5 Jul 2014, Abhilash Kesavan wrote:
On a different note, I have been using the cpuidle patchset
(https://patchwork.kernel.org/patch/4357421/) as base for S2R support
and had a question. Rather than making the driver depend on
ARCH_EXYNOS should it depend on EXYNOS5420_MCPM which in
On Thu, 3 Jul 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
Changes in v2:
- Made use of the MCPM suspend/powered_up
On Thu, 3 Jul 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Thu, Jul 3, 2014 at 9:15 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Thu, 3 Jul 2014, Abhilash Kesavan wrote:
On Thu, Jul 3, 2014 at 6:59 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
Please, let's avoid
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Fri, Jul 4, 2014 at 12:30 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Thu, 3 Jul 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Thu, Jul 3, 2014 at 9:15 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Thu
On Tue, 1 Jul 2014, Lorenzo Pieralisi wrote:
On Tue, Jul 01, 2014 at 02:14:49PM +0100, Abhilash Kesavan wrote:
Hi Nicolas,
On Tue, Jul 1, 2014 at 9:49 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Mon, 30 Jun 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle
On Tue, 1 Jul 2014, Will Deacon wrote:
Hi Mans,
On Tue, Jul 01, 2014 at 06:24:43PM +0100, Måns Rullgård wrote:
Russell King - ARM Linux li...@arm.linux.org.uk writes:
As you point out, bx lr /may/ be treated specially (I've actually been
Most, if not all, Cortex-A cores do this
On Mon, 30 Jun 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
[...]
Could you tell me more about this?
@@ -150,7 +153,13 @@
On Thu, 26 Jun 2014, Abhilash Kesavan wrote:
Hi,
On Thu, Jun 26, 2014 at 4:28 PM, Abhilash Kesavan a.kesa...@samsung.com
wrote:
Setup the mcpm entry address again on system resume as the
iRAM contents are lost across an s2r cycle.
Signed-off-by: Abhilash Kesavan
On Tue, 24 Jun 2014, Doug Anderson wrote:
Thank you very much for posting! With your series I'm able to boot
all 8 cores on exynos5420-peach-pit and exynos5800-peach-pi sitting on
my desk.
Tested-by: Doug Anderson diand...@chromium.org
Thanks to all. I've submitted those patches, with
For the background story, please see:
http://news.gmane.org/group/gmane.linux.kernel.samsung-soc/thread=32807
I sat on those patches for a while but they are the best I could think of
in terms of implementation. To ease merging I suggest I collect all the
ACK's and Tested-by's and submit them
as it is done for the other CPUs.
Signed-off-by: Nicolas Pitre n...@linaro.org
---
arch/arm/common/mcpm_entry.c | 52
arch/arm/include/asm/mcpm.h | 16 ++
2 files changed, 68 insertions(+)
diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common
The Chromebook firmware doesn't enable the CCI for the boot cpu, and
arguably it shouldn't have to either. Let's have the kernel handle the
CCI on its own for the boot CPU the same way it does it for secondary CPUs
by using the MCPM loopback.
Signed-off-by: Nicolas Pitre n...@linaro.org
---
arch
This is not strictly needed on TC2 but still a good thing to exercise
that code.
Signed-off-by: nicolas Pitre n...@linaro.org
---
arch/arm/mach-vexpress/tc2_pm.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress
another define in mach-exynos/regs-pmu.h to better
identify this register instead of EXYNOS_COMMON_CONFIGURATION()+8 ?
After that, you may add:
Acked-by: Nicolas Pitre n...@linaro.org
Nicolas
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On Mon, 16 Jun 2014, Doug Anderson wrote:
Nicolas,
On Mon, Jun 9, 2014 at 1:55 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Mon, 9 Jun 2014, Kevin Hilman wrote:
On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Mon, 9 Jun 2014, Andrew
On Fri, 13 Jun 2014, Chander Kashyap wrote:
This patch is effectively changing the mcpm_entry_point address from
nsbase + 0x1c to nsbase + 0x8
Hence while integrating with mainline u-boot we need to take care for
new mcpm_entry_point address.
Why not inserting a NOP as the first
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S-state knowledge is not strong, but I believe that Lorenzo's
questions matter if we're using S2 for CPUidle (where we actually turn
off power and hot unplug CPUs) but not when we're using S1 for CPUidle
(where we just enter WFI/WFE).
I believe
On Tue, 10 Jun 2014, Catalin Marinas wrote:
Hi Nico,
Sorry, I can't stay away from this thread ;)
;-)
On Tue, Jun 10, 2014 at 12:25:47AM -0400, Nicolas Pitre wrote:
On Mon, 9 Jun 2014, Lorenzo Pieralisi wrote:
4) When I am talking about firmware I am talking about sequences
On Tue, 10 Jun 2014, Catalin Marinas wrote:
On Tue, Jun 10, 2014 at 05:49:01PM +0100, Nicolas Pitre wrote:
The M-class processor should be treated the same way as firmware. It
ought to be flexible (certainly more than hardwired hardware), but it
shares all the same downsides as firmware
On Mon, 9 Jun 2014, Andrew Bresticker wrote:
[1] While waiting for the forth-coming patch from Andrew to enable the
CCI port for the boot cluster), I do this from u-boot before starting
the kernel (based on earlier email from Doug):
mw.l 10d25000 3 # Enable CCI from U-Boot
On Mon, 9 Jun 2014, Kevin Hilman wrote:
On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Mon, 9 Jun 2014, Andrew Bresticker wrote:
[1] While waiting for the forth-coming patch from Andrew to enable the
CCI port for the boot cluster), I do this from
On Mon, 9 Jun 2014, Lorenzo Pieralisi wrote:
I commented on Nico's patch because I did not like how it was
implemented (at least remove the CPU PM notifier calls please, because
they are not needed).
OK no problem. That's easy enough. I added them to play it safe as a
test patch in case
On Sun, 8 Jun 2014, Lorenzo Pieralisi wrote:
On Sun, Jun 08, 2014 at 12:53:34AM +0100, Olof Johansson wrote:
Lorenzo,
Since you're emailing from @arm.com, some of this is to the wider
recipient and maybe not directly to you:
I am glad to reply and take blame since this is a debate
On Sun, 8 Jun 2014, Russell King - ARM Linux wrote:
On Sat, Jun 07, 2014 at 04:53:34PM -0700, Olof Johansson wrote:
You do realize that you have absolutely zero leverage over us on this,
right? Our product is already shipped with kernel code that fixes
this.
That is never a
On Sun, 8 Jun 2014, Russell King - ARM Linux wrote:
On Sun, Jun 08, 2014 at 02:26:43PM -0400, Nicolas Pitre wrote:
On Sun, 8 Jun 2014, Russell King - ARM Linux wrote:
On Sat, Jun 07, 2014 at 04:53:34PM -0700, Olof Johansson wrote:
You do realize that you have absolutely zero leverage
On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
Hi Nicolas,
The first man of the incoming cluster enables its snoops via the
power_up_setup function. During secondary boot-up, this does not occur
for the boot cluster. Hence, I enable the snoops for the boot cluster
as a one-time setup from the
On Sat, 7 Jun 2014, Lorenzo Pieralisi wrote:
On Sat, Jun 07, 2014 at 05:10:27PM +0100, Nicolas Pitre wrote:
On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
Hi Nicolas,
The first man of the incoming cluster enables its snoops via the
power_up_setup function. During secondary boot-up
On Fri, 6 Jun 2014, Olof Johansson wrote:
On Sat, Jun 07, 2014 at 02:16:27AM +0530, Abhilash Kesavan wrote:
My answer is not use mainline u-boot primarily because I am not sure
mainline u-boot actually works on 5420 :).
And I'm saying that's not the answer primarily because we should
On Fri, 6 Jun 2014, Abhilash Kesavan wrote:
Hi Doug,
The first change in the kernel (clearing an iRAM location) is needed
because of an unnecessary change that we are carrying in the Chrome
U-boot. There is no reason for us to have the workaround in the
mainline kernel. Rather, we should
On Fri, 6 Jun 2014, Doug Anderson wrote:
On exynos mcpm systems the firmware is hardcoded to jump to an address
in SRAM (0x02073000) when secondary CPUs come up. By default the
firmware puts a bunch of code at that location. That code expects the
kernel to fill in a few slots with addresses
On Fri, 6 Jun 2014, Doug Anderson wrote:
Note that handling CPU resume in a way that can be updated by RW
firmware is non-trivial and requires some SRAM to be saved across
suspend/resume.
Saved by the kernel or the firmware?
Nicolas
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Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Nicolas Pitre n...@linaro.org
---
Changes in v2:
- Removed #define
arch/arm/mach-exynos/mcpm-exynos.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c
b
On Thu, 22 May 2014, Daniel Lezcano wrote:
On 05/22/2014 09:57 AM, Leela Krishna Amudala wrote:
This patch is originally based on commit b3377d186572 (ARM: 7064/1:
vexpress: Use wfi macro in platform_do_lowpower.)
Current Exynos CPU hotplug code includes a hardcoded WFI
instruction, in
On Mon, 19 May 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Thu, May 15, 2014 at 10:22 PM, Nicolas Pitre
nicolas.pi...@linaro.org wrote:
Once you implement full cluster shutdown I can provide you with another
script stressing that part.
I am done with the cluster power on/off code
On Thu, 15 May 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Wed, May 14, 2014 at 7:09 PM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
Hi Nicolas,
On Wed, May 14, 2014 at 7:03 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Wed, 14 May 2014, Abhilash Kesavan wrote
On Wed, 14 May 2014, Abhilash Kesavan wrote:
Hi Nicolas,
[...]
1) can't create /sys/devices/system/cpu/cpu//online: nonexistent directory
What do you get if you do:
$ ls -d /sys/devices/system/cpu/cpu?/online
ls: /sys/devices/system/cpu/cpu//online: No such file or directory
On Tue, 13 May 2014, Abhilash Kesavan wrote:
This is v6 of the series adding MCPM backend support for SMP secondary boot
and core switching on Samsung's Exynos5420. The patches are based on the mcpm
support added for Exynos5420 in the Chromium kernel repository here:
On Wed, 14 May 2014, Chander Kashyap wrote:
On 14 May 2014 08:14, Abhilash Kesavan kesavan.abhil...@gmail.com wrote:
Hi Lorenzo,
On Tue, May 13, 2014 at 10:18 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Tue, May 13, 2014 at 12:58:44PM +0100, Abhilash Kesavan wrote:
On Wed, 14 May 2014, Chander Kashyap wrote:
On 14 May 2014 08:32, Nicolas Pitre nicolas.pi...@linaro.org wrote:
On Wed, 14 May 2014, Chander Kashyap wrote:
On 14 May 2014 08:14, Abhilash Kesavan kesavan.abhil...@gmail.com wrote:
On Tue, May 13, 2014 at 10:18 PM, Lorenzo Pieralisi
On Wed, 14 May 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Tue, May 13, 2014 at 11:25 PM, Nicolas Pitre
nicolas.pi...@linaro.org wrote:
On Tue, 13 May 2014, Abhilash Kesavan wrote:
This is v6 of the series adding MCPM backend support for SMP secondary boot
and core switching
...@samsung.com
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Nicolas Pitre ni...@linaro.org
---
arch/arm/mach-exynos/Kconfig |8 +
arch/arm/mach-exynos/Makefile |2 +
arch/arm/mach-exynos/mcpm-exynos.c
On Tue, 22 Apr 2014, Leela Krishna Amudala wrote:
Remove the duplicated code for cache disabling and use
v7_exit_coherency_flush
macro to do the same job.
Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
Acked-by: Nicolas Pitre n...@linaro.org
---
cpu hotplug is tested
On Tue, 8 Apr 2014, Daniel Lezcano wrote:
On 04/08/2014 02:51 PM, Amit Kucheria wrote:
On Tue, Apr 8, 2014 at 5:49 PM, Daniel Lezcano
daniel.lezc...@linaro.org mailto:daniel.lezc...@linaro.org wrote:
There is no point to register the cpuidle driver for the 5440 as it
has only
On Mon, 27 Jan 2014, Russell King - ARM Linux wrote:
On Sun, Jan 26, 2014 at 11:30:00PM -0500, Nicolas Pitre wrote:
On Sun, 26 Jan 2014, Russell King - ARM Linux wrote:
On Tue, Jan 21, 2014 at 12:45:05AM +, Alan Cox wrote:
Peter handed it on. Try using git log on Documentation
On Sun, 26 Jan 2014, Russell King - ARM Linux wrote:
On Tue, Jan 21, 2014 at 12:45:05AM +, Alan Cox wrote:
Peter handed it on. Try using git log on Documentation/devices.txt. It
still gets updates.
Perhaps you'd care to stick to reality and fix the tree instead of trying
to excuse
On Wed, 8 Jan 2014, Doug Anderson wrote:
Hi,
On Wed, Jan 8, 2014 at 11:20 AM, Russell King - ARM Linux
No, we're saying to put the work-around in the boot loader, not the kernel.
Unfortunately the resume path of the firmware runs from Read Only
firmware code (yes, it sucks), so it's
On Wed, 8 Jan 2014, Doug Anderson wrote:
On Wed, Jan 8, 2014 at 11:20 AM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
We've been through these arguments many times, you're not the first to
raise it, and we've decided upon the policy. We want as _few_ work-
arounds in the
On Tue, 26 Nov 2013, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC.
This enables all 8 cores, 4 x A7 and 4 x A15 run at the same time.
Signed-off-by: Tarek Dakhran t.dakh...@samsung.com
Signed-off-by:
On Thu, 17 Oct 2013, Daniel Lezcano wrote:
On 10/17/2013 04:32 PM, Dave Martin wrote:
On Thu, Oct 17, 2013 at 12:45:29PM +0200, Daniel Lezcano wrote:
On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support)
On Mon, 7 Oct 2013, Dave Martin wrote:
On Fri, Oct 04, 2013 at 03:51:31PM -0400, Nicolas Pitre wrote:
No FIQs are supposed to ever race with this code.
There is an anomaly though: FIQ and external abort don't seem to get
explicitly masked anywhere, either on the suspend or powerdown paths
On Wed, 2 Oct 2013, Dave Martin wrote:
On Tue, Oct 01, 2013 at 08:17:04PM +0400, Vyacheslav Tyrtov wrote:
+static int exynos_power_up(unsigned int cpu, unsigned int cluster)
+{
+ int ret;
+ local_irq_disable();
Should there be a local_fiq_disable() here also?
No. In fact
On Tue, 1 Oct 2013, Vyacheslav Tyrtov wrote:
From: Tarek Dakhran t.dakh...@samsung.com
Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC.
This enables all 8 cores, 4 x A7 and 4 x A15 run at the same time.
Signed-off-by: Tarek Dakhran t.dakh...@samsung.com
Signed-off-by:
On Wed, 19 Jun 2013, Tomasz Figa wrote:
On Wednesday 19 of June 2013 20:26:50 Chander Kashyap wrote:
On 19 June 2013 19:58, Tomasz Figa t.f...@samsung.com wrote:
I mean, calculate register offset based on two parameters - cluster ID
and
CPU ID, like:
...
On Tue, 15 Jan 2013, Tomasz Figa wrote:
Hi Nicolas,
On Monday 14 of January 2013 17:13:09 Nicolas Pitre wrote:
On Fri, 11 Jan 2013, Sascha Hauer wrote:
On Thu, Jan 03, 2013 at 04:55:00PM +0100, Tomasz Figa wrote:
Hi,
I'm observing strange behavior when booting 3.8-rc1
On Fri, 11 Jan 2013, Sascha Hauer wrote:
On Thu, Jan 03, 2013 at 04:55:00PM +0100, Tomasz Figa wrote:
Hi,
I'm observing strange behavior when booting 3.8-rc1 and -rc2 with appended
DTB. The kernel hangs very early when the DTB is bigger than some
threshold somewhere around 24 KiB.
On Thu, 3 Jan 2013, Tomasz Figa wrote:
Hi,
I'm observing strange behavior when booting 3.8-rc1 and -rc2 with appended
DTB. The kernel hangs very early when the DTB is bigger than some
threshold somewhere around 24 KiB.
What is the address where you load your zImage?
What if you load it,
On Fri, 20 Jan 2012, Russell King - ARM Linux wrote:
Avoid namespace conflicts with drivers over the CP15 definitions by
moving CP15 related prototypes and definitions to a private header
file.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
Acked-by: Nicolas Pitre n...@linaro.org
On Tue, 10 Jan 2012, Mark Brown wrote:
So, is there anything that people like me who are contributing to rather
than maintaining things can do to help here beyond chasing maintainers?
Generally my process is roughly to monitor what goes into -next and
chase people if things don't make it in
On Tue, 10 Jan 2012, Mark Brown wrote:
On Tue, Jan 10, 2012 at 01:44:54PM -0500, Nicolas Pitre wrote:
On Tue, 10 Jan 2012, Mark Brown wrote:
So, is there anything that people like me who are contributing to rather
than maintaining things can do to help here beyond chasing maintainers
On Wed, 14 Dec 2011, Russell King - ARM Linux wrote:
On Wed, Dec 14, 2011 at 12:32:44PM +, Will Deacon wrote:
On Wed, Dec 14, 2011 at 04:57:10AM +, Axel Lin wrote:
I got below build error on linux-next 20111213.
CC arch/arm/kernel/process.o
In file included from
On Thu, 13 Oct 2011, Thomas Abraham wrote:
On 12 October 2011 22:00, Thomas Abraham thomas.abra...@linaro.org wrote:
On 12 October 2011 21:43, Rob Herring robherri...@gmail.com wrote:
On 10/10/2011 03:11 AM, Thomas Abraham wrote:
ioremap() request for statically remapped regions are
PLAT_PHYS_OFFSET.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
Acked-by: Nicolas Pitre nicolas.pi...@linaro.org
Same comment as for 1/5.
Nicolas
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