Hi Tomasz,
On 19 December 2013 19:40, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin, Andrew,
On Wednesday 18 of December 2013 23:39:58 Sachin Kamat wrote:
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013
Add firmware node for doing secure boot on Arndale-octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
b/arch/arm/boot/dts
Secure firmware support for booting secondary CPUs on Exynos5420
based boards with trustzone support.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/firmware.c|6 +-
arch/arm/mach-exynos/mach
On trustzone enabled boards non-secure SYSRAM is used for
secondary CPU boot up.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/common.c | 11 +++
arch/arm/mach-exynos/include/mach/map.h
On trustzone enabled boards non-secure SYSRAM is used for
secondary CPU boot up.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/common.c | 11 +++
arch/arm/mach-exynos/include/mach/map.h
Secure firmware support for booting secondary CPUs on Exynos5420
based boards with trustzone support.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/firmware.c|6 +-
arch/arm/mach-exynos/mach
Add firmware node for doing secure boot on Arndale-octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
b/arch/arm/boot/dts
Added PMIC node to Arndale-Octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
* Renamed the labels and fixed voltage levels as per board schema.
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 281 +
1 file changed, 281 insertions
Added GPIO based wake up key to Arndale octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
b/arch/arm/boot/dts
LDO10 is directly connected to MMC controller. Register this
through vmmc-supply property.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
On 10 December 2013 12:08, Sachin Kamat sachin.ka...@linaro.org wrote:
S2MPS11 voltage regulator is commonly used on the latest Exynos
boards like SMDK5420, Arndale-Octa, etc. Hence it makes sense to
enable it like S5M8767A voltage regulator.
Signed-off-by: Sachin Kamat sachin.ka
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
From: Andrew Bresticker abres...@chromium.org
The gate clocks for the MFC sysmmus appear to be flipped, i.e.
GATE_IP_MFC[2] gates
Hi Kukjin,
On 12 November 2013 15:53, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Following is more clear?
ARM: dts: Add missing GPIO entries for sd_bus_width4 in exynos5420-pinctrl
Adds missing GPIO entries for sd_bus nodes in exynos5420-pinctrl.
Signed-off-by: Sachin Kamat
Hi Tomasz,
On 10 November 2013 22:44, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:08 Sachin Kamat wrote:
From: Andrew Bresticker abres...@chromium.org
Register the APLL rate table so that we can set the APLL rate from
the cpufreq driver
Hi Tomasz,
On 18 December 2013 20:46, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin,
On Thursday 05 of December 2013 15:14:24 Sachin Kamat wrote:
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
Changed node
until now. While at it clean up the PLL s-div
parameter setting as it is handled by the PLL driver.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Looks good to me.
Reviewed-by: Lukasz Majewski l.majew...@samsung.com
Didn't see this in linux-next yet, hence gentle ping, Rafael
Hi Mark,
Sorry for the late reply as I was sick and still recovering.
On 11 December 2013 00:24, Mark Brown broo...@kernel.org wrote:
On Tue, Dec 10, 2013 at 11:59:18AM +0530, Sachin Kamat wrote:
Added PMIC node to Arndale-Octa board.
Is there a bootloader posted for this anywhere yet?
One
On 13 November 2013 17:51, Tomasz Figa tomasz.f...@gmail.com wrote:
On Wednesday 13 of November 2013 12:52:05 Bartlomiej Zolnierkiewicz wrote:
[+ DT maintainers]
Hi,
On Wednesday, November 13, 2013 11:27:03 AM Sylwester Nawrocki wrote:
On 13/11/13 09:08, Tomasz Figa wrote:
As was
Hi Rahul,
On 6 December 2013 21:26, Rahul Sharma rahul.sha...@samsung.com wrote:
Add support for pll2650xx in samsung pll file. This pll variant
is close to pll36xx but uses CON2 registers instead of CON1.
Aud_pll in Exynos5260 is pll2650xx and uses this code.
Signed-off-by: Rahul Sharma
Hi Rahul,
On 6 December 2013 21:26, Rahul Sharma rahul.sha...@samsung.com wrote:
From: Pankaj Dubey pankaj.du...@samsung.com
exynos5260 use pll2520xx and it has different bitfields
for P,M,S values as compared to pll2550xx. Support for
pll2520xx is added here.
This is a bit confusing to me.
Hi Tomasz,
On 9 December 2013 19:01, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin,
On Thursday 21 of November 2013 09:47:34 Sachin Kamat wrote:
Add CLK_SET_RATE_PARENT flag to be able to change the frequency
to desired value.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Hi Arun,
On 10 December 2013 10:15, Arun Kumar K arunkk.sams...@gmail.com wrote:
Hi Pawel,
On Tue, Dec 10, 2013 at 6:21 AM, Pawel Osciak posc...@chromium.org wrote:
Hi Arun,
Ok will make the change in next version.
While at it also update the patch subject appropriately.
--
With warm
Added PMIC node to Arndale-Octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 220 +
1 file changed, 220 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
b/arch/arm/boot/dts
S2MPS11 voltage regulator is commonly used on the latest Exynos
boards like SMDK5420, Arndale-Octa, etc. Hence it makes sense to
enable it like S5M8767A voltage regulator.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/configs/exynos_defconfig |1 +
1 file changed, 1
Hi Rahul, Young-Gun,
On 6 December 2013 21:26, Rahul Sharma rahul.sha...@samsung.com wrote:
From: Young-Gun Jang yg1004.j...@samsung.com
Add Samsung Exynos5260 SoC specific data to enable pinctrl
support for all platforms based on EXYNOS5260.
Signed-off-by: Pankaj Dubey
Hi Rahul,
On 6 December 2013 21:26, Rahul Sharma rahul.sha...@samsung.com wrote:
From: Pankaj Dubey pankaj.du...@samsung.com
This patch add basic arch side support for exynos5260 SoC.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
Since
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
Changed node name
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 216 +
1 file changed, 216 insertions(+)
diff --git a/arch/arm/boot/dts
Hi Abhilash,
On 3 December 2013 20:16, Abhilash Kesavan kesavan.abhil...@gmail.com wrote:
Hi Yadwinder and Sachin,
CC'ing Doug and Andrew who have also worked on ASV.
I tested these patches on a 5250 Chromebook after modifying the
cpufreq code and a few other changes for booting the board.
On 10 November 2013 23:50, Tomasz Figa tomasz.f...@gmail.com wrote:
On Thursday 07 of November 2013 09:39:46 Sachin Kamat wrote:
Fixed samaung - samsung in property name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |2 +-
1 file
Added high speed I2C nodes to Exynos5420 DT file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
Changed the node name to i2c as suggested by Tomasz Figa.
---
arch/arm/boot/dts/exynos5420.dtsi | 98 +
1 file changed, 98 insertions
On 13 November 2013 09:17, Tushar Behera tushar.beh...@linaro.org wrote:
On 12 November 2013 15:47, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
+ dt ml.
As per the timing information for supported panel, the value should
be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate
On 12 November 2013 16:10, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Fix the name as per DT node naming convention.
- rename the node to syscon which is a more generic name.
- append the register value to the node name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Added missing clock frequency property to CPU node to avoid
boot time warnings.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5250.dtsi |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250
Arndale Octa board is based on Exynos5420 SoC. This patch
adds the basic support required for booting it through DT.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/Makefile|1 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 66
Though the default value is 1, add it explicitly to avoid
unnecessary boot warnings and for consistency.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5250-arndale.dts |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250
The minimum recommended ARM voltage for Exynos5250 at 200MHz
on Arndale board is 0.9125V. Update accordingly.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5250-arndale.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts
On 26 November 2013 09:56, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds new compatible to support HSI2C module on Exynos5260
HSI2C module on Exynos5260 needs to be reset during during initialization.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
[snip]
Add CLK_SET_RATE_PARENT flag to be able to change the frequency
to desired value.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/clk/samsung/clk-exynos5250.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5250.c
b/drivers
driver.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
To fully test this, the following 2 patches would be necessary:
* clk: exynos5250: register APLL rate table
http://www.spinics.net/lists/arm-kernel/msg285103.html
* clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll
http
Hi MyungJoo,
On 18 November 2013 08:07, MyungJoo Ham myungjoo@samsung.com wrote:
2013. 11. 15. 오후 8:44에 Sachin Kamat sachin.ka...@linaro.org님이 작성:
Original cover letter from Yadwinder:
This series is to add basic common infrastructure for ASV.
Basically ASV is a technique used
Original cover letter from Yadwinder:
This series is to add basic common infrastructure for ASV.
Basically ASV is a technique used on samsung SoCs, which provides the
recommended supply voltage for dvfs of arm, mif etc. For a given operating
frequency, the voltage is recommended based on SoC's
(instances).
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/power/Kconfig|1 +
drivers/power/Makefile |1 +
drivers/power/asv/Kconfig| 10 +++
drivers/power/asv/Makefile |1
From: Yadwinder Singh Brar yadi.b...@samsung.com
Since ASV is not a hardware controller, we can't add device tree node
for it. This patch registers a static platform device for Exynos ASV.
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
Signed-off-by: Sachin Kamat sachin.ka
From: Yadwinder Singh Brar yadi.b...@samsung.com
This patch adds basic support (only for ARM ASV) for exynos5250 chips
which have fused ASV group.
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/power/asv/Makefile
From: Yadwinder Singh Brar yadi.b...@samsung.com
This patch adds a common platform driver to register ASV members for
Exynos SoCs.
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/power/asv/Kconfig | 13
Hi Kukjin,
On 12 November 2013 16:33, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Enabled watchdog in Exynos4.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4.dtsi |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts
Hi Kukjin,
On 12 November 2013 16:31, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Since there are no board specific properties for the RTC node,
keep it enabled in the dtsi file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4.dtsi |1
Hi Leela,
Thanks for the detailed explanation.
On 12 November 2013 17:20, Leela Krishna Amudala
leelakrishn...@gmail.com wrote:
Hi Sachin,
On Tue, Nov 12, 2013 at 3:53 PM, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Following is more clear?
ARM: dts: Add missing GPIO entries
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
From: Andrew Bresticker abres...@chromium.org
The gate clocks for the MFC sysmmus appear to be flipped, i.e.
GATE_IP_MFC[2] gates
From: Andrew Bresticker abres...@chromium.org
The gate clocks for the MFC sysmmus appear to be flipped, i.e.
GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr.
Fix this so that the MFC will start up.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Sachin
From: Andrew Bresticker abres...@chromium.org
Register the APLL rate table so that we can set the APLL rate from
the cpufreq driver.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/clk/samsung/clk-exynos5250.c | 25
From: Andrew Bresticker abres...@chromium.org
The EPLL configuration register needs to be saved across
suspend/resume.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/clk/samsung/clk-exynos5250.c |1 +
1 file changed, 1
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 216 +
1 file changed, 216 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
b/arch/arm/boot/dts
Fixed samaung - samsung in property name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
b/arch/arm/boot/dts/exynos5420
-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../bindings/arm/exynos/power_domain.txt |5 +
arch/arm/mach-exynos/pm_domains.c | 10 +++---
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git
Hi Thierry,
On 30 October 2013 10:09, Sachin Kamat sachin.ka...@linaro.org wrote:
Updated supported SoC name for pwm-samsung.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/pwm/pwm-samsung.txt|2 +-
1 file changed, 1 insertion(+), 1 deletion
Added high speed I2C nodes to Exynos5420 DT file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi | 98 +
1 file changed, 98 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts
Added a binding example for reference and updated the
node name. While at it also removed the name description
as it is not necessary.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v2:
* Removed node name description as suggested by Tomasz Figa.
---
.../devicetree
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org
Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT
driver
(suggested by Tomasz Figa t.f...@samsung.com
Enabled watchdog in Exynos4.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4.dtsi |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index ce24edba7f6d..b7378154c0a1 100644
--- a/arch/arm/boot
On 26 September 2013 10:20, Sachin Kamat sachin.ka...@linaro.org wrote:
From: Tushar Behera tushar.beh...@linaro.org
As per the timing information for supported panel, the value should
be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate.
Total horizontal pixels = 1024 (x-res) + 80 (margin
Hi Leela,
On 30 October 2013 12:23, Leela Krishna Amudala l.kris...@samsung.com wrote:
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
arch/arm/boot/dts/exynos5.dtsi| 12 +---
On 30 October 2013 12:23, Leela Krishna Amudala l.kris...@samsung.com wrote:
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.
Signed-off-by: Leela
On 30 October 2013 12:13, Leela Krishna Amudala
leelakrishn...@gmail.com wrote:
Hi Sachin,
On Wed, Oct 30, 2013 at 10:56 AM, Sachin Kamat sachin.ka...@linaro.org
wrote:
Added an example for reference.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings
On 30 October 2013 15:39, Leela Krishna Amudala l.kris...@samsung.com wrote:
Hi,
On Wed, Oct 30, 2013 at 3:22 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
Hi Leela,
On 30 October 2013 15:21, Leela Krishna Amudala l.kris...@samsung.com
wrote:
This patch adds pmusysreg node to Exynos5
Fix the name as per DT node naming convention.
- rename the node to syscon which is a more generic name.
- append the register value to the node name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
* Renamed the node to syscon as suggested by Tomasz Figa.
---
arch/arm
Added a binding example for reference and updated the
node name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/arm/samsung/sysreg.txt |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/samsung
-by: Sachin Kamat sachin.ka...@linaro.org
Cc: Heiko Stuebner he...@sntech.de
Cc: Vinod Koul vinod.k...@intel.com
---
drivers/dma/s3c24xx-dma.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index 4cb127978636..085da4fe6613 100644
Updated supported SoC name for pwm-samsung.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/pwm/pwm-samsung.txt|2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
b/Documentation
-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/pwm/pwm-samsung.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
index b59639e..6d23eb3 100644
--- a/drivers/pwm/pwm-samsung.c
+++ b/drivers/pwm/pwm
Added an example for reference.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |9 +
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
b/Documentation/devicetree
On 28 October 2013 19:07, Guenter Roeck li...@roeck-us.net wrote:
On 10/27/2013 11:24 PM, Sachin Kamat wrote:
Update the name as per DT naming convention.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |2 +-
1 file changed
On 30 October 2013 10:41, Sachin Kamat sachin.ka...@linaro.org wrote:
Added an example for reference.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |9 +
1 file changed, 9 insertions(+)
diff --git a/Documentation
Update the name as per DT naming convention.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/watchdog/samsung-wdt.txt |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
b
Adds missing GPIO entries for sd_bus nodes in exynos5420-pinctrl.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hi Olof,
On 24 October 2013 20:00, Olof Johansson o...@lixom.net wrote:
Hi Kishon,
On Wed, Oct 16, 2013 at 9:28 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c
b/drivers/video/exynos/exynos_mipi_dsi.c
index 32e5406..00b3a52 100644
---
RTC node is enabled in exynos4.dtsi file. Hence remove it from here.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4412-odroidx.dts |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412
Hi Tomasz,
On 17 October 2013 22:00, Tomasz Figa t.f...@samsung.com wrote:
The function can simply return 0, without jumping to a separate label,
which does exactly the same. This patch does not introduce any
functional change, just a clean-up.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Hi Kukjin,
On 26 September 2013 10:20, Sachin Kamat sachin.ka...@linaro.org wrote:
From: Tushar Behera tushar.beh...@linaro.org
As per the timing information for supported panel, the value should
be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate.
Total horizontal pixels = 1024 (x-res
Hi Tomasz,
On 17 October 2013 18:35, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin,
On Thursday 17 of October 2013 17:33:12 Sachin Kamat wrote:
L2x0 cache controller is present only in Cortex-A9 based Exynos4 SoCs.
Thus move this function to Exynos4 early init call to avoid non-Exynos4
Now that Exynos platforms are DT only, hard-coded irqbase is not
necessary.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
drivers/irqchip/exynos-combiner.c |9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/irqchip/exynos-combiner.c
b/drivers
L2x0 cache controller is present only in Cortex-A9 based Exynos4 SoCs.
Thus move this function to Exynos4 early init call to avoid non-Exynos4
SoCs from calling this function in multi-platform support.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh
Hi Jingoo,
On 10 October 2013 12:01, Jingoo Han jg1@samsung.com wrote:
The non-DT for EXYNOS SoCs is not supported from v3.11.
Thus, there is no need to support non-DT for Exynos EHCI driver.
The 'include/linux/platform_data/usb-ehci-exynos.h' file has been
used for non-DT support. Thus,
On 10 October 2013 16:11, Rajeshwari S Shinde rajeshwar...@samsung.com wrote:
+ if(sdd-cur_bpw == 32) {
+ /* For word transfer we need to swap bytes */
+ u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
S3C64XX_SPI_SWAP_TX_BYTE |
+
Kukjin,
Without these patches display is broken on these boards. Please add them.
On 26 September 2013 10:20, Sachin Kamat sachin.ka...@linaro.org wrote:
From: Tushar Behera tushar.beh...@linaro.org
As per the timing information for supported panel, the value should
be between 47.2 MHz
On 10 October 2013 06:00, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch maudio/gps_alive power domain to exynos4x12.dtsi.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4x12.dtsi | 10 ++
1
Hi Leela,
On 10 October 2013 11:12, Leela Krishna Amudala l.kris...@samsung.com wrote:
Add the device-tree binding for the PWM controller to Exynos5250 and
Exynos5420
Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Olof Johansson ol...@chromium.org
Signed-off-by:
Hi Yuvaraj,
On 1 October 2013 12:03, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
This patch adds dt entry for ahci sata controller and its
corresponding phy controller.phy node has been added w.r.t
new generic phy framework.
[snip]
+
+ sata-phy {
Shouldn't this be
Hi Yuvaraj,
On 1 October 2013 12:03, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
Exynos5250 contains one Synopsys AHCI SATA controller.The avalaible
ahci_platform driver is not sufficient to handle the AHCI PHY and PHY
clock related initialization.
+err_out:
+
Hi Yuvaraj,
On 1 October 2013 12:03, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
+static int exynos_sata_i2c_remove(struct i2c_client *client)
+{
+ dev_info(client-adapter-dev,
+ detached %s from i2c adapter successfully\n,
+ client-name);
+
+
On 30 September 2013 12:55, Kukjin Kim kg...@kernel.org wrote:
I think current patch looks good to me, and in this case I don't have any
idea why we should macro for just one time usage.
It is not the question of one time usage, it is just to make the code
more readable.
--
With warm
On 30 September 2013 07:02, Jungseok Lee jays@samsung.com wrote:
+ /* turn off all power domains */
+ addr = of_iomap(np, 0) + 0x14;
+ __raw_writel(0x1, addr);
Actually my comment was more about mentioning what these above values
especially 0x14 represented? Either using
On 28 September 2013 10:37, Jungseok Lee jays@samsung.com wrote:
+static void exynos5440_power_off(void)
+{
+ struct device_node *np;
+ void __iomem *addr;
+
+ np = of_find_compatible_node(NULL, NULL, samsung,exynos5440-clock);
+
+ addr = of_iomap(np, 0) +
of September 2013 10:32:01 Sachin Kamat wrote:
+ regulators {
+ compatible = simple-bus;
+ #address-cells = 1;
+ #size-cells = 0;
+
+ mmc_reg: voltage-regulator {
For consistency and correctness, since this is a bus, even
This has been done for Arndale board vide commit aa3edb65
(ARM: dts: Put Arndale fixed voltage regulators on a simple-bus).
Replicate here for consistency and correctness.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Based on Kukjin's for-next branch.
Changes since v1:
* Added reg
This has been done for Arndale board vide commit aa3edb65
(ARM: dts: Put Arndale fixed voltage regulators on a simple-bus).
Replicate here for consistency and correctness.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Based on Kukjin's for-next branch.
Changes since v1:
* Added reg
-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5250-arndale.dts |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index cee55fa..0c42547 100644
--- a/arch/arm/boot/dts
Hi Leela,
On 27 September 2013 15:46, Leela Krishna Amudala l.kris...@samsung.com wrote:
watchdog@101D {
- compatible = samsung,s3c2410-wdt;
- reg = 0x101D 0x100;
+ compatible = samsung,s3c5250-wdt;
+ reg = 0x101D
On 27 September 2013 15:46, Leela Krishna Amudala l.kris...@samsung.com wrote:
This patch parses the watchdog node to read pmu wdt sys registers addresses
and do mask/unmask enable/disable of WDT in probe and s2r scenarios.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Hi Lukasz,
On 25 September 2013 16:52, Lukasz Majewski l.majew...@samsung.com wrote:
static void exynos4x12_set_apll(unsigned int index)
{
- unsigned int tmp, pdiv;
+ unsigned int tmp, freq = apll_freq_4x12[index].freq;
nit: It is better to put the 'freq' assignment on a new
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