On 06.05.2014 20:09, Sachin Kamat wrote:
[snip]
On 6 May 2014 22:14, Tomasz Figa tomasz.f...@gmail.com wrote:
[snip]
On 06.05.2014 10:10, Sachin Kamat wrote:
[snip]
diff --git a/arch/arm/mach-exynos/platsmp.c
b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f94705..ccbcdd7b8a86 100644
---
Hi Tomasz,
On 7 May 2014 22:33, Tomasz Figa t.f...@samsung.com wrote:
On 06.05.2014 20:09, Sachin Kamat wrote:
[snip]
On 6 May 2014 22:14, Tomasz Figa tomasz.f...@gmail.com wrote:
[snip]
On 06.05.2014 10:10, Sachin Kamat wrote:
[snip]
diff --git a/arch/arm/mach-exynos/platsmp.c
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic SRAM bindings are used
for achieving this.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: Heiko
Hi Tomasz,
On 6 May 2014 22:14, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin,
Thanks for addressing the comments. I need to verify few things on Universal
C210 board first, before I could give my Reviewed-by tag or further
comments.
I also have some general comments that I missed
Hi Tomasz,
On 6 May 2014 23:39, Sachin Kamat sachin.ka...@linaro.org wrote:
Hi Tomasz,
On 6 May 2014 22:14, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin,
Thanks for addressing the comments. I need to verify few things on Universal
C210 board first, before I could give my Reviewed-by
Hi Tomasz,
On 2 May 2014 23:24, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin,
The whole series looks quite good,
Thanks :)
but I have one concern about support for
Universal C210 board. Please see my comment inline.
On 02.05.2014 07:06, Sachin Kamat wrote:
Instead of hardcoding
Hi Sachin,
The whole series looks quite good, but I have one concern about support
for Universal C210 board. Please see my comment inline.
On 02.05.2014 07:06, Sachin Kamat wrote:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic SRAM bindings are used
for achieving this.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: Heiko
