On Wed, May 07, 2014 at 01:22:50PM +0900, Jungseok Lee wrote:
On Tuesday, May 06, 2014 7:49 PM, Christoffer Dall wrote:
On Thu, May 01, 2014 at 11:34:16AM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels of
page tables with 4KB pages cannot
On Thu, May 01, 2014 at 11:34:16AM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels
of page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the following issue.
It is a restriction that kernel logical
On Thu, May 01, 2014 at 11:34:16AM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels
of page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the following issue.
It is a restriction that kernel logical
On Tuesday, May 06, 2014 7:49 PM, Christoffer Dall wrote:
On Thu, May 01, 2014 at 11:34:16AM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels of
page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the
On Tuesday, May 06, 2014 9:02 PM, Steve Capper wrote:
On Thu, May 01, 2014 at 11:34:16AM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels of
page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the
This patch implements 4 levels of translation tables since 3 levels
of page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the following issue.
It is a restriction that kernel logical memory map with 4KB + 3 levels
