Re: [PATCH] ARM: dts: Add peach-pit board support

2014-04-22 Thread Arun Kumar K
Hi Sachin,

Thank you for the review.
Will address you comments and post the next version.

Regards
Arun

On Mon, Apr 21, 2014 at 10:59 AM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Hi Arun,

 On 20 April 2014 10:56, Arun Kumar K arun...@samsung.com wrote:
 Adds the google peach-pit board dts file which uses
 exynos5420 SoC.

 Signed-off-by: Arun Kumar K arun...@samsung.com
 Signed-off-by: Doug Anderson diand...@chromium.org
 ---
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 
  2 files changed, 226 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts

 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 index b9d6a8b..09bcb8d 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
 @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 exynos5250-snow.dtb \
 exynos5420-arndale-octa.dtb \
 exynos5420-smdk5420.dtb \
 +   exynos5420-peach-pit.dtb \

 Please arrange alphabetically. This should be added above smdk.

 exynos5440-sd5v1.dtb \
 exynos5440-ssdk5440.dtb
  dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb
 diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
 b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 new file mode 100644
 index 000..4d61a5e
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 @@ -0,0 +1,225 @@
 +/*
 + * Google Peach Pit Rev 6+ board device tree source
 + *
 + * Copyright (c) 2014 Google, Inc
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +/dts-v1/;
 +#include exynos5420.dtsi
 +
 +/ {
 +   model = Google Peach Pit Rev 6+;
 +
 +   compatible = google,pit-rev16,
 +   google,pit-rev15, google,pit-rev14,
 +   google,pit-rev13, google,pit-rev12,
 +   google,pit-rev11, google,pit-rev10,
 +   google,pit-rev9, google,pit-rev8,
 +   google,pit-rev7, google,pit-rev6,
 +   google,pit, google,peach, samsung,exynos5420;

 Please include the generic samsung,exynos5 string.

 +
 +   memory {
 +   reg = 0x2000 0x8000;
 +   };
 +
 +   fixed-rate-clocks {
 +   oscclk {
 +   compatible = samsung,exynos5420-oscclk;
 +   clock-frequency = 2400;
 +   };
 +   };
 +
 +   pinctrl@1340 {
 +   lid_irq: lid-irq {
 +   samsung,pins = gpx3-4;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   power_key_irq: power-key-irq {
 +   samsung,pins = gpx1-2;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   tpm_irq: tpm-irq {
 +   samsung,pins = gpx1-0;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   pinctrl@1401 {
 +   spi_flash_cs: spi-flash-cs {
 +   samsung,pins = gpa2-5;
 +   samsung,pin-function = 1;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 3;
 +   };
 +
 +   backlight_pwm: backlight-pwm {
 +   samsung,pins = gpb2-0;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   gpio-keys {
 +   compatible = gpio-keys;
 +
 +   pinctrl-names = default;
 +   pinctrl-0 = power_key_irq lid_irq;
 +
 +   power {
 +   label = Power;
 +   gpios = gpx1 2 1;
 +   linux,code = 116; /* KEY_POWER */

 You may use the macro directly (instead of code) by including the
 appropriate header file
 (include/dt-bindings/input/input.h).


 --
 With warm regards,
 Sachin
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Re: [PATCH] ARM: dts: Add peach-pit board support

2014-04-22 Thread Arun Kumar K
Hi Doug,

Thank you for the review.

On Tue, Apr 22, 2014 at 4:26 AM, Doug Anderson diand...@google.com wrote:
 Arun,

 On Sat, Apr 19, 2014 at 10:26 PM, Arun Kumar K arun...@samsung.com wrote:
 Adds the google peach-pit board dts file which uses
 exynos5420 SoC.

 Signed-off-by: Arun Kumar K arun...@samsung.com
 Signed-off-by: Doug Anderson diand...@chromium.org
 ---
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 
  2 files changed, 226 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts

 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 index b9d6a8b..09bcb8d 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
 @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 exynos5250-snow.dtb \
 exynos5420-arndale-octa.dtb \
 exynos5420-smdk5420.dtb \
 +   exynos5420-peach-pit.dtb \
 exynos5440-sd5v1.dtb \
 exynos5440-ssdk5440.dtb
  dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb
 diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
 b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 new file mode 100644
 index 000..4d61a5e
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 @@ -0,0 +1,225 @@
 +/*
 + * Google Peach Pit Rev 6+ board device tree source
 + *
 + * Copyright (c) 2014 Google, Inc
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +/dts-v1/;
 +#include exynos5420.dtsi
 +
 +/ {
 +   model = Google Peach Pit Rev 6+;
 +
 +   compatible = google,pit-rev16,
 +   google,pit-rev15, google,pit-rev14,
 +   google,pit-rev13, google,pit-rev12,
 +   google,pit-rev11, google,pit-rev10,
 +   google,pit-rev9, google,pit-rev8,
 +   google,pit-rev7, google,pit-rev6,
 +   google,pit, google,peach, samsung,exynos5420;
 +
 +   memory {
 +   reg = 0x2000 0x8000;
 +   };
 +
 +   fixed-rate-clocks {
 +   oscclk {
 +   compatible = samsung,exynos5420-oscclk;
 +   clock-frequency = 2400;
 +   };
 +   };
 +
 +   pinctrl@1340 {
 +   lid_irq: lid-irq {
 +   samsung,pins = gpx3-4;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   power_key_irq: power-key-irq {
 +   samsung,pins = gpx1-2;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   tpm_irq: tpm-irq {
 +   samsung,pins = gpx1-0;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   pinctrl@1401 {
 +   spi_flash_cs: spi-flash-cs {
 +   samsung,pins = gpa2-5;
 +   samsung,pin-function = 1;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 3;
 +   };
 +
 +   backlight_pwm: backlight-pwm {
 +   samsung,pins = gpb2-0;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   gpio-keys {
 +   compatible = gpio-keys;
 +
 +   pinctrl-names = default;
 +   pinctrl-0 = power_key_irq lid_irq;
 +
 +   power {
 +   label = Power;
 +   gpios = gpx1 2 1;

 We should probably make the final number GPIO_ACTIVE_LOW instead of 1.
  You'll probably need to add this to the top:
   #include dt-bindings/gpio/gpio.h


Yes I will use macro directly.

 +   linux,code = 116; /* KEY_POWER */

 I believe you can just use KEY_POWER instead of 116 now, though you might 
 need:
   #include dt-bindings/input/input.h

 See tegra124-venice2.dts.

 +   gpio-key,wakeup;
 +   };
 +
 +   lid-switch {
 +   label = Lid;
 +   gpios = gpx3 4 1;
 +   linux,input-type = 5; /* EV_SW */
 +   linux,code = 0; /* SW_LID */

 Similar here.  Use #defines directly.

Here there is a small issue as code 0 is reserved.
I should add a new code for SW_LID and use it here.
In that case I think its better to add as a separate patch.


 +   debounce-interval = 1;
 +   

Re: [PATCH] ARM: dts: Add peach-pit board support

2014-04-22 Thread Arun Kumar K
Hi Tushar,
Thank you for the review.

On Tue, Apr 22, 2014 at 11:13 AM, Tushar Behera
tushar.beh...@linaro.org wrote:
 On 20 April 2014 10:56, Arun Kumar K arun...@samsung.com wrote:
 Adds the google peach-pit board dts file which uses
 exynos5420 SoC.

 Signed-off-by: Arun Kumar K arun...@samsung.com
 Signed-off-by: Doug Anderson diand...@chromium.org
 ---
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 
  2 files changed, 226 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts


 [ snip ]

 +   pinctrl@1340 {
 +   lid_irq: lid-irq {
 +   samsung,pins = gpx3-4;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   power_key_irq: power-key-irq {
 +   samsung,pins = gpx1-2;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   tpm_irq: tpm-irq {
 +   samsung,pins = gpx1-0;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +

 If you plan to respin, please consider keeping the above entries
 sorted based on the pin numbers.

 tpm_irq
 power_key_irq
 lid_irq


Ok will change the order

Regards
Arun


 --
 Tushar Behera
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Re: [PATCH] ARM: dts: Add peach-pit board support

2014-04-21 Thread Doug Anderson
Arun,

On Sat, Apr 19, 2014 at 10:26 PM, Arun Kumar K arun...@samsung.com wrote:
 Adds the google peach-pit board dts file which uses
 exynos5420 SoC.

 Signed-off-by: Arun Kumar K arun...@samsung.com
 Signed-off-by: Doug Anderson diand...@chromium.org
 ---
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 
  2 files changed, 226 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts

 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 index b9d6a8b..09bcb8d 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
 @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 exynos5250-snow.dtb \
 exynos5420-arndale-octa.dtb \
 exynos5420-smdk5420.dtb \
 +   exynos5420-peach-pit.dtb \
 exynos5440-sd5v1.dtb \
 exynos5440-ssdk5440.dtb
  dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb
 diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
 b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 new file mode 100644
 index 000..4d61a5e
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 @@ -0,0 +1,225 @@
 +/*
 + * Google Peach Pit Rev 6+ board device tree source
 + *
 + * Copyright (c) 2014 Google, Inc
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +/dts-v1/;
 +#include exynos5420.dtsi
 +
 +/ {
 +   model = Google Peach Pit Rev 6+;
 +
 +   compatible = google,pit-rev16,
 +   google,pit-rev15, google,pit-rev14,
 +   google,pit-rev13, google,pit-rev12,
 +   google,pit-rev11, google,pit-rev10,
 +   google,pit-rev9, google,pit-rev8,
 +   google,pit-rev7, google,pit-rev6,
 +   google,pit, google,peach, samsung,exynos5420;
 +
 +   memory {
 +   reg = 0x2000 0x8000;
 +   };
 +
 +   fixed-rate-clocks {
 +   oscclk {
 +   compatible = samsung,exynos5420-oscclk;
 +   clock-frequency = 2400;
 +   };
 +   };
 +
 +   pinctrl@1340 {
 +   lid_irq: lid-irq {
 +   samsung,pins = gpx3-4;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   power_key_irq: power-key-irq {
 +   samsung,pins = gpx1-2;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   tpm_irq: tpm-irq {
 +   samsung,pins = gpx1-0;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   pinctrl@1401 {
 +   spi_flash_cs: spi-flash-cs {
 +   samsung,pins = gpa2-5;
 +   samsung,pin-function = 1;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 3;
 +   };
 +
 +   backlight_pwm: backlight-pwm {
 +   samsung,pins = gpb2-0;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   gpio-keys {
 +   compatible = gpio-keys;
 +
 +   pinctrl-names = default;
 +   pinctrl-0 = power_key_irq lid_irq;
 +
 +   power {
 +   label = Power;
 +   gpios = gpx1 2 1;

We should probably make the final number GPIO_ACTIVE_LOW instead of 1.
 You'll probably need to add this to the top:
  #include dt-bindings/gpio/gpio.h

 +   linux,code = 116; /* KEY_POWER */

I believe you can just use KEY_POWER instead of 116 now, though you might need:
  #include dt-bindings/input/input.h

See tegra124-venice2.dts.

 +   gpio-key,wakeup;
 +   };
 +
 +   lid-switch {
 +   label = Lid;
 +   gpios = gpx3 4 1;
 +   linux,input-type = 5; /* EV_SW */
 +   linux,code = 0; /* SW_LID */

Similar here.  Use #defines directly.

 +   debounce-interval = 1;
 +   gpio-key,wakeup;
 +   };
 +   };
 +
 +   rtc@101E {
 +   status = okay;
 +   };
 +
 +   serial@12C3 {
 +   status = okay;
 +   };
 +
 +   mmc@1220 {
 +   status = okay;
 +   num-slots = 1;
 +   broken-cd;
 +

Re: [PATCH] ARM: dts: Add peach-pit board support

2014-04-21 Thread Tushar Behera
On 20 April 2014 10:56, Arun Kumar K arun...@samsung.com wrote:
 Adds the google peach-pit board dts file which uses
 exynos5420 SoC.

 Signed-off-by: Arun Kumar K arun...@samsung.com
 Signed-off-by: Doug Anderson diand...@chromium.org
 ---
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 
  2 files changed, 226 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts


[ snip ]

 +   pinctrl@1340 {
 +   lid_irq: lid-irq {
 +   samsung,pins = gpx3-4;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   power_key_irq: power-key-irq {
 +   samsung,pins = gpx1-2;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   tpm_irq: tpm-irq {
 +   samsung,pins = gpx1-0;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +

If you plan to respin, please consider keeping the above entries
sorted based on the pin numbers.

tpm_irq
power_key_irq
lid_irq


-- 
Tushar Behera
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Re: [PATCH] ARM: dts: Add peach-pit board support

2014-04-20 Thread Sachin Kamat
Hi Arun,

On 20 April 2014 10:56, Arun Kumar K arun...@samsung.com wrote:
 Adds the google peach-pit board dts file which uses
 exynos5420 SoC.

 Signed-off-by: Arun Kumar K arun...@samsung.com
 Signed-off-by: Doug Anderson diand...@chromium.org
 ---
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 
  2 files changed, 226 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts

 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 index b9d6a8b..09bcb8d 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
 @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 exynos5250-snow.dtb \
 exynos5420-arndale-octa.dtb \
 exynos5420-smdk5420.dtb \
 +   exynos5420-peach-pit.dtb \

Please arrange alphabetically. This should be added above smdk.

 exynos5440-sd5v1.dtb \
 exynos5440-ssdk5440.dtb
  dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb
 diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
 b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 new file mode 100644
 index 000..4d61a5e
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
 @@ -0,0 +1,225 @@
 +/*
 + * Google Peach Pit Rev 6+ board device tree source
 + *
 + * Copyright (c) 2014 Google, Inc
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +/dts-v1/;
 +#include exynos5420.dtsi
 +
 +/ {
 +   model = Google Peach Pit Rev 6+;
 +
 +   compatible = google,pit-rev16,
 +   google,pit-rev15, google,pit-rev14,
 +   google,pit-rev13, google,pit-rev12,
 +   google,pit-rev11, google,pit-rev10,
 +   google,pit-rev9, google,pit-rev8,
 +   google,pit-rev7, google,pit-rev6,
 +   google,pit, google,peach, samsung,exynos5420;

Please include the generic samsung,exynos5 string.

 +
 +   memory {
 +   reg = 0x2000 0x8000;
 +   };
 +
 +   fixed-rate-clocks {
 +   oscclk {
 +   compatible = samsung,exynos5420-oscclk;
 +   clock-frequency = 2400;
 +   };
 +   };
 +
 +   pinctrl@1340 {
 +   lid_irq: lid-irq {
 +   samsung,pins = gpx3-4;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   power_key_irq: power-key-irq {
 +   samsung,pins = gpx1-2;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +
 +   tpm_irq: tpm-irq {
 +   samsung,pins = gpx1-0;
 +   samsung,pin-function = 0;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   pinctrl@1401 {
 +   spi_flash_cs: spi-flash-cs {
 +   samsung,pins = gpa2-5;
 +   samsung,pin-function = 1;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 3;
 +   };
 +
 +   backlight_pwm: backlight-pwm {
 +   samsung,pins = gpb2-0;
 +   samsung,pin-function = 2;
 +   samsung,pin-pud = 0;
 +   samsung,pin-drv = 0;
 +   };
 +   };
 +
 +   gpio-keys {
 +   compatible = gpio-keys;
 +
 +   pinctrl-names = default;
 +   pinctrl-0 = power_key_irq lid_irq;
 +
 +   power {
 +   label = Power;
 +   gpios = gpx1 2 1;
 +   linux,code = 116; /* KEY_POWER */

You may use the macro directly (instead of code) by including the
appropriate header file
(include/dt-bindings/input/input.h).


-- 
With warm regards,
Sachin
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[PATCH] ARM: dts: Add peach-pit board support

2014-04-19 Thread Arun Kumar K
Adds the google peach-pit board dts file which uses
exynos5420 SoC.

Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
 arch/arm/boot/dts/Makefile |1 +
 arch/arm/boot/dts/exynos5420-peach-pit.dts |  225 
 2 files changed, 226 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b..09bcb8d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos5250-snow.dtb \
exynos5420-arndale-octa.dtb \
exynos5420-smdk5420.dtb \
+   exynos5420-peach-pit.dtb \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb
 dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
new file mode 100644
index 000..4d61a5e
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -0,0 +1,225 @@
+/*
+ * Google Peach Pit Rev 6+ board device tree source
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include exynos5420.dtsi
+
+/ {
+   model = Google Peach Pit Rev 6+;
+
+   compatible = google,pit-rev16,
+   google,pit-rev15, google,pit-rev14,
+   google,pit-rev13, google,pit-rev12,
+   google,pit-rev11, google,pit-rev10,
+   google,pit-rev9, google,pit-rev8,
+   google,pit-rev7, google,pit-rev6,
+   google,pit, google,peach, samsung,exynos5420;
+
+   memory {
+   reg = 0x2000 0x8000;
+   };
+
+   fixed-rate-clocks {
+   oscclk {
+   compatible = samsung,exynos5420-oscclk;
+   clock-frequency = 2400;
+   };
+   };
+
+   pinctrl@1340 {
+   lid_irq: lid-irq {
+   samsung,pins = gpx3-4;
+   samsung,pin-function = 0;
+   samsung,pin-pud = 0;
+   samsung,pin-drv = 0;
+   };
+
+   power_key_irq: power-key-irq {
+   samsung,pins = gpx1-2;
+   samsung,pin-function = 0;
+   samsung,pin-pud = 0;
+   samsung,pin-drv = 0;
+   };
+
+   tpm_irq: tpm-irq {
+   samsung,pins = gpx1-0;
+   samsung,pin-function = 0;
+   samsung,pin-pud = 0;
+   samsung,pin-drv = 0;
+   };
+   };
+
+   pinctrl@1401 {
+   spi_flash_cs: spi-flash-cs {
+   samsung,pins = gpa2-5;
+   samsung,pin-function = 1;
+   samsung,pin-pud = 0;
+   samsung,pin-drv = 3;
+   };
+
+   backlight_pwm: backlight-pwm {
+   samsung,pins = gpb2-0;
+   samsung,pin-function = 2;
+   samsung,pin-pud = 0;
+   samsung,pin-drv = 0;
+   };
+   };
+
+   gpio-keys {
+   compatible = gpio-keys;
+
+   pinctrl-names = default;
+   pinctrl-0 = power_key_irq lid_irq;
+
+   power {
+   label = Power;
+   gpios = gpx1 2 1;
+   linux,code = 116; /* KEY_POWER */
+   gpio-key,wakeup;
+   };
+
+   lid-switch {
+   label = Lid;
+   gpios = gpx3 4 1;
+   linux,input-type = 5; /* EV_SW */
+   linux,code = 0; /* SW_LID */
+   debounce-interval = 1;
+   gpio-key,wakeup;
+   };
+   };
+
+   rtc@101E {
+   status = okay;
+   };
+
+   serial@12C3 {
+   status = okay;
+   };
+
+   mmc@1220 {
+   status = okay;
+   num-slots = 1;
+   broken-cd;
+   caps2-mmc-hs200-1_8v;
+   supports-highspeed;
+   non-removable;
+   card-detect-delay = 200;
+   clock-frequency = 4;
+   samsung,dw-mshc-ciu-div = 3;
+   samsung,dw-mshc-sdr-timing = 0 4;
+   samsung,dw-mshc-ddr-timing = 0 2;
+   pinctrl-names = default;
+   pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 8;
+   };
+   };