Richard Smith [EMAIL PROTECTED] writes:
Second thing I have got the BIOS writer guide for STPC
So If I think I changes the replaces the code of STPC_ELITE
for that of STPC_ATLAS then I can make it for STPC_ATLAS
If you are going to have to do a lot of re-write work I encourage you
Stefan Reinauer [EMAIL PROTECTED] writes:
* yhlu [EMAIL PROTECTED] [050309 04:27]:
1. LinuxBIOS need to pass the position pirq table to loader.s --- put
that in CMOS or loader.s search that in RAM PIR
2. LinuxBIOS need to pass the entries in e820 at 1MB to loader.s, or
put that in CMOS
Ronald G. Minnich rminnich@lanl.gov writes:
On Thu, 3 Mar 2005, Eric W. Biederman wrote:
Ron does this sound like something you would be willing to look at?
by all means!
I'm in the prep stages of merging my tree with Stefan's. This
first merge is going to be as bad anything I have done
Richard Smith [EMAIL PROTECTED] writes:
On Tue, 8 Mar 2005 09:53:03 -0800, yhlu [EMAIL PROTECTED] wrote:
So need to make shadowing work in V2 before make ADLO working...?
which region?
0xf - 0xf and 0xc- 0xc. Look at util/ADLO/loader.s
That shows you the ranges.
Li-Ta Lo [EMAIL PROTECTED] writes:
what is the tla command for
cvs -d:xxx login
cvs -d:xxx co freebios2
tla register-archive ftp://ftp.openbios.org/pub/arch/[EMAIL PROTECTED]
tla get -A [EMAIL PROTECTED] freebios--devel--2.0
For more information look at:
Ronald G. Minnich rminnich@lanl.gov writes:
On Tue, 8 Mar 2005, Eric W. Biederman wrote:
The next piece to investigate is how we plan on publishing and
committing changes. The bread and butter of a version control system.
Ron are you far enough along in playing with arch that you
Li-Ta Lo [EMAIL PROTECTED] writes:
On Tue, 2005-03-08 at 14:35, Eric W. Biederman wrote:
The biggest problem with arch is that it does not work well on a
windows machine. Mostly because of limitations of windows
filesystems. I believe most of the issues go away if you
don't have your
Li-Ta Lo [EMAIL PROTECTED] writes:
??? I thought vfat support long filenames.
I believe it is the length of the pathname rather than individual filenames.
Although some filenames may also be affected. I really don't understand
it either. This is my dim recollection from watching some of the
Dmitriy Budko [EMAIL PROTECTED] writes:
From: Eric W. Biederman
Does vmware
accurately simulate what is required to bring memory up or do we
get to short cut that. If the latter the porting could be done
very quickly. Memory initialization is generally the hard part
Li-Ta Lo [EMAIL PROTECTED] writes:
I am reading the manual now. One question regarding development model.
Are we going to have multiple local archive for each developer and
sync to some upstream archive ([EMAIL PROTECTED]) from time to
time?
The current situation is that there are already at
yhlu [EMAIL PROTECTED] writes:
LinuxBIOS already got pirq table and mptable and may put vga_bios in 0xc.
I would help ADLO can get these data automatically.
Right if the ADLO loader can be tweaked to copy these from LinuxBIOS
we could shortly have a generic ADLO which would be much
yhlu [EMAIL PROTECTED] writes:
1. LinuxBIOS need to pass the position pirq table to loader.s --- put
that in CMOS or loader.s search that in RAM PIR
2. LinuxBIOS need to pass the entries in e820 at 1MB to loader.s, or
put that in CMOS in LinuxBIOS stage. what standard need to put
this
Richard Smith [EMAIL PROTECTED] writes:
On Fri, 04 Mar 2005 15:37:31 -0600, Bari Ari [EMAIL PROTECTED] wrote:
http://wiki.linuxbios.org/ADLO
That info is all from my V1 stuff and ADLO is not in V2 yet. However
its just a elf payload just like anything else so it will load fine.
It
Dmitriy Budko [EMAIL PROTECTED] writes:
From: Ronald G. Minnich
On Mon, 7 Mar 2005, Dmitriy Budko wrote:
Does anybody needs LinuxBIOS for VMware virtual machines?
If you want it please describe why do you want it.
it would sure make it easier to do full-up sims of
Justin C. Darby [EMAIL PROTECTED] writes:
* Lustre (If I can get a good dialogue with the ClusterFS folks started..
still waiting to hear from them. I need to mirror two hard disks over
1000mbit tcp/ip for redundancy.)
For the small scale you are looking at, I recommend you look at
nbd and
Ronald G. Minnich rminnich@lanl.gov writes:
On Mon, 28 Feb 2005, Josh England wrote:
The offer still stands to host SVN for the freebios trees as well as
host linuxbios.org, plan9.net, etcI think the server is close to
being ready. We'll have to figure out how to best transfer the
Ramesh Chhaba [EMAIL PROTECTED] writes:
Hi all
I am trying to learn how to makemy own BIOS
for my embedded PC. I want to make freebios as my root
for the project .
If there is anybody woh have usedthe project.
Several.
when I make it gives error of missing files like
rom/stpc.h
Ramesh Chhaba [EMAIL PROTECTED] writes:
Hi Eric ,
thanks for ur response
u r right i am having old copy
plz tell me link from where I can get latest copy and procedure to compile it
and make bios for my board.
I am using ATPC Vega Board.
There is a reason a copied the linuxbios list.
Guido Fiala [EMAIL PROTECTED] writes:
Hallo Mr. Biederman,
came to contact you reading your article in the Linuxjournal:
http://www.linuxjournal.com/article/4888
You mention that you managed to set up Linuxbios for 3 mainboards, was it a
big job or quite easy to do?
The hard part is
Li-Ta Lo [EMAIL PROTECTED] writes:
On Mon, 2005-02-07 at 10:16, Richard Smith wrote:
The emulator is slightly larger than 32KB. For the Tyan S2885
mainboard, the difference of the final romimage is 41376 bytes.
Actuall, it is for uncompress romimage. For compressed image,
it is
Richard Smith [EMAIL PROTECTED] writes:
Yes you can do that with ELF.
The big gotcha is going to be that there are pirq tables current
stored at 0xf that you are not going to want to stomp.
Actually thats not that much of an issue. It currently stomps it already
ADLO has that
Richard Smith [EMAIL PROTECTED] writes:
Thinking about ADLO and the shadow enable/disable got some wheels turning.
I've been spending lots of time in V2 and I was wondering if the same
type of methodology can't work for ADLO.
In V2 there are specifc .c files that do thing in a chipset
Adam Sulmicki [EMAIL PROTECTED] writes:
On Wed, 26 Jan 2005, Richard Smith wrote:
I wonder if we could not just set things up where the ELF loader just
loas it into the right spot in the first place. Perhaps that
overwrites where the ELF code lives?
if the ram/shadowing was setup
YhLu [EMAIL PROTECTED] writes:
in reset16.lds
_ROMTOP = (_start = 0x) ? 0xfff0 : 0x8;
0x8 ?
And from the line above.
/* Trigger an error if I have an unuseable start address */
That is exactly what happens correct? 0xfff8 does not work
YhLu [EMAIL PROTECTED] writes:
The problem solved.
I switch the auto.c... before reset.inc in MB Config.lb
Also add two inc in it
mainboardinit arch/i386/lib/jmp_auto_out.inc
after auto.c segment
mainboardinit arch/i386/lib/jmp_auto.inc
in old auto.c position
please advise where
Richard Smith [EMAIL PROTECTED] writes:
And since I don't have prototypes (which makes inlining easier) those
functions must be defined before they are used.
Just curious now, how does the lack of prototypes make inlining easier?
The primary benefit comes from compiling everything in
Ronald G. Minnich rminnich@lanl.gov writes:
On Thu, 20 Jan 2005, Eric W. Biederman wrote:
Yeah I would say so... Since you guys have the power to render 1000
paperweights with a single command.
Ron came insanely close to doing just that a while ago.
?? when was that? I gotta
Richard Smith [EMAIL PROTECTED] writes:
It should be straight forward to remove all of the tests etc for
switching
from a fallback to a normal image.
Do I really have to remove them? Ron seemed to suggest that if I just
turn off the fallback suff then I will end up with
Richard Smith [EMAIL PROTECTED] writes:
To start I added all of this framework in freebios v1.x and it
caused not problems there. We just default to using it all in v2.
There should be no reason to require it. Especially if you are doing
your own motherboard.
I would like what I'm
Richard Smith [EMAIL PROTECTED] writes:
cpu model_6xx will not build.
microcode_MU16930c.h: No such file or directory.
A typo in the header file include name. It should
be microcode_MU16830c.h I just committed the fix.
The code was mostly written by converting old freebios1 code,
and
Gin [EMAIL PROTECTED] writes:
Is it mandatory to report Reserved Memory region to the OS? For example,
the IOAPICs memory-mapped addresses?
Reserving the address of any IO devices is a BUG BUG BUG.
Your kernel will not boot if it doing things properly.
Would that be a problem if Linux
Richard Smith [EMAIL PROTECTED] writes:
probably because the cmos checksum is wrong. You need to use cmos_util
(from LNXI ftp site) to set up the cmos with good params and checksum.
the docs I could find. My cmos is now fixed up, and I'm getting in to
my normal image.
H... Our
Stefan Reinauer [EMAIL PROTECTED] writes:
* Ronald G. Minnich rminnich@lanl.gov [050118 20:05]:
I'd like to hear more about what Stefan had in mind for the 'small set of
C
functions'. Maybe the simplest way would be to pass the device tree itself
to
the payload? I guess it
Richard Smith [EMAIL PROTECTED] writes:
:)
Do you have any other non-volatile storage?
Nope.
A serial eeprom might be another good choice, of a location for variables.
Anyway I understand the reasons for it and will happily work on
brainstorming
By design if you want to change
Richard Smith [EMAIL PROTECTED] writes:
Ok so by design you really only want a single firmware image.
Right.. I think Ron has me fixed up. I was unaware that there was an
overall flag that enabled/disabled the fallback system.
In the generic code yes.
It should be straight forward
Stefan Reinauer [EMAIL PROTECTED] writes:
Hi,
Porting LinuxBIOS to new motherboards has become easier and easier over
the last period of time. There's almost no need for assembler coding
anymore, Hypertransport featured systems do a completely automatical
setup of their non coherent
Li-Ta Lo [EMAIL PROTECTED] writes:
On Tue, 2005-01-11 at 16:52, Ronald G. Minnich wrote:
Ollie, you did it!
We should thank SciTech for their wonderful emulator.
Yes.
Ollie just took a big stack of video cards, some AGP and some PCI, and
booted linuxbios one at a time and showed
YhLu could you please, please, please fix your mailer so it
sets In-Reply-To: and References: correctly or could you switch
to a mailer that does. Catching up on a conversation like
this when all of the threads are chopped in to little pieces
is a major pain.
It does not help that you are also
Ronald G. Minnich rminnich@lanl.gov writes:
On Tue, 18 Jan 2005, Greg Watson wrote:
I'd like to hear more about what Stefan had in mind for the 'small set of C
functions'. Maybe the simplest way would be to pass the device tree itself
to
the payload? I guess it wouldn't solve the
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman ebiederman@lnxi.com [050118 12:51]:
I agree that there is an issue particularly with respect to
interrupts. A lot of this has waited until we have the time to
do this properly.
I agree. However I also think we are coming
Greg Watson [EMAIL PROTECTED] writes:
On Jan 18, 2005, at 4:51 AM, Eric W. Biederman wrote:
The only issue really is what format to use for serialization. I'm leaning
towards s-expressions for use with openbios. However, it's conceivable that
different serialzation methods could be provided
[EMAIL PROTECTED] writes:
Hi Bari,
I have the plain old VIA EPIA (800/5000) working a good 80 % of the time.
Not sure if my problems are buggy northbridge setup or buggy motherboard - it
generates some spurious serial at power on, and sometimes hangs reading the
smbus to size the ram.
YhLu [EMAIL PROTECTED] writes:
You are kidding. I put junk in the CVS server?
No. I just could not remember if it was a recent or an ancient board.
If it was an ancient board in the v2 tree I could see problems.
I guess he still need some time to figure out how to modify his mptable.c.
Eric
YhLu [EMAIL PROTECTED] writes:
Eric,
When can you put the E7520 support on the CVS server?
I have worked out all amd64 dual core support even on 8 way system and want
to play something else.
:)
Currently this is Eric limited :) I need to send off the latest version
of my kexec work to
Greg Watson [EMAIL PROTECTED] writes:
An arbitrary graph seems to be adding additional complexity that we don't
really
need. Do you have an example of where a tree won't actually suffice?
The way interrupts are hooked up on most every board, I have seen including
dec alphas.
When you add
Richard Smith [EMAIL PROTECTED] writes:
I need to start looking at moving the 440bx stuff to
V2. The part I'm most concerned about is re-writing
the ram init code.
Is it possible to use the V2 structure but graft in
the assembly output from V1? Then as time permits I
can go back and
Adam Talbot [EMAIL PROTECTED] writes:
Need some way to test if linuxbios is booting correctly. I am debugging and
I have reason to believe that my problem is the super io... Does any one
know how to get the pc speaker to beep in X second intervals, or some thing
that simple, power LED
Richard Smith [EMAIL PROTECTED] writes:
I don't understand the cpu naming scheme in the
cpu/intel dirctory.
Our board uses a PIII Celeron in a PGA socket 370 @
400 Mhz
should I just call the directory socket_PGA370 or do I
need to add speed info? What about the Celeron,
non-celeron
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
Why I got the overlaping IO resources in the 18:0 ?
PCI: 00:18.0 1ba - [0x00f400 - 0x00f5ff] prefmem node 0 link2
PCI: 00:18.0 1c2 - [0x001000 - 0x001fff] io node 0 link 2
PCI: 00:18.0 1d8 - [0x002000 - 0x001fff] io node 0
Ronald G. Minnich rminnich@lanl.gov writes:
bitkeeper anyone? I'm using it for a lot of projects and going back to
sourceforge all the time is getting annoying.
If we made regular releases bitkeeper might be an option.
As it is I have extreme problems with their free license.
Stefan how has
Li-Ta Lo [EMAIL PROTECTED] writes:
Hello,
It turns out that the VGABIOS support can be made pretty generic
for all kinds of PCI expansion ROM. So I have the emulator the
.init method of default_pci_ops_dev. I am going to add the following
directories, if there is no objection, I will
Li-Ta Lo [EMAIL PROTECTED] writes:
Ron,
I just got the vgabios emulation working in the LinuxBIOS. The VGA card
is complete inited before the kernel is loaded. Now I have vga console
just like normal bios system.
I will try the reduced x86emu and see if it works too.
How large was
Stefan Reinauer [EMAIL PROTECTED] writes:
* Stefan Reinauer [EMAIL PROTECTED] [050104 00:29]:
Hi,
I want to look at some old files I checked into LinuxBIOS CVS a looong
time ago, implementing LDTSTOP_L. But SF's ViewCVS does not show the
Attic anymore.. is there a trick to get them?
YhLu [EMAIL PROTECTED] writes:
/tmp/ccX7Rb2q.s:9: Warning: setting incorrect section attributes for
.rodata.pci_driver
Why?
Good question. We set section attributes that say the section will
be present. Beyond that I don't know why binutils (I think it's as in
this case) is complaining.
Adam Talbot [EMAIL PROTECTED] writes:
Hummm. Got both tomsrtbt and coyote Linux running. coyote Linux is very
nice and I have other apps for it. But none of those had minicom on them.
Any other ideas?
cat /dev/ttyS0
cat /dev/ttyS0
Should just about do it.
Or for something a little more
Greg Watson [EMAIL PROTECTED] writes:
On Dec 9, 2004, at 10:49 PM, Eric W. Biederman wrote:
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Thu, 9 Dec 2004, Eric W. Biederman wrote:
I am still worried about ppc, and big endian architectures in general.
But I don't think we currently
Stefan I believe I have a better fix for the LinuxBIOS table
bug then __attribute__((packed)).
How does this look?
I am still worried about ppc, and big endian architectures in general.
But I don't think we currently have any users there.
I don't know what is the best long term strategy for
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Thu, 9 Dec 2004, Eric W. Biederman wrote:
I am still worried about ppc, and big endian architectures in general.
But I don't think we currently have any users there.
we do. I think I'd like to hear Greg Watson's take on this as he
Yinghai Lu [EMAIL PROTECTED] writes:
The D0 is released last week. And Normal BIOS support it already.
Thanks for your great job in raminit.c of K8 and others, and I add several
lines to reflect the new mapping of memory bank.
Cool.
I am confused about what the current situation is. All I
YhLu [EMAIL PROTECTED] writes:
Opteron Rev D0 support done.
So I need to wait for AMD put the updated Bios porting guide including
Opteron Rev D0 info. Only after that, I can commit the patch?
Or ask the AMD to review the code?
Essentially.
It all depends on your relationship. But as a
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
You explained substractive decoding to me long time ago but I really
forgot what it is. Could you tell me again ? Hoe do you determine if
some resource of some device is substractive ? Form the data sheet ?
A subtractive bridge resource is a
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
I tried to allocate a MEM resource for legacy VGA framebuffer (0xA -
0xB) on AMDK8 NB Fun 1. I find a new mem_pair and assigned base
and size of the resource as the code show in the bottom. But at the run
time the resrouce allocation code
YhLu [EMAIL PROTECTED] writes:
northbridge/amd/amdk8/cpu_rev.c
static int is_cpu_pre_c0(void)
{
return (cpuid_eax(1) 0xffef) 0x0f48;
}
Why need to and 0xffef?
Look at the various cpuid values that happen to be c0 stepping
processors.
Eric
YhLu [EMAIL PROTECTED] writes:
Eric,
Are you working on Opteron D0 support? There are some memory initialization
changes to support D0...
It is on the near term TODO list, as are way to many other
things. I need to make certain I have some so I can test with them.
My impression the biggest
YhLu [EMAIL PROTECTED] writes:
I add some code to debug_device to dump smbus for S4882.
Please let me know if you need me to commit it.
I don't know about need but I think it could be handy to have.
Especially as we don't have many users of i2c code in the tree at the present
time.
Eric
Stefan Reinauer [EMAIL PROTECTED] writes:
Hi there,
the error disclosure of the config tool is a little bit mystic.
Building the sandpoint configuration says the following:
This looks like an error in the config tool, while it is a mistake in the
config file. Is there any easy way to
Stefan Reinauer [EMAIL PROTECTED] writes:
Hi,
I got an interesting report today from a customer having problems
with building LinuxBIOS and the payload with different compilers
The problem is that different compilers handle structure alignment
differently, ie 2.95.x and 3.x have
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Fri, 26 Nov 2004, Stefan Reinauer wrote:
I think the big problem is the use of binary data structures. It shows how
smart the Open Boot guys were to use strings, and they figured this out 16
years ago!
open boot provides a single function you
YhLu [EMAIL PROTECTED] writes:
Every pci_read_config and pci_write_config need to findout top parenent bus
to get bus ops. (get_pbus).
It looks weird
Yes, it does look weird. But it comes very close to modeling reality.
You have to find the top of the pci bus to perform reads and
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
What was the conclusion of invalidating the cache and TLB ?
If found that
xorl%eax, %eax
movl%eax, %cr3/* Invalidate TLB*/
still exists in the current CVS.
Cache invalidates are actively harmful, as they can loose
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
From my understanding, the device.link for bridge device does not
include the up stream bus.
Correct it only includes the device itself.
device.link.dev == device
The up stream bus is the device.bus field.
Correct.
So for 'normal' PCI bridges,
Adam Talbot [EMAIL PROTECTED] writes:
Any ideas on this error? What is causing theis?
/root/freebios2/src/mainboard/commell/lv-671/auto.c -o auto.inc
raminit.c:1369.39:
member channel1 not present
It looks like you are trying to compile code that references a structure
member you don't
YhLu [EMAIL PROTECTED] writes:
It seems that mkelfImage should get the com address from commandline.
For example:
mkelfImage --command-line=ramdisk_size=65536 root=/dev/ram0 rw console=tty0
console=ttyS1,115200n8 --kernel=linuxkernel/bzImage_2.
6.9_k8.2 --ramdisk=rootfs/mydisk8_com2.gz
Just a progress update before I go to bed.
I have the totalimpact/briq building now. There are a couple of things
that are not quite right but nothing architectural.
Looking at where the code is I should be able to get the
sandpointx3+pmc/altimus/mpc7410 building. Since there is only one pmc
Ok I am starting to dig into these and figure out what needs to happen
to get the ppc targets working again.
The hardest case currently appears to be the sandpointx3 with pmc
processor modules, so I will get to it last. The whole northboard/southboard
thing is interesting. But something we
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
Is there any reason that you put the root_complex driver in
amdk8/northbridge.c instead of amdk8/root_complex/root_complex.c?
Because the is very strongly intertwined.
Eric
___
Linuxbios mailing list
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
Is there any reason that you put the root_complex driver in
amdk8/northbridge.c instead of amdk8/root_complex/root_complex.c?
Because the code is very strongly intertwined.
Logical things the pieces are separate but in practice they are not.
Eric
Li-Ta Lo [EMAIL PROTECTED] writes:
Eric,
The lpci_set_subsystem() in amd8111_ac97.c is exactly the same as the
default pci_dev_set_subsystem(), why do you define it instead of using
the default one?
Probably because I didn't realize it. It seems like every device
has a different function.
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman [EMAIL PROTECTED] [041109 23:19]:
I'll try to find more if I get time today.
A complex case would be fine. With abuild.sh I'm not seeing any compile
failures.
Something's wrong with the line numbers. I get
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric Biederman [EMAIL PROTECTED] [041115 11:46]:
Modified Files:
coherent_ht.c
Log Message:
- optimize_link_read_pointers compiles now on the solo so don't disable it.
The problem was actually not htat it did not compile, but that it
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman [EMAIL PROTECTED] [041115 17:42]:
However there are 2 significant checks we can perform.
- Did the original version compile?
- Does this work on the tyan/s2850
does the s2850 use an athlon64? Iirc the problem
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Mon, 15 Nov 2004, Gin wrote:
I have a question with the ram. Don't know if anyone has heard the same
problem before. I ran the ram_check procedure and it reports that there
are always 4 bytes out of every 64 bytes that reads zero. I think
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman [EMAIL PROTECTED] [041115 17:42]:
However there are 2 significant checks we can perform.
- Did the original version compile?
- Does this work on the tyan/s2850
does the s2850 use an athlon64? Iirc the problem
Greg Watson [EMAIL PROTECTED] writes:
We now seem to have a chip keyword, in addition to config, device, driver and
object keywords. We have a device_operations structure, a cpu_device_id
structure and a cpu_driver structure as well as a pci_driver structure. The
cpu
tree has been
YhLu [EMAIL PROTECTED] writes:
pnp_enable_devices(dev, pnp_ops,)
I think the second parameter is not necessary and can be removed.
Sounds right.
Eric
___
Linuxbios mailing list
[EMAIL PROTECTED]
Greg Watson [EMAIL PROTECTED] writes:
On Nov 11, 2004, at 7:27 PM, Eric W. Biederman wrote:
Stefan Reinauer [EMAIL PROTECTED] writes:
The ppc targets fail because of src/cpu/ppc/ppc4xx/mem.c
struct mem_range is never ever defined. Is it struct lb_memory?!
That is because of the big
YhLu [EMAIL PROTECTED] writes:
In the cpu/x86/mtrr/mtrr.c
#warning FIXME I do not properly handle address more than 36 physical
address bits
#ifdef k8
# define ADDRESS_BITS 40
#else
# define ADDRESS_BITS 36
#endif
#define ADDRESS_BITS_HIGH (ADDRESS_BITS - 32)
#define ADDRESS_MASK_HIGH
Stefan Reinauer [EMAIL PROTECTED] writes:
* Stefan Reinauer [EMAIL PROTECTED] [04 22:10]:
BTW, the latest changes made things a little more dramatic again.
In size, compile time and compile success.
With my current board I get these:
romcc_io.h:106.27: coherent_ht.c:585.48:
Stefan Reinauer [EMAIL PROTECTED] writes:
The ppc targets fail because of src/cpu/ppc/ppc4xx/mem.c
struct mem_range is never ever defined. Is it struct lb_memory?!
That is because of the big change where sizeram was removed.
I think the definition originally sat in src/include/mem.h
Which has
Stefan Reinauer [EMAIL PROTECTED] writes:
Hi,
The abuild script checks for new checkins now every 4h and logs are
placed at: http://snapshots.linuxbios.org/stats/
BTW, the latest changes made things a little more dramatic again.
In size, compile time and compile success.
Thanks. Sorry
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman [EMAIL PROTECTED] [041109 23:19]:
I'll try to find more if I get time today.
A complex case would be fine. With abuild.sh I'm not seeing any compile
failures.
Something's wrong with the line numbers. I get
[EMAIL PROTECTED] (Eric W. Biederman) writes:
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman [EMAIL PROTECTED] [041109 23:19]:
I'll try to find more if I get time today.
A complex case would be fine. With abuild.sh I'm not seeing any compile
failures
Perhaps the list can help. At the moment I don't have time
Eric
---BeginMessage---
Hello ... my name is David.
I'm writing to you because you are on the AUTHORS file
on freebios download and I need some help.
I have a Boundless Tech ViewPoint TC that has 4mbyte
flash soldered onboard
YhLu [EMAIL PROTECTED] writes:
I met that too, and I have remove some un converted code in E7501 raminit.c
Ok. Checking out the old version I can reproduce this problem.
I would like to see Ron's case but YhLu I know what is causing the problem
for the old northbridge/e7501/raminit.c case.
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Tue, 9 Nov 2004, Eric W. Biederman wrote:
A complex case would be fine. With abuild.sh I'm not seeing any compile
failures.
weird! The digitallogic adl855pc won't build for me at all ...
I meant I was not seeing any new build failures
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Wed, 10 Nov 2004, Eric W. Biederman wrote:
Placing the unconverted assembly in strings, or simply commenting it out
will avoid the issue for now.
Or removing it.
True.
Next time can you an least give the me error message?
Having
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Tue, 9 Nov 2004, YhLu wrote:
I met that too, and I have remove some un converted code in E7501
raminit.c
it's hard to reproduce with simple cases -- I'm trying to create the
simple case but romcc always gets those right.
I'll try to
Stefan Reinauer [EMAIL PROTECTED] writes:
* Eric W. Biederman [EMAIL PROTECTED] [041109 23:19]:
I'll try to find more if I get time today.
A complex case would be fine. With abuild.sh I'm not seeing any compile
failures.
Something's wrong with the line numbers. I get
Ronald G. Minnich [EMAIL PROTECTED] writes:
On Fri, 5 Nov 2004, Eric W. Biederman wrote:
They can. But I am about to suggest simply removing the config
directive, and assuming the ``config chip.h'' is always given. The
overhead is almost zero for a zero filled structure. And always
YhLu [EMAIL PROTECTED] writes:
It seems there is no support on that.
Option for you:
1. add that support you self and contribute that to Etherboot.
2. push AMD to support that. Can they?
3. push AMD to pay Etherboot ( Ken, Tim, Eric) to add that for you. I don't
think Eric could have time
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