* Ronald G. Minnich rminnich@lanl.gov [050414 21:10]:
no, as Intel does not want it to happen. They are determined to ensure
that no future Intel hardware can run linuxbios. They have stated as much
to me directly. I am hoping this situation will change at some point,
however, as some
Hi,
As the title implies I went to the Wiki to work out how to download
everything to bring myself into synch. It happens that the ones for
the old CVS storage need to be revised. Sometime ago those crazy
people at Source Forge rewrote the mechanisms behind the root for CVS,
instead of the
* Huang-Jen Wang [EMAIL PROTECTED] [050412 06:10]:
Hi All,
I tried to build a linuxbios for Arima Hdama, but the rom can't work
I use a debug card , and it shows post code fe
what dose it mean?
Did you attach a serial console? Does it say anything?
Stefan
* Florian Zeitz [EMAIL PROTECTED] [050313 16:17]:
I would like to contribute the following to the LinuxBIOS wiki in case
it's useable:
1. I have written a rather small python script to convert the Options.lb
to a XML file which is much more useable for the web in most cases.
2. I have
* Tony S. [EMAIL PROTECTED] [050312 03:22]:
I was looking at the wiki page and I thought it would look cool with
the linuxbios logo with a transparent background so I edited it :)
Hope you guys like it :)
Very nice, thanks! It definitely looks better.
Stefan
* yhlu [EMAIL PROTECTED] [050309 04:27]:
1. LinuxBIOS need to pass the position pirq table to loader.s --- put
that in CMOS or loader.s search that in RAM PIR
2. LinuxBIOS need to pass the entries in e820 at 1MB to loader.s, or
put that in CMOS in LinuxBIOS stage. what standard need to
* Richard Smith [EMAIL PROTECTED] [050309 17:06]:
I'm trying to create the patch for my 440bx stuff but I need some
help. I have a bunch of new files that I added in the tree. So 'cvs
diff' dosen't know about these files and dosen't show anything on the
diffs.
If I check out a new copy of
* Richard Smith [EMAIL PROTECTED] [050309 17:58]:
I always do something like
cvs update | grep ^? | cut -f2 -d\ |while read name
do
diff -uN /dev/null $name mypatch.newfiles.diff
done
but it is not exactly elegant
I can't seem to make that work. Do I have to protect
* Robin Randhawa [EMAIL PROTECTED] [050222 17:12]:
Hi Stefan.
Thanks for your prompt response.
That would be nice.
Will look forward to checking out your code. Do let me know when you
would be able to hand it over,
Hi Robin,
Sorry for not coming back to you earlier. I attach the dram
* Eric W. Biederman ebiederman@lnxi.com [050308 10:37]:
The next piece to investigate is how we plan on publishing and
committing changes. The bread and butter of a version control
system. Ron are you far enough along in playing with arch
that you are ready for that piece of the
* yhlu [EMAIL PROTECTED] [050308 18:56]:
Can we put the server in US instead of EU?
YH
The machine is hanging off the second hop from the Frankfurt backbone
over to the US, 7 hops from tyan.com... This should be a _lot_ faster
than sourceforge.net
Have you had throughput/latency problems?
* Li-Ta Lo [EMAIL PROTECTED] [050308 20:13]:
[EMAIL PROTECTED]/freebios--devel--2.0
what is the tla command for
cvs -d:xxx login
cvs -d:xxx co freebios2
You would do:
* once (preperation to use arch in general and on the openbios.org repos):
# make TLA know about you
tla my-id
* Eric W. Biederman ebiederman@lnxi.com [050308 20:20]:
For more information look at:
http://www.openbios.org/experience/gnuarch.html
http://wiki.gnuarch.org/
Especially this part of the wiki is probably interesting:
* Ronald G. Minnich rminnich@lanl.gov [050308 22:08]:
we need a 'controlled shutdown' of the cvs project so we can do a clean
cut over to tla.
Can we pick a day and time? midnight this saturday or some such? Do we all
trust tla enough to go for it?
I've not seen any problems since
* Dmitriy Budko [EMAIL PROTECTED] [050307 22:28]:
Does anybody needs LinuxBIOS for VMware virtual machines?
If you want it please describe why do you want it.
This sounds very interesting. Having a possibility to test
LinuxBIOS+payload in vmware would allow easy and comfortable
payload
* Eric W. Biederman ebiederman@lnxi.com [050304 06:02]:
For the web pages I don't care. But for the sources I SVN does not solve
one of our major problems: Multiple repositories.
With the Wiki the web page issue has solved.
So arch aka tla appears to be the sane way to go. It can act as
* Ronald G. Minnich rminnich@lanl.gov [050304 17:39]:
On Thu, 3 Mar 2005, Eric W. Biederman wrote:
Ron does this sound like something you would be willing to look at?
by all means!
The repository is there now.
Note: The caches have not been built on the server, so viewarch is
relly
* Li-Ta Lo [EMAIL PROTECTED] [050303 23:10]:
Server down?
Server error!
The server encountered an internal error and was unable to complete your
request. Either the server is overloaded or there was an error in a CGI
script.
If you think this is a server error, please contact the
* [EMAIL PROTECTED] [EMAIL PROTECTED] [050302 06:03]:
I have written back asking for permission to disclose the contents
without NDA. I have pointed out the benefits they are going to derive.
Let's see how it goes.
I have a feeling that they may allow disclosure without NDA.
Many vendors
* Martin Ley [EMAIL PROTECTED] [050302 11:30]:
The next thing is, how do I get the ROM image to the flash? The flash is
a SST39SF020A. The best solution would be that I use a second flash to
play with linuxbios, but I can't find a distributor in germany willing
to sell small quantities.
You
* Ramesh Chhaba [EMAIL PROTECTED] [050302 12:19]:
I was just trying to make a linuxBIOS for epic.
at last step it gives error .
././buildrom linuxbios.strip linuxbios.rom
../../../../../lnxieepro100.ebi 0x1 0x2
../../../../../lnxieepro100.ebi: No such file or directory
Can
* Peter Karlsson [EMAIL PROTECTED] [050302 13:31]:
Ok, it's just that I have an intel m/b (i875-based) and from what I've
gathered there's no support for any newer intel chips than the 440xX, so a
hack like that would perhaps enable me to experiment (me play to ;-). Of
course I need to get
* Richard Smith [EMAIL PROTECTED] [050302 16:28]:
A tehnical glossary would be nice but one thing we _really_ need is a
listing of all config options and what they do. This was (and still
is) one of the largest hurdles for me. And its one of the things that
Google won't find much on.
* Justin C. Darby [EMAIL PROTECTED] [050302 16:34]:
If someone can point me in the right direction (in the source, I'd
guess) to find all of the configuration options without descriptions I
can setup a page dedicated to explaining them one at a time.
freebios2/src/config/Options.lb
* Richard Smith [EMAIL PROTECTED] [050302 17:00]:
I've been adding selected info from my V1 FAQ up into the wiki. The
following is some info I compiled up on V1 start up.
If someone(s) would update this for V2 and post it t the wiki I think
it would be very useful.
I have an old writeup on
* Stefan Reinauer [EMAIL PROTECTED] [050302 17:04]:
* Richard Smith [EMAIL PROTECTED] [050302 17:00]:
I've been adding selected info from my V1 FAQ up into the wiki. The
following is some info I compiled up on V1 start up.
If someone(s) would update this for V2 and post it t the wiki I
* ramesh bios [EMAIL PROTECTED] [050301 08:19]:
That's odd. My understanding might be lacking.
I think the PIRQ table parser in 2.6.10 seems to work
because it works when I use the normal BIOS.
Sure normal BIOS does not provide ACPI instead? In such case, PIRQ stays
mostly untouched.
* ramesh bios [EMAIL PROTECTED] [050301 12:22]:
Would I be able to test if Linux 2.6.10 is able to
parse the normal BIOS' PIRQ table by booting linux
with acpi=off? If it does work at that point, then I
could assume that the area to be fixed would be the
PIRQ table generation in LinuxBIOS. If
* Ronald G. Minnich rminnich@lanl.gov [050228 17:08]:
if you see errors let me know (I did not write this but they will take
input). I know the comment about linuxbios being stripped-down linux is
not quite right; anything else?
The number of supported boards is really small and includes
* corentin hache [EMAIL PROTECTED] [050224 15:33]:
Hello,
I am newbie in LinuxBios, and I Would like to know where I can find
documentation about the python config file (epia.config in my case).
Is there a file or a website where I can find informations about all
possibles options ?
* Gin [EMAIL PROTECTED] [050222 10:07]:
Don't know if anyone has a good tool package in mind that I can use to
develop an Embedded Linux. We want a linux that is just enough to run
the flash_rom program+usb support and we hope it would be small enough
so we can fit it into a Bios chip. It's
* Robin Randhawa [EMAIL PROTECTED] [050222 16:40]:
After a bit of digging around, I've narrowed down my choice of
bootloaders to telios' ALIOS and Linuxbios from you good people. Alios
seems to support only the ELAN SC400 and I am not sure of the existing
Linuxbios support for the ELAN SC520.
* Gin [EMAIL PROTECTED] [050222 12:47]:
If it's just about reading a file from usb and writing it to flash, you
might want to have a look at filo. It should be easy to integrate the
functionality of flash_rom into it, so you don't need a full blown
linux
system in flash.
That will be a
* Eric W. Biederman ebiederman@lnxi.com [050214 00:13]:
Generally I would ask if you are seeing the payload at the top
of the romimage. But that is one of the ppc targets isn't it?
For experimenting i build with a payload of /dev/null (as generated by
abuild.sh). The binary is around 200k
* Greg Watson [EMAIL PROTECTED] [050214 16:02]:
Hi Stefan,
I did it this way because the JTAG debugger understands elf headers, so
can automatically work out where to program the image in rom. I guess
it should really be called linuxbios.elf. Feel free to change things if
you feel the
Hi,
how should the totalimpact briq target work? When I build it, I get an
elf image as the resulting linuxbios.rom. Is this intended?
Stefan
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* Paul Millar [EMAIL PROTECTED] [050211 23:39]:
A random extra bit of info, I just found this page:
http://www.openbios.org/development/devbios.html
I haven't tried it yet, but if it works, it would make flashing new
images a lot easier. A link from your web-page might be a good idea.
* Ronald G. Minnich rminnich@lanl.gov [050212 00:27]:
May I recommend having a wiki?
I'll see what stefan thinks.
A rather thought about closing dowd the existing linuxbioswiki
http://openbios.org/linuxbioswiki since it was never used.
Maybe people did not feel well with moinmoin wiki but
* Peter Karlsson [EMAIL PROTECTED] [050210 19:58]:
Try to load Linux(0x%x) at dev 0x%x
LinuxBIOS
LinuxBIOS
Jump to Linux(0x%lx, 0x%lx)
Jump to Linux(0x%lx, 0x%lx)
Found file system used by Linux.(File System ID = 0x%x)
LinuxBIOS
Try to load Linux(0x%x) at dev 0x%x
[..]
From those strings
* YhLu [EMAIL PROTECTED] [050209 01:48]:
Stefan,
What's the onboard VGA? are your talking about onboard one?
YH
Yes, it is an onboard rage xl. Pretty much the same as on all opteron
boards i guess.
It looks like x86emu can't see the rom itself? I manually checked the
image and it looks ok
Hi,
with the latest code I don't seem to get VGA initialized anymore
on the island/aruma (builtin option rom for onboard card).
rom address for PCI: 04:04.0 = fff8
int1a vector at 0
int1a vector at 0
[...]
int42 vector at ff065
int6d vector at c16a3
int10 vector at c16a3
int6d vector at
* Li-Ta Lo [EMAIL PROTECTED] [050208 19:24]:
There is no change to the emulator since last Friday. I tested the
(then) current CVS tree on that day. Did the emulator ever work
on your platform?
Last time I tried before was 2005-01-25. It worked fine then.
Stefan
* Li-Ta Lo [EMAIL PROTECTED] [050208 21:22]:
YhLu reversed the order of apic_cluster and northbridge in mainboard
config file. Did you change your config file too?
No, do I need to? What is the exact benefit except only having to
mention one apic_cluster? If this is the problem we will have to
Hi,
just to give some final feedback on this one. Using cmos_util worked
fine whereas lxbios seemed to work sometimes but I did not track the
exact issues down.
Thanks for the hints.
Stefan
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* Dave Peterson [EMAIL PROTECTED] [050121 20:36]:
- The fallback image differs from the normal image in the layout
it uses for accessing the CMOS parameters. In other words it
uses a different cmos.layout file.
My image only uses cmos for normal booting. For fallback booting
* G.Marshall [EMAIL PROTECTED] [050131 14:13]:
At Stefan's suggestion, I have downloaded the latest V2 snapshot. I
expected a Makefile, configure or README in the base directory which told
me where to start and how to progress. I have found some details
regarding a 2.4.0 kernel, but that
* Richard Smith [EMAIL PROTECTED] [050131 17:20]:
something I have been wondering. Suppose someone starts working on that
IDE driver to fix it for once in bochs bios. Won't we find out that
getting it work right is chip-set specific thing?
curently bochs bios is based on intel 440fx
* Ronald G. Minnich rminnich@lanl.gov [050127 21:10]:
On Fri, 28 Jan 2005, Digital Infra, Inc. wrote:
You can say you never use windows any more once you start to use LinuxBIOS?
Yes, I can. I will never use windows again. I have no use for it.
Otherwise VMware or Qemu would be the
Hi,
I would like to check the applied patch into LinuxBIOS CVS if nobody
happens to disagree loudly:
1) hypertransport clocking
This patch allows to disable the speed cuts during hypertransport
setup using cmos variables amdk8_1GHz and amd8131_800MHz.
I've tried them on hardware which
* Digital Infra, Inc. [EMAIL PROTECTED] [050126 13:51]:
Hello.
As my understanding, current LinuxBIOS can not boot Windows and
the reason for it is that it depends on 16bit bios feature much.
So far is right? If right, how about this way. Have you noticed already?
First, LinuxBIOS is
* Digital Infra, Inc. [EMAIL PROTECTED] [050126 15:20]:
And it boots Windows XP?
AFAIK only Win2k, but it could be advanced.
The current URL is
http://www.missl.cs.umd.edu/sebos.html
The code is in LinuxBIOS v1 CVS
Stefan
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* YhLu [EMAIL PROTECTED] [050126 18:50]:
For 2)
That bit only control x4 DIMM, So please don't do that on x8 or x16. All the
Normal BIOS only compare that to 4 only, and AMD document only said x4
Only.
At least one commercial bios vendor does this for x8 as well, and it is
definitely needed
* Richard Smith [EMAIL PROTECTED] [050126 18:40]:
What if we created a shadow.c file that was in the northbridge
directory with a simple API type setup that enabled and disabled the
various shadow ranges.
What about going the LinuxBIOS table way, providing an array of writes
typedef struct {
* Greg Lindahl [EMAIL PROTECTED] [050126 22:48]:
You mean you tested for a short time and didn't see the AMD 8131 bug,
and so you are going to run production at the higher speed?
This is not so smart. The bug in the 8131 HT core is rare, but big
clusters will see it fairly frequently.
So
* Adam Talbot [EMAIL PROTECTED] [050127 06:52]:
-Ron (Linuxbios team)
Humm, had one of my strange ideas. Would it be possible to use the
linuxbios kernel as the system kernel?? So instead of calling a new kernel
through FILO or booting from etherboot, could I just have Linux bios call
INIT,
* Yinghai Lu [EMAIL PROTECTED] [050124 04:44]:
what's other SPD about your DIMM? Brand model
That bit means x4 DIMM.
YH
I don't have the list at hand, but the only difference in SPD-ROM that
is actually read by LinuxBIOS is the Primary SDRAM Width byte.
As far as I see it, there are
* [EMAIL PROTECTED] [EMAIL PROTECTED] [050124 17:38]:
I'm trying to port LinuxBIOS to a Opteron board with a CK804.
IIRC Yinghai Lu did some CK804 work as well.
http://www.clustermatic.org/pipermail/linuxbios/2004-August/008797.html
In auto.c I notice that most boards call ht_setup_chain()
Hi,
The following function in freebios2/src/northbridge/amd/amdk8/raminit.c
is obviously wrong.
static int update_dimm_x4(const struct mem_controller *ctrl, const
struct mem_param *param, int i)
{
uint32_t dcl;
int value;
int dimm;
value =
Hi,
What's the most comfortable way to switch between normal and fallback
images in LinuxBIOS on AMD64. I was using lxbios from
http://www.llnl.gov/linux/lxbios/lxbios.html
But when changing the parameters to Normal, the next boot LinuxBIOS
still says Invalid CMOS LB checksum and it sets
* Richard Smith [EMAIL PROTECTED] [050121 21:34]:
What's the functional purpose of auto.c? Obvously to turn on the ram
but what else?
mostly ram init control. It is the main function that has to run before
LinuxBIOS can be copied to ram. On AMD K8 this means you have to set up
hypertransport
* Ronald G. Minnich rminnich@lanl.gov [050120 16:41]:
Why are all the payloads out of tree? Be nice if there was a payloads
directory with some known good payloads.
well, I am supposed to put my filo in there RSN, should I do that? My
mistake ...
What about fs_stream?
I would still
* Richard Smith [EMAIL PROTECTED] [050120 18:05]:
Currently, it's always enabled, but if you build a fallback-only payload,
then 'normal' won't get run. This is hokey, I know.
So if I just remove all the normal stuff? What about all the reset16
and entry16 stuff? Looks to me like I
* Richard Smith [EMAIL PROTECTED] [050120 19:27]:
Does IRQ_SLOT_COUNT have to match how many actual slots are on the MB
or just the number of pci devices in total?
Basically one for each device and one for bus1. Otherwise Linux won't
see the APIC of the 8111.
* Richard Smith [EMAIL PROTECTED] [050120 17:19]:
What about fs_stream?
What's fs_stream?
If you set CONFIG_FS_STREAM 1 you can load a payload from an IDE disk
with a filesystem on it. It's basically filo directly integrated.
Stefan
___
* Ronald G. Minnich rminnich@lanl.gov [050118 20:05]:
I'd like to hear more about what Stefan had in mind for the 'small set of C
functions'. Maybe the simplest way would be to pass the device tree itself
to
the payload? I guess it wouldn't solve the binary/ascii problem, but it
would
* YhLu [EMAIL PROTECTED] [050119 02:35]:
i wonder what the different between
offs = ( pci_read_config16(dev, pos + PCI_CAP_FLAGS) (110)) ?
PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
and
offs = ( (pci_read_config16(dev, pos + PCI_CAP_FLAGS) 10) 1) ?
PCI_HT_SLAVE1_OFFS :
*Sigh*
When Linux has IOAPICs and Local Apics configured via an ACPI MADT
it will not read the mptable at all. It will reference mptable
information though and not find any bus.
Only way out seems to add a DSDT als well. Or whatever table it wants
for that.
It is really broken.
Stefan
* Stefan Reinauer [EMAIL PROTECTED] [050115 22:07]:
enum {
MPTABLE_CPUS,
[..]
ACPI_COMPLETE_TABLES,
} table_t;
and dev::write_tables() would look similar to this:
static void amd8111_write_tables(device_t dev, table_t id)
{
struct resource *res
* Ronald G. Minnich rminnich@lanl.gov [050118 03:31]:
no argument that we have to create those tables, I just don't want the
baseline format to be binary, if at all possible. It's very non-portable
to non-x86 systems.
The baseline really is our internal device tree representation.
Everything
* Eric W. Biederman ebiederman@lnxi.com [050118 12:51]:
I agree that there is an issue particularly with respect to
interrupts. A lot of this has waited until we have the time to
do this properly.
I agree. However I also think we are coming close to the point were
the existing
* [EMAIL PROTECTED] [EMAIL PROTECTED] [050118 02:06]:
What was the a reason you had to move to the alpha version for the
userspace program in V2? Seems like a lot of trouble for not much
real gain.
It is used because it is in FC2. I believe it is in recent SuSe too.
I think it is
Hi,
as far as I see CPU-CPU HT links are configured with 800MHz at max.
C0 and newer K8 CPUs should be able to do 1000. Is there any reason not
to enable this in such case?
Also, if there happened to be 8131 which do 800MHz on the link,
can we make this configurable via cmos or is Config.lb the
* Greg Watson [EMAIL PROTECTED] [050118 15:56]:
The only issue really is what format to use for serialization. I'm
leaning towards s-expressions for use with openbios. However, it's
conceivable that different serialzation methods could be provided for
different payloads, though probably not
* Li-Ta Lo [EMAIL PROTECTED] [050118 17:14]:
Some of them don't have correct 0x55aa signature. All of them have
wrong Class code.
Then it is not a pci option rom as described by the standard. Do they
have the other pci option rom structs?
___
* Richard Smith [EMAIL PROTECTED] [050118 17:40]:
It is used because it is in FC2. I believe it is in recent SuSe too.
I think it is requred for x86_64.
I changed it to be configurable in the Makefile. Just enter your libpci
version there and it will compile. Unfortunately there is
* YhLu [EMAIL PROTECTED] [050118 19:34]:
Can I use that to connect Exchange Server in IMAP?
Yes, it works fine.
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* Andreas Bach Aaen (AH/TED) [EMAIL PROTECTED] [050117 15:56]:
Hi,
I am looking at a board chipsetwise a lot like the Tyan2735. When I compile
tyan2735 I get the following problem from a few days old CVS shapshot:
---
cp linuxbios_ram.nrv2b linuxbios_ram.rom
echo INCLUDE
* Andreas Bach Aaen (AH/TED) [EMAIL PROTECTED] [050117 16:03]:
Hi,
can I from the lspci output see where the superio chips is connected?
Not really. you got to know that it usually hangs off the LPC bridge.
My lspci -tv says:
lspci -tv
+-1f.0 Intel Corp. 82801DB/DBL (ICH4/ICH4-L)
* Ronald G. Minnich rminnich@lanl.gov [050117 21:48]:
It all sounds good except I would really like to try generating
s-expressions as well. I am convinced that the binary table thing is going
to cause us future trouble, and the reason I am so convinced is that every
binary table I've ever
Hi,
Porting LinuxBIOS to new motherboards has become easier and easier over
the last period of time. There's almost no need for assembler coding
anymore, Hypertransport featured systems do a completely automatical
setup of their non coherent devices. On K8 systems even the coherent
devices get
* Eric W. Biederman ebiederman@lnxi.com [041021 12:52]:
Hello Eric,
I searched the linux kernel mail archive and found your
patch for x86 boot linuxbios support, but I didn't find the
linuxbios table parse code in linux-2.6.8.1, does linux kernel
still parse the linuxbios table
* Adam Talbot [EMAIL PROTECTED] [050113 17:32]:
-Ron
Sorry about that, have not even looked at vga; yes, screen=console.
As far as the output i see in minicom...
.. ... .. .. TÜ .¿.Ü.ü. . .. . .. ... Tü. .. .. . . ...û. . . ..
.. .. .
Hope that means something to you.
Have you
* Adam Talbot [EMAIL PROTECTED] [050113 20:39]:
-Stefan
Can i set my baud rate in the config, or do i need to go change it in the
code?
You should be able to set it in the config
## Select the serial console baud rate
default TTYS0_BAUD=115200
#default TTYS0_BAUD=57600
#default
* Bari Ari [EMAIL PROTECTED] [050112 19:43]:
Eric W. Biederman wrote:
I think morse code would actually tie in better with the post code
infrastructure than general console traffic. That would keep
the volume of data low enough so as to be meaningful. Even
if you did not know morse
* Ronald G. Minnich rminnich@lanl.gov [050107 05:54]:
On Thu, 6 Jan 2005, Li-Ta Lo wrote:
Any comments ?
This is wonderful, as it may solve the SCSI problem too.
I agree with eric that in general going to expansion roms as an option is
undesirable, but ... sometimes you have no
* Stefan Reinauer [EMAIL PROTECTED] [050107 15:40]:
Definitely! Pragmatic decisions are not always those with the nicest
design, but in this case it will no doubt help LinuxBIOS gain a lot of
momentum against the other alternatives (ie. http://www.tianocore.org/)
They are _really_ _honestly_
* Li-Ta Lo [EMAIL PROTECTED] [050107 16:26]:
For scsi, do we need the 'runtime' part as well as the 'init' part ?
The emulator has support to install an int handler (the real thing
from the BIOS image, not our C code emulation) and call the int
handler.
This is exactly what we need.
Since
* Eric W. Biederman ebiederman@lnxi.com [050106 04:10]:
It seems it's also impossible to check out the old files with
cvs co -D 2003-07-30 20:00 freebios2
Very weird. I would run cvs log to see if you can spot the proper revisions
and see if you can check out the individual files. I
* Eric W. Biederman ebiederman@lnxi.com [050106 21:01]:
Ronald G. Minnich rminnich@lanl.gov writes:
bitkeeper anyone? I'm using it for a lot of projects and going back to
sourceforge all the time is getting annoying.
If we made regular releases bitkeeper might be an option.
As it is I
* Ronald G. Minnich rminnich@lanl.gov [050104 14:56]:
On Tue, 4 Jan 2005, Stefan Reinauer wrote:
Am I supposed to delete it, or am I supposed to look up what it means
and implement it in mptable.c so LinuxBIOS can use it?
oh boy. It's been a year at least since I even looked
Hi,
I want to look at some old files I checked into LinuxBIOS CVS a looong
time ago, implementing LDTSTOP_L. But SF's ViewCVS does not show the
Attic anymore.. is there a trick to get them?
Stefan
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Hi,
I've dumped an mptable with the mptable utility of LinuxBIOS v2.
I'm getting this at some point:
MP Config Extended Table Entries:
--
System Address Space
bus ID: 0 address type: I/O address
address base: 0x9000
address range: 0x2000
--
System Address Space
bus ID: 0 address type: I/O
* Stefan Reinauer [EMAIL PROTECTED] [050104 00:29]:
Hi,
I want to look at some old files I checked into LinuxBIOS CVS a looong
time ago, implementing LDTSTOP_L. But SF's ViewCVS does not show the
Attic anymore.. is there a trick to get them?
It seems it's also impossible to check out
* YhLu [EMAIL PROTECTED] [041221 19:36]:
FYI.
I made some changes to coherent_ht.c to make it create RT dynamically.
If you like to check it, please let me know, and I would check it in.
Sounds wonderful! Please go ahead!
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* Sagiv Yefet [EMAIL PROTECTED] [041217 12:05]:
I try to build freebios2-20041216-0400
And I get this compilation error:
-gnu/bin/ld: section .id [fffdffd9 - fffdffef] overlaps section .rom
[fffd88c1 - fffe0d7f]
What do you think it is?
Your ROM_IMAGE_SIZE is too small..
Stefan
* Gin [EMAIL PROTECTED] [041217 07:06]:
Oh..i got it. I do have a working bios. Thank God. And I generated the
irq_tables.c using getpir. It still doesn't help.
You might have to adjust bus numbers. LinuxBIOS uses a different bus
enumeration than other boards on some systems
One thing I did
* Yinghai Lu [EMAIL PROTECTED] [041213 03:54]:
Please try this:
1. Comment out inconherent init in auto.c
2. disable hard_reset in northbridge.c
It will hang here:
PCI: 04:00.0 [1022/7464] enabled
PCI: 04:00.1 [1022/7464] enabled
PCI: 04:00.2 No device operations
PCI: 04:01.0 No device
* YhLu [EMAIL PROTECTED] [041214 03:14]:
Stefan,
I add dump_pci_decvies_on_bus in debug.c
Please add calling to dump_pci_devices_on_bus(busn) before
ht_collapse_previous_enumeration(busn). In ht_setup_chains.
Also in auto.c you need to put inconerent_ht.c after debug.c.
See the other
* YhLu [EMAIL PROTECTED] [041215 21:05]:
Stefan,
Please check out the patch. It works well with our MB.
YH
No change here. The machine still hangs. It seems it is dead as soon as I
am trying to put my fingers on anything higher than bus4. I'll go and
compare bridge setups tomorrow.
Hi,
Looking at northbridge/amd/amdk8/coherent_ht.c:
setup_remote_node() copies the routing table and the resource
map to the remote/freshly setup cpu.
This function is called for cpu1, but never for cpu2 and cpu3.
This implies we should either drop it for cpu1 as well or add
it to the cpu2/3
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