My mainboard's northbridge is i440bx, southbridge is i82371eb, superio is w83977ef, cpu is pentium III 450MHz(slot 1).I use the asus/p2b 's config file to build the linuxbios, but it stopped at debug code 0x12.The last debug string is "Copying LinuxBIOS to ram.Jumping to LinuxBIOS.", then
* Li Haiqiang [EMAIL PROTECTED] [061105 11:34]:
My mainboard's northbridge is i440bx, southbridge is i82371eb, superio is
w83977ef, cpu is pentium III 450MHz(slot 1).
I use the asus/p2b 's config file to build the linuxbios, but it stopped at
debug code 0x12.
The last debug string is Copying
#27: Minor typo
+---
Reporter: Luis Correia [EMAIL PROTECTED] | Owner: somebody
Type: enhancement | Status: new
Priority: trivial
#26: flashrom: Support for PIIX4/PIIX4E/PIIX4M
-+--
Reporter: uwe | Owner: uwe
Type: enhancement | Status: new
Priority: major| Milestone:
#27: Minor typo
-+--
Reporter: Luis Correia [EMAIL PROTECTED] | Owner: somebody
Type: enhancement | Status: new
Priority: trivial
Author: stepan
Date: 2006-11-05 13:18:58 +0100 (Sun, 05 Nov 2006)
New Revision: 2488
Modified:
trunk/LinuxBIOSv2/src/boot/elfboot.c
Log:
Fix a typo in elfboot.c. Closes #27
Signed-off-by: Luis Correia [EMAIL PROTECTED]
Acked-by: Stefan Reinauer [EMAIL PROTECTED]
Modified:
yhlu [EMAIL PROTECTED] writes:
On 11/4/06, Eric W. Biederman [EMAIL PROTECTED] wrote:
1M for bzImage remains fine. All bootloaders would break if you
changed that. But for vmlinux you pretty much have it nailed.
Actually, we only mkelfImage with bzImage before we are trying to use
lzma to
#26: flashrom: Support for PIIX4/PIIX4E/PIIX4M
-+--
Reporter: uwe | Owner: uwe
Type: enhancement | Status: new
Priority: major| Milestone:
#28: Finish Intel 440BX port
+---
Reporter: uwe | Owner: somebody
Type: task| Status: new
Priority: critical| Milestone: Going mainstream
Stefan Reinauer [EMAIL PROTECTED] writes:
Or we need to make elfboot in LinuxBIOS to be 64elf aware, and it need
to switch 64bit before load 64bit elf.
This is the preferred thing I guess, because it will allow us to use
other 64bit payloads as well without requiring that they do the same
#26: flashrom: Support for PIIX4/PIIX4E/PIIX4M
-+--
Reporter: uwe | Owner: uwe
Type: enhancement | Status: assigned
Priority: major| Milestone:
#29: this is a captcha test
---+
Reporter: anonymous | Owner: somebody
Type: defect | Status: new
Priority: major | Milestone:
Component: code
#29: this is a captcha test
+---
Reporter: anonymous | Owner: somebody
Type: defect | Status: new
Priority: major | Milestone:
Component:
Thinking about this some more, whats needed is a lot of grunt work that
doesn't necessarily have to be done by the same person who fixes the ram
init code.
Here's TODO from my past emails..
1. I named both the northbridge and the southbridge i440bx. While I
don't think it s a huge problem.
#26: flashrom: Support for PIIX4/PIIX4E/PIIX4M
-+--
Reporter: uwe | Owner: uwe
Type: enhancement | Status: assigned
Priority: major| Milestone:
Hi,
On Sun, Nov 05, 2006 at 10:07:58AM -0600, Richard Smith wrote:
1. I named both the northbridge and the southbridge i440bx. While I
don't think it s a huge problem. The southbridge code needs to be
changed to piix4 since thats really what the part is. I'll hopefully
be able to do
On 11/5/06, Eric W. Biederman [EMAIL PROTECTED] wrote:
First a decode of letters, in bzImage the b stands for big and the
z stands for gzip. We don't have a bzip2 decompressor in there.
Thanks for the explanation...
An interesting question is if we make a bImage target that does everything
On 11/5/06, Stefan Reinauer [EMAIL PROTECTED] wrote:
Are we not going to switch to 64bit mode in LinuxBIOS anyways? Then we
just need a 64bit version of mkelfimage.
Yes. actually the elf64 aware elfboot too.
This is the preferred thing I guess, because it will allow us to use
other 64bit
Author: uwe
Date: 2006-11-05 19:26:08 +0100 (Sun, 05 Nov 2006)
New Revision: 2489
Modified:
trunk/LinuxBIOSv2/util/flashrom/flash_enable.c
Log:
Add support for Intel PIIX4/PIIX4E/PIIX4M-based mainboards to flashrom.
Tested on real hardware, reading, detecting and writing various chips works.
#15: fix abuild for all boards that use the three images solution
+---
Reporter: anonymous | Owner: yhlu
Type: defect | Status: new
Priority: major |
#11: pirq table automation
-+--
Reporter: stepan | Owner: yhlu
Type: enhancement | Status: new
Priority: major| Milestone: Going mainstream
Are we not going to switch to 64bit mode in LinuxBIOS anyways?
We probably should, PCIe requires 64-bit loads and stores
(well most devices don't need those, but hey). It also
makes accessing stuff above 4GB way easier, and you can use
all 16 regs without needing prefixes.
Or we need to make
You need to run
dump_pci_devices();
as last command in auto.c
lspci -xxx:
If you resend this lspci output with the dump_pci_devices()
output (and please do!), use lspci -xxx -s0:0 or just
cut'n'paste only device 0 (Host Bridge), the rest isn't
interesting.
Did you send the SPD contents
#29: this is a captcha test
+---
Reporter: anonymous | Owner: somebody
Type: defect | Status: new
Priority: major | Milestone:
Component:
#30: Support for VIA VT82C686 in flashrom
---+
Reporter: stepan | Owner: stepan
Type: defect | Status: new
Priority: major
#31: Do proper checking for flash erase for SST FWH parts
---+
Reporter: stepan | Owner: stepan
Type: defect | Status: new
#31: Do proper checking for flash erase for SST FWH parts
+---
Reporter: stepan | Owner: stepan
Type: defect | Status: assigned
#26: flashrom: Support for PIIX4/PIIX4E/PIIX4M
-+--
Reporter: uwe | Owner: uwe
Type: enhancement | Status: closed
Priority:
#32: New motherboard IEI NOVA4899R
+---
Reporter: Luis Correia [EMAIL PROTECTED] | Owner: somebody
Type: enhancement | Status: new
#33: New motherboard IEI NOVA4899R
+---
Reporter: Luis Correia [EMAIL PROTECTED] | Owner: somebody
Type: enhancement | Status: new
#20: Cleanup of all CHIP_NAME() entries
+---
Reporter: uwe | Owner: uwe
Type: defect | Status: closed
Priority: minor | Milestone: Cosmetic
#33: Signed-off-by in trac is meaningless
+---
Reporter: segher | Owner: somebody
Type: defect | Status: new
Priority: critical|
On 11/5/06, LinuxBIOS [EMAIL PROTECTED] wrote:
#33: Signed-off-by in trac is meaningless
+---
Reporter: segher | Owner: somebody
Type: defect | Status: new
Priority:
* Segher Boessenkool [EMAIL PROTECTED] [061105 20:49]:
Trivial in this case, but in general: can we please add
the name or document number (not just the URL) for datasheets
and other documentation? Vendors just _love_ to rearrange
their websites (and some pull their old docs altogether);
if
#20: Cleanup of all CHIP_NAME() entries
+---
Reporter: uwe | Owner: uwe
Type: defect | Status: closed
Priority: minor | Milestone: Cosmetic
Instead of checking the first byte only, the whole part is checked
now.
This will detect any improper erase. The patch removes a FIXME. :-)
... and adds one, heh :-)
Signed-off-by: Stefan Reinauer [EMAIL PROTECTED]
The patch never made it to the mailing list. To review the
patch I now
#33: Signed-off-by in trac is meaningless
+---
Reporter: segher | Owner: somebody
Type: defect | Status: new
Priority: critical|
I don't work well with web applications but tried submitting a note
via trac anyway, only to be rejected as potential spam, according to
Akismet. I would love some way to interact with trac that is not
web based. Does anyone know?
it is possible to send emails to trac-at-linuxbios.org (lets
Segher Boessenkool wrote:
LinuxBIOS is really low-volume but it already almost takes me longer
to keep up with the patch flow than it takes for Linux.
Don't take this as a flame, I just need a working working
environment :-)
OLPC uses trac as well and I'm going to have to side with
* Segher Boessenkool [EMAIL PROTECTED] [061105 21:40]:
The patch never made it to the mailing list. To review the
patch I now have to:
I contacted the trac folks for that problem. Attachments should make it
into notification mails.
Don't take this as a flame, I just need a working working
This has been done. It's now i82371eb.
Why not 82371eb (that's the official name AFAIK)? Is there some
requirement that directories have to start with a letter?
Its a C thing. You can't start a variable with a number. That allows
you to match the directory name to the struct statements
+ Set bit 2: BIOSCS# Write Protect Enable (1=enable,
0=disable). */
The bit is misnamed in the datasheet: it's the write enable
bit, not the write protect enable (which would be write disable).
nitpicking award 2006 ;-)
Not really -- I thought I spotted a code error but then went
* Richard Smith [EMAIL PROTECTED] [061105 21:54]:
Although it does keep things together its a much larger PITA to work
with. And I find it cumbersome to find the stuff I'm looking for unless
I just happen to remember the Trac ID#.
The search function is not worse than searching the mailing
+ /* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to
+ FFF0-FFF7 are forwarded to ISA).
+ Set bit 7: Extended BIOS Enable (PCI master accesses to
+ FFF8-FFFD are forwarded to ISA).
+ Set bit 6:
* Richard Smith [EMAIL PROTECTED] [061105 22:03]:
Stefan Reinauer wrote:
Patch management on the mailing list just does not work. It never will.
The Linux Kernel guys seem to think otherwise.
1. There are _lots_ of people hired full time to check no patches get lost.
2. Patches still
* Segher Boessenkool [EMAIL PROTECTED] [061105 21:57]:
This has been done. It's now i82371eb.
Why not call it piix4e (or just piix4), much easier to type
and proofread and understand in general?
because we called all the others after their part numbers rather than
their code names, too.
#20: Cleanup of all CHIP_NAME() entries
+---
Reporter: uwe | Owner: uwe
Type: defect | Status: closed
Priority: minor | Milestone: Cosmetic
#33: Signed-off-by in trac is meaningless
+---
Reporter: segher | Owner: somebody
Type: defect | Status: new
Priority: critical|
#33: Signed-off-by in trac is meaningless
+---
Reporter: segher | Owner: somebody
Type: defect | Status: new
Priority: critical|
#33: Signed-off-by in trac is meaningless
+---
Reporter: segher | Owner: somebody
Type: defect | Status: new
Priority: critical|
We have to have something like trak. If trak is not it then let's pick something better. But don't underestimate how hard the problem is, or how hard stefan has thought about this :-)ron
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What I recommend is that you skip the PIRQ crap and just hardwire the IRQs in linuxbios. OLPC is one example of a system which does this. PIRQ does not work in many cases. ronp.s. heroic work there with the VOM, I am very impressed!
--
linuxbios mailing list
linuxbios@linuxbios.org
#22: sed error in abuild
---+
Reporter: uwe | Owner: uwe
Type: defect | Status: assigned
Priority: critical
ron minnich wrote:
What I recommend is that you skip the PIRQ crap and just hardwire the
IRQs in linuxbios. OLPC is one example of a system which does this.
PIRQ does not work in many cases.
ron
p.s. heroic work there with the VOM, I am very impressed!
--
This message has been scanned
either one will let you see the way we hard wire IRQsron
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linuxbios@linuxbios.org
http://www.openbios.org/mailman/listinfo/linuxbios
#31: Do proper checking for flash erase for SST FWH parts
---+
Reporter: stepan | Owner: stepan
Type: defect | Status: assigned
From: Li Haiqiang [EMAIL PROTECTED]
Date: 6 november 2006 2:39:39 GMT+01:00
To: Segher Boessenkool [EMAIL PROTECTED]
Subject: Re: [LinuxBIOS] Hello, I have a problem to put the
linuxbios on my mainboard ms6163.
Yes, I have only one memory module.
Li, See my mail earlier today on 44bx.
I even don't know how to .Can you help me?- Original Message From: Richard Smith [EMAIL PROTECTED]To: Li Haiqiang [EMAIL PROTECTED]Cc: LinuxBIOS mailinglist linuxbios@linuxbios.orgSent: Monday, November 6, 2006 10:12:57 AMSubject: Re: [LinuxBIOS] Fwd: Hello, I have a problem to put the
What does debug code 0xf9 mean?It stopped here.- Original Message From: Richard Smith [EMAIL PROTECTED]To: Li Haiqiang [EMAIL PROTECTED]Cc: LinuxBIOS mailinglist linuxbios@linuxbios.orgSent: Monday, November 6, 2006 10:12:57 AMSubject: Re: [LinuxBIOS] Fwd: Hello, I have a problem to put
Li Haiqiang wrote:
What does debug code 0xf9 mean?
It stopped here.
Li,
The 440bx is NOT COMPLETE. It will NOT function. It is BROKEN. The
port is not finished. Its does not enable RAM.
Hopefully, one of those translates correctly. Do you understand?
To make it work you need to add a
Segher Boessenkool wrote:
Following this, i changed the irq_tables.c file to be like this:
Did you fix the table's headers too, to read the correct
number of entries, and the right checksum? The table you
derived yours from had only two devices entries, and your
results are sort-of consistent
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