* Jordan Crouse [EMAIL PROTECTED] [071129 00:16]:
[BUILDROM] Very minor fixes to make it easier to use custom ELF payloads
Some fixes to make it easier to use a custom ELF payload.
Signed-off-by: Jordan Crouse [EMAIL PROTECTED]
Acked-by: Stefan Reinauer [EMAIL PROTECTED]
--
coresystems
Hello,
I am playing around with LinuxBIOS. The first step is to boot Windows
on QEMU+LinuxBIOS. I follow the steps in
http://www.linuxbios.org/Booting_Windows_using_LinuxBIOS, and do with
LinuxBIOSv3. However, in the documentation, I read:
.
Building LinuxBIOSv3
Now it is time to build
Hmm... I managed to do like this:
- Compile ADLO separately, then I have a file named payload
- In LinuxBIOSv3, I run make menuconfig, then specify the path of
payload option to the above payload.
- Save options, quit and compile.
As a result, I have build/bios.bin, and I overwrites this file
* Carl-Daniel Hailfinger [EMAIL PROTECTED] [071128 00:52]:
Consolidate all multiple segment handling into
lib/lar.c:load_file_segments() and greatly simplify arch/x86/stage1.c
code as a result. While I'm at it, improve the LAR segmentation
abstraction. Stage 1 code should not have to care
* Carl-Daniel Hailfinger [EMAIL PROTECTED] [071128 01:20]:
Reorder the rules in mainboard/*/*/Makefile so their order is identical
across all of these makefiles. The rules are now in order of execution
during boot, that is:
STAGE0_MAINBOARD_OBJ
INITRAM_OBJ
STAGE2_MAINBOARD_OBJ
As added
Alex Beregszaszi wrote:
On Wed, 2007-09-12 at 22:02 +0200, Alex Beregszaszi wrote:
Hi,
the subject says it all.
The missing header in udelay.c was added a few days ago, this should not
be missed.
Attached patch fixes it. According to svn blame, initial author was the
user
On Thu, 2007-11-29 at 12:29 +0100, Stefan Reinauer wrote:
Alex Beregszaszi wrote:
On Wed, 2007-09-12 at 22:02 +0200, Alex Beregszaszi wrote:
Hi,
the subject says it all.
The missing header in udelay.c was added a few days ago, this should not
be missed.
Attached
On 29.11.2007 09:57, Stefan Reinauer wrote:
* Alex Beregszaszi [EMAIL PROTECTED] [071129 02:30]:
Signed-off-by: Alex Beregszaszi [EMAIL PROTECTED]
Acked-by: Stefan Reinauer [EMAIL PROTECTED]
Please commit.
Are we still in favor of this? If yes I will commit it
On 29.11.2007 01:14, Richard Smith wrote:
Great. I'll have reason to do some linuxbios hacking soon. I purchased
some GIGABYTE GA-M57SLI-S4 setups to build a Multi-TB RAID server. Parts
should arrive next week. One goes into service with stock BIOS to get
going ASAP and the other gets
Carl-Daniel Hailfinger wrote:
On 29.11.2007 03:28, [EMAIL PROTECTED] wrote:
Author: uwe
Date: 2007-11-29 03:28:55 +0100 (Thu, 29 Nov 2007)
New Revision: 2991
Modified:
trunk/LinuxBIOSv2/src/mainboard/iwill/dk8_htx/Config.lb
Log:
Flashrom does not work after booting LinuxBIOS on the
Hi, all,
In our board, we found the trace is sent out: Issuing SOFT_RESET… from the
function init_cpus in the file init_cpus.c. But when the function runs, the
serial port is still far to be initialized, how dose the trace is sent out?
Best Regards
丰立波 Feng Libo @ AMD Ext: 20906
Mobile
Author: stepan
Date: 2007-11-29 16:01:53 +0100 (Thu, 29 Nov 2007)
New Revision: 2993
Added:
trunk/LinuxBIOSv2/targets/msi/ms9282/Config-abuild.lb
trunk/LinuxBIOSv2/targets/supermicro/h8dmr/Config-abuild.lb
Modified:
trunk/LinuxBIOSv2/targets/msi/ms9185/Config-abuild.lb
Log:
fix abuild.
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer stepan checked in revision 2993 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
fix abuild.
Signed-off-by: Stefan Reinauer [EMAIL PROTECTED]
Acked-by: Stefan Reinauer
On Thu, Nov 29, 2007 at 02:39:30PM +0100, Stefan Reinauer wrote:
Signed-off-by: Mondrian Nuessle [EMAIL PROTECTED]
Acked-by: mcq [EMAIL PROTECTED]
Short question:
Do we require real names for Acked-by or is that just a requirement for
Signed-off-by?
I vote for both.
Me too, but
Author: jcrouse
Date: 2007-11-29 16:56:37 +0100 (Thu, 29 Nov 2007)
New Revision: 65
Modified:
buildrom-devel/Makefile
Log:
[BUILDROM] Add targets for mconf and lxdialog
There isn't any need to be running make for mconf and lxdialog every
time we run menuconfig - we invoke the power of Make
On 29/11/07 00:46 +0100, Peter Stuge wrote:
On Wed, Nov 28, 2007 at 04:13:49PM -0700, Jordan Crouse wrote:
[BUILDROM] Add targets for mconf and lxdialog
There isn't any need to be running make for mconf and lxdialog every
time we run menuconfig - we invoke the power of Make and add the
Author: jcrouse
Date: 2007-11-29 16:57:34 +0100 (Thu, 29 Nov 2007)
New Revision: 66
Modified:
buildrom-devel/config/payloads/Config.in
buildrom-devel/packages/memtest/memtest.mk
Log:
[BUILDROM] Move to memetest86 version 3.4
Memtest86 version 3.4 has some fun new tricks, like understanding
On 29/11/07 01:00 +0100, Peter Stuge wrote:
On Wed, Nov 28, 2007 at 04:14:56PM -0700, Jordan Crouse wrote:
[BUILDROM] Move to memetest86 version 3.4
Memtest86 version 3.4 has some fun new tricks, like understanding
multiple CPUs. Also use the correct name in the config.in - its
Author: jcrouse
Date: 2007-11-29 16:58:26 +0100 (Thu, 29 Nov 2007)
New Revision: 67
Modified:
buildrom-devel/packages/linuxbios/ga-2761gxdk-linuxbios.mk
buildrom-devel/packages/linuxbios/generic-linuxbios.mk
buildrom-devel/packages/linuxbios/linuxbios.inc
On 29/11/07 09:53 +0100, Stefan Reinauer wrote:
* Jordan Crouse [EMAIL PROTECTED] [071129 00:16]:
[BUILDROM] Very minor fixes to make it easier to use custom ELF payloads
Some fixes to make it easier to use a custom ELF payload.
Signed-off-by: Jordan Crouse [EMAIL PROTECTED]
Author: jcrouse
Date: 2007-11-29 16:59:26 +0100 (Thu, 29 Nov 2007)
New Revision: 68
Added:
buildrom-devel/packages/linuxbios/optionroms.inc
Modified:
buildrom-devel/packages/linuxbios/ga-2761gxdk-linuxbios.mk
buildrom-devel/packages/linuxbios/generic-linuxbios.mk
Log:
[BUILDROM] Download
On 29/11/07 00:48 +0100, Peter Stuge wrote:
On Wed, Nov 28, 2007 at 04:18:11PM -0700, Jordan Crouse wrote:
[BUILDROM] Download and prepend the VGA VBIOS for the ga-2761gxdk
First try at downloading and prepending the VGA VBIOS for the ga-2761gxdk
board stored on linuxbios.org. This
On Wed, Nov 28, 2007 at 07:33:46PM -0500, Richard Smith wrote:
Carl-Daniel Hailfinger wrote:
OK, then we probably have either partial chip protection (by setting
some bits in the chip) or partial mapping.
Is this an SPI part? Pretty much all recent SPI parts have block protect
Feng, Libo wrote:
Hi, all,
In our board, we found the trace is sent out: Issuing SOFT_RESET… from
the function init_cpus in the file init_cpus.c. But when the function
runs, the serial port is still far to be initialized, how dose the trace
is sent out?
Best Regards
丰立波 Feng
* Carl-Daniel Hailfinger [EMAIL PROTECTED] [071129 14:32]:
Alex, can you repost an updated patch? I want to verify that patch
against a suggestion of Peter Stuge from
Date: Thu, 30 Aug 2007 00:06:50 +0200
Message-ID: [EMAIL PROTECTED]
What is that suggestion?
--
coresystems GmbH •
On Thu, Nov 29, 2007 at 05:34:38PM +0100, Andreas B. Mundt wrote:
No, it's the PLCC32 revision. It's strange that it seems to work for
Ward. Ward, which board revision do you have?
Yep, works fine for me, same chip. My board says it's rev 1.1; it's plcc.
(But Ward's board showed
some
On Thu, Nov 29, 2007 at 05:41:52PM +0100, Stefan Reinauer wrote:
Alex, can you repost an updated patch? I want to verify that patch
against a suggestion of Peter Stuge from
Date: Thu, 30 Aug 2007 00:06:50 +0200
Message-ID: [EMAIL PROTECTED]
What is that suggestion?
Yep, works fine for me, same chip. My board says it's rev 1.1; it's plcc.
So this might be the reason: I have rev 1.0 :-(
... It worked sometimes, now it works always thanks to Carl-Daniel's
work :)
Note: For the 512kB chip it worked for me too (after Carl-Daniel's patch).
Thanks,
Carl-Daniel Hailfinger wrote:
For SPI flash size, the limitation is not how much the chipset can
support, but how much the SPI translation feature in the IT8716F can
support.
Are you talking about LCP reads - SPI reads translation?
If so I only need that for the initial boot. After that I
We've been doing a lot of hacking on buildrom lately. Thanks to everybody,
especially Ward and Myles. I wanted to take some time to discuss where
we are and particularly where we want to go.
Here is where we are:
* v2 support for 10 platforms (alix1c, db800, dbe61, ga-2761gxdk, m57sli,
Hi all,
buildrom gives me still an error when building kexec-boot-loader
(x86_64) for the m57sli:
gcc --32-c -o kexec/x86-setup-32.o kexec/x86-setup-32.S
cc1: error: unrecognized command line option -f32
This has been reported for the tyan_s2891 before:
* Alex Beregszaszi [EMAIL PROTECTED] [071129 14:01]:
Ollie checked in code written by me, see
http://tracker.linuxbios.org/trac/LinuxBIOS/log/trunk?rev=2111
So it's (C) coresystems GmbH
Okay, this one?
--
Alex
Signed-off-by: Alex Beregszaszi [EMAIL PROTECTED]
On 29.11.2007 19:34, Richard Smith wrote:
Carl-Daniel Hailfinger wrote:
For SPI flash size, the limitation is not how much the chipset can
support, but how much the SPI translation feature in the IT8716F can
support.
Are you talking about LCP reads - SPI reads translation?
Yes.
If so I
On 29.11.2007 18:13, Peter Stuge wrote:
On Thu, Nov 29, 2007 at 05:41:52PM +0100, Stefan Reinauer wrote:
Alex, can you repost an updated patch? I want to verify that patch
against a suggestion of Peter Stuge from
Date: Thu, 30 Aug 2007 00:06:50 +0200
Message-ID: [EMAIL PROTECTED]
jordan, for SiS we really need to get the point of having an
normal/fallback LAB payload that runs in 2 MB, one MB for each one.
how hard is this? Does buildrom do fallback in general? I thought it did not.
I still don't know how to do fallback/normal on v3 ...
ron
--
linuxbios mailing list
Remove .o suffix from parsed ELF files in the LAR.
Build tested and runtime tested in Qemu.
Signed-off-by: Carl-Daniel Hailfinger [EMAIL PROTECTED]
Index: LinuxBIOSv3-betterparsedelfnaming/lib/lar.c
===
---
On 29.11.2007 00:50, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 28.11.2007 23:52, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
Marc?
This has been sitting in my tree for a while now.
On 16.11.2007 16:00, Carl-Daniel Hailfinger wrote:
Hi,
v2 and v3 have almost identical CAR
Carl-Daniel Hailfinger wrote:
Everything is set up correctly until now.
/* enable caching for 16K/8K/4K using fixed mtrr */
movl$0x269, %ecx /* fix4k_cc000*/
#if CacheSize == 0x4000
movl$0x06060606, %edx /* WB IO type */
#endif
#if CacheSize == 0x2000
On 29.11.2007 22:58, ron minnich wrote:
I still don't know how to do fallback/normal on v3 ...
The current v3 fallback/normal code is less than optimal. In case normal
boot is specified, it will die() unless normal/initram and normal/stage2
are found. So even in the presence of
On 29.11.2007 23:58, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
Everything is set up correctly until now.
/* enable caching for 16K/8K/4K using fixed mtrr */
movl$0x269, %ecx /* fix4k_cc000*/
#if CacheSize == 0x4000
movl$0x06060606, %edx /* WB IO type
Carl-Daniel Hailfinger wrote:
Together with reserving space at the end of the header. I think
especially the space reservation is important because it allows use of
feature flags without having to horrible
re-definition/out-of-place-information hacks.
Space reservation? What is this
On 30.11.2007 01:19, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 29.11.2007 23:58, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
Everything is set up correctly until now.
/* enable caching for 16K/8K/4K using fixed mtrr */
movl$0x269,
On 29/11/07 13:58 -0800, ron minnich wrote:
jordan, for SiS we really need to get the point of having an
normal/fallback LAB payload that runs in 2 MB, one MB for each one.
how hard is this? Does buildrom do fallback in general? I thought it did not.
buildrom doesn't do fallback in
On Fri, Nov 30, 2007 at 12:43:51AM +0100, Stefan Reinauer wrote:
Together with reserving space at the end of the header.
Space reservation? What is this about?
Some extra bytes for future use, the more bytes the longer before we
need to change the format. I think 64 would be more than
On 30.11.2007 00:43, Stefan Reinauer wrote:
Carl-Daniel Hailfinger wrote:
Together with reserving space at the end of the header. I think
especially the space reservation is important because it allows use of
feature flags without having to horrible
re-definition/out-of-place-information
Has this been tested on hardware? CAR is black magic ;-)
ron
--
linuxbios mailing list
linuxbios@linuxbios.org
http://www.linuxbios.org/mailman/listinfo/linuxbios
Carl-Daniel Hailfinger wrote:
On 29.11.2007 23:58, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
Everything is set up correctly until now.
/* enable caching for 16K/8K/4K using fixed mtrr */
movl$0x269, %ecx /* fix4k_cc000*/
#if CacheSize == 0x4000
movl
Carl-Daniel Hailfinger wrote:
If so I only need that for the initial boot. After that I can issue
SPI read commands directly to the device.
Which is a little bit slow/inefficient. I suspect that using a USB
storage device (together with early USB initialization) will give you
better
I've had a couple of questions on what I'm doing and if this multi-TB
server is a commercial product... So I'm posting the response to the list.
I'm still working hard at OLPC. My @laptop.org address isn't on the
linuxbios list.
The fileserver project is personal.
- I've got a large amount
On Sunday 25 November 2007 09:24, Shocky wrote:
Hi,
I'm new to LinuxBios, and just looking for a way to flash the bios on an HP
laptop without installing Windoze. None of the tricks I've found through
Google have worked for me so far, including HP's own utility for making
bootable usb keys.
On 30.11.2007 01:12, ron minnich wrote:
Has this been tested on hardware? CAR is black magic ;-)
I have no hardware capable of running LinuxBIOS (except a few OLPC
machines with Geode GX, but they use a different CAR setup).
Besides that, testing this code in v3 is rather difficult because
Shocky wrote:
I finally tracked down the problem, and it had nothing to do with libpci.a or
libzlib1.a, except for the fact that static linking is used.
Mandriva, both 2007 and 2008, has a package called glibc-static-devel which
is
required to do static linking. I guess this is the first
On Friday 30 November 2007 02:39:25 Uwe Hermann wrote:
See patch.
This is required to make all 440BX based boards in v2 almost fully
supported. Without the patch at least the Super I/O init is never
performed, thus lots of stuff is broken.
Uwe.
Works here on Azza/PT-6IBD. With this patch
[New thread]
On Thu, Nov 29, 2007 at 08:25:32PM -0500, Richard Smith wrote:
That said, here in the OLPC offices we have still have periodic pain
involved with USB booting. A lot of usb sticks are just trash. The
generic case requires up to several seconds of delay before you can access
See patch.
This is required to make all 440BX based boards in v2 almost fully
supported. Without the patch at least the Super I/O init is never
performed, thus lots of stuff is broken.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org |
Hi
Attached is a patch for TeleVideo TC7020 support.
It should work fine with r2993. Please kindly review.
Large part of the patch is just a duplicate of BCOM Winnet100 patch
hence many files retain copyright holder as Juergen Beisert.
My TC7020 runs Debian's unmodified kernel 2.6.18, and
On 30/11/07 03:33 +0100, Uwe Hermann wrote:
[New thread]
On Thu, Nov 29, 2007 at 08:25:32PM -0500, Richard Smith wrote:
That said, here in the OLPC offices we have still have periodic pain
involved with USB booting. A lot of usb sticks are just trash. The
generic case requires up to
Now that I can build and run flashrom, I get:
Calibrating delay loop.. OK.
No LinuxBIOS table found.
Found chipset NVidia MCP51, enabling flash write... OK
generic_spi_command called, but no SPI chipset detected
No EEPROM/flash device found.
I see on the supported devices list that NVidia MCP55
Hi, all,
But the function init_cpus is called before the three functions:
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init();
The trace is sent out from the init_cpus.
Best Regards
丰立波 Feng Libo @ AMD Ext: 20906
Mobile Phone: 13683249071
Office Phone:
See patch.
At the very least the IDE legacy port access must be enabled to be
able to use FILO. The rest is optional, but I see no reason to not
enable it per default.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org |
On Fri, Nov 30, 2007 at 02:50:31AM +0100, Stefan Reinauer wrote:
Acked-by: Stefan Reinauer [EMAIL PROTECTED]
Thanks, r2994.
Not sure about the USB controller part. It does nothing, yet, does it?
Good question. This needs some more testing, but I _think_ Linux just
enables the USB ports
* Carl-Daniel Hailfinger [EMAIL PROTECTED] [071130 01:19]:
That way we can introduce new header fields and still have old LAR code
parse new archives without any problems.
What about just adding a field with the header size for that. Adding
space for empty reserved fields just smells like a
* Uwe Hermann [EMAIL PROTECTED] [071130 02:39]:
Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):
- Implement ISA related support:
- Initialize the RTC
- Enable access to all BIOS regions (but _not_ write access to ROM)
- Enable ISA (not EIO) support
- Without
Author: uwe
Date: 2007-11-30 03:08:26 +0100 (Fri, 30 Nov 2007)
New Revision: 2994
Added:
trunk/LinuxBIOSv2/src/southbridge/intel/i82371eb/i82371eb_isa.c
trunk/LinuxBIOSv2/src/southbridge/intel/i82371eb/i82371eb_reset.c
trunk/LinuxBIOSv2/src/southbridge/intel/i82371eb/i82371eb_usb.c
See attached.
Thanks,
Ward.
--
Ward Vandewege [EMAIL PROTECTED]
Free Software Foundation - Senior System Administrator
This patch adds preliminary gPXE support to buildrom. gPXE is the successor of
etherboot. It is currently undergoing some major work and does not have
LinuxBIOS support, so
Yes, our board reboots for some reason. The function print_debug and other
functions must still be located where they had been located last time and all
configuration related with serial port is still OK since the reboot, then
without the serial port initialization, init_cpus can sent out
On Nov 29, 2007 9:25 PM, Feng, Libo [EMAIL PROTECTED] wrote:
Hi, all,
But the function init_cpus is called before the three functions:
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init();
The trace is sent out from the init_cpus.
that is for next fail reboot.
YH
my own tree have
#if CacheSize 0x8000
/* enable caching for 16K/8K/4K using fixed mtrr */
movl$0x269, %ecx /* fix4k_cc000*/
#if CacheSize == 0x4000
movl$0x06060606, %edx /* WB IO type */
#endif
#if CacheSize == 0x2000
movl$0x0606, %edx
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