Freebios2 amd/serenade keyboard init error

I have built LinuxBIOS for the amd/serenade target and I get about 600 lines of good output to the serial port, which ends with Initializing devices... PCI: 00:18.0 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:19.0 init PCI: 00:19.3 init NB: Function 3 Misc

RE: Freebios2 amd/serenade keyboard init error

Tony, Thanks. It worked. Instead I commented out the code in keyboard.c inside init_pc_keyboard(), since there are several versions of superio.c. Not sure which is used. Steve -Original Message- From: Tony Cheng [mailto:[EMAIL PROTECTED] Sent: Wednesday, July 28, 2004

RE: Makefile changes for symbols

The file under your target in normal/linuxbios_c.o seems to have all the symbols if you add -gdwarf-2 to the $CFLAGS in the Makefile. Then when you open the first C module the SourcePoint software asks where the file exists, after you tell SourcePoint it seems to find the rest by itself. I

JTAG debugging

I agree with Ron. JTAG debuggers are more robust. But I am interested in stepping through LinuxBIOS on a working target to quickly understand the code, so I'm able to attempt a port to a new target. I view it as a learning tool and a productivity tool. If you could show people how to use a

LinuxBIOS debugging with an emulator

Can someone tell me what the starting sequence is with LinuxBIOS? Reset jumps to crt0.s. crt0.s calls auto.E. auto.E is built using romcc, so source-level debugging is not possible. The statement locations can be found using the L labels in linuxbios.map. Then hardwaremain is called.

RE: LinuxBIOS debugging with an emulator

On Tue, 26 Oct 2004 [EMAIL PROTECTED] wrote: Can someone tell me what the starting sequence is with LinuxBIOS? Reset jumps to crt0.s. crt0.s calls auto.E. auto.E is built using romcc, so source-level debugging is not possible. ah well :-) The statement locations can be

mptable

Ron, I'd suggest changing busses[20] to busses[200] on line 290. My motherboard has a bus 128. It seems to run in 32-bit mode. Steve -Original Message- From: Ronald G. Minnich [mailto:[EMAIL PROTECTED] Sent: Friday, December 10, 2004 11:19 AM To: Kimball, Stephen Cc: LinuxBIOS Subject:

print_spew() question

I changed mainboard/vendor/board/Options.lb: ## Request this level of debugging output default DEFAULT_CONSOLE_LOGLEVEL=9 ## At a maximum only compile in this level of debugging default MAXIMUM_CONSOLE_LOGLEVEL=9 Then I did a buildtarget, make clean and a make. Then romcc complains that

RE: LOGLEVEL

I changed mainboard/vendor/board/Options.lb: ## Request this level of debugging output default DEFAULT_CONSOLE_LOGLEVEL=9 ## At a maximum only compile in this level of debugging default MAXIMUM_CONSOLE_LOGLEVEL=9 you don't change it there, you change it in your targets file.

HT initialization

Hi, I'm trying to port LinuxBIOS to a Opteron board with a CK804. In auto.c I notice that most boards call ht_setup_chain() and use the return code to see if a reset is needed. Since I can't seem to get soft_reset() to work with the CK804, can some on tell me why HT initialization needs a

RE: HT initialization

Thanks. I suspected the HT frequency change needed the soft_reset. I don't want to try LD_STOP so I'll need to get warm or soft reset to work. Steve -Original Message- From: Stefan Reinauer [mailto:[EMAIL PROTECTED] Sent: Monday, January 24, 2005 12:57 PM To: Kimball, Stephen Cc:

FILO dependencies

I'm using FILO with nVidia reference board with a CK804. I've got LinuxBIOS to load FILO and FILO sees the IDE controller but not the drive. I thought FILO was device independent, but could the IDE controllers on the CK804 require FILO changes? Thanks. Steve --- serial

RE: FILO dependencies

I'm using FILO 0.4.2 and have PCI_BRUTE_SCAN=1. I found it to be too brute, so I changed it to only scan buses 0,1,2. No need to scan 256 buses. FILO finds the IDE controller, but the IDE_BASE0 and IDE_BASE1 in FILO's ide.c point to the wrong place. These are PCI addresses? Does FILO assume

RE: FILO dependencies

Thanks for the suggestions. FILO is fine. It work best when the CK804's IDE configuration registers are setup correctly. Steve -Original Message- From: Ronald G. Minnich [mailto:[EMAIL PROTECTED] Sent: Wednesday, March 02, 2005 1:59 PM To: Kimball, Stephen Cc:

RE: Does anybody needs LinuxBIOS for VMware virtual machines?

If you haven't already tried... maybe a few out's to port 0x80 to slow things down. Steve -Original Message- From: Richard Smith [mailto:[EMAIL PROTECTED] Sent: Tuesday, March 08, 2005 9:40 AM To: Ronald G. Minnich Cc: Dmitriy Budko; Eric W. Biederman; linuxbios@clustermatic.org

RE: Help with EPIA

I think the line find_ide_controller: cmd_base=0x0 ctrl_base=0x0 is wrong. Ususally these bases are non-zero. I have seen find_ide_controller: cmd_base=0x170 ctrl_base=0x374 Steve -Original Message- From: Josiah England [mailto:[EMAIL PROTECTED] Sent: Wednesday, March 09, 2005

ACPI with LinuxBIOS

Stafan, I have been trying the get ACPI working on a dual Opteron motherboard.  I have used the island/aruma code as a reference. I have built the dsdt.c and fadt.c files from a commercial BIOS with ACPI.  With the commercial BIOS I see this message:     PCI: PCI BIOS revision 2.10

RE: Booting Linux using netboot and HD

Try turning the device on too: device pci 1.6 on end -Original Message- From: YhLu [mailto:[EMAIL PROTECTED] Sent: Friday, April 22, 2005 3:26 PM To: Nathanael Noblet; beneo Cc: LinuxBIOS Subject: RE: Booting Linux using netboot and HD AMD8111: IDE controller at PCI slot 01:04.1