Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad
Hi All,
Please find a new set of patches that have the following changes.
Changelog - ver XXII
(Version XXI: linuxppc-dev ref:20100525091314.ga29...@in.ibm.com)
- Extraneous breakpoint exceptions are now properly handled; causative
instruction will be single-stepped
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
An alignment interrupt may intervene between a DSI/hw-breakpoint exception
and the single-step exception. Enable the alignment interrupt (through
modifications to emulate_single_step()) to notify the single-step exception
handler for proper restoration of hw-breakpoints.
Signed-off-by: K.Prasad
A signal delivered between a hw_breakpoint_handler() and the
single_step_dabr_instruction() will not have the breakpoint active during
signal handling (since breakpoint will not be restored through single-stepping
due to absence of MSR_SE bit on the signal frame). Enable breakpoints before
signal
Many a times, the requested breakpoint length can be less than the fixed
breakpoint length i.e. 8 bytes supported by PowerPC BookIII S. This could lead
to extraneous interrupts resulting in false breakpoint notifications. The patch
below detects and discards such interrupts for non-ptrace requests
On Thu, May 27, 2010 at 04:19:40PM +1000, Paul Mackerras wrote:
On Tue, May 25, 2010 at 02:44:20PM +0530, K.Prasad wrote:
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them
Device tree update for the Applied micro processor 460ex on-chip SATA.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
---
arch/powerpc/boot/dts/canyonlands.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
Hello.
Rupjyoti Sarmah wrote:
Device tree update for the Applied micro processor 460ex on-chip SATA.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
[...]
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index cd56bb5..d3b2c99 100644
On Fri, 2010-05-28 at 15:08 +1000, Stephen Rothwell wrote:
Hi Steven,
After merging the final tree, today's linux-next build (powerpc allyesconfig)
failed like this:
arch/powerpc/platforms/pseries/hvCall_inst.c: In function 'hcall_inst_init':
The CPM early debug console hardcodes the BAT to cover the IMMR at
0xf000. The IMMR (on the mpc8270 at the very least) can be set to a
number of locations with bootstrap configuration, which are outside the
hardcoded BAT configuration.
This patch determines the correct location at which to
On 05/28/2010 10:18 AM, Martyn Welch wrote:
The CPM early debug console hardcodes the BAT to cover the IMMR at
0xf000. The IMMR (on the mpc8270 at the very least) can be set to a
number of locations with bootstrap configuration, which are outside the
hardcoded BAT configuration.
This patch
Commit-ID: a578f4255763514dc9d0c4f2a60cf5b9323e0b6b
Gitweb: http://git.kernel.org/tip/a578f4255763514dc9d0c4f2a60cf5b9323e0b6b
Author: Stephen Rothwell s...@canb.auug.org.au
AuthorDate: Fri, 28 May 2010 15:08:42 +1000
Committer: Ingo Molnar mi...@elte.hu
CommitDate: Fri, 28 May 2010
O
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index 48f0a00..3d169bb 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -94,6 +94,10 @@ struct screen_info screen_info = {
.orig_video_points = 16
};
The patch looks okay to me.
BTW, where is the i8042 binding documented? Ben, is this location of
the kbd/mouse irq historical, or is it just something that we happened
to get when the .dts files were first created? Having the irq
specified directly in the kbd or aux nodes would make a
On Fri, 2010-05-28 at 11:18 -0500, Scott Wood wrote:
Only the physical address should depend on where IMMR is. We should
use
fixmap instead of an arbitrary address for the effective address.
There's a existing FIX_EARLY_DEBUG_BASE, but it's only 128 KiB so
we'll
have to either grow it,
On Tue, 2010-05-25 at 07:00 -0400, Josh Boyer wrote:
On Tue, May 25, 2010 at 05:43:59PM +1000, Benjamin Herrenschmidt wrote:
Hi folks !
Anybody aware of anything other than Cell using that driver ?
I'd like to make it a platform driver instead of having something that
pokes at anything
Hello,
I use a 82xx or 85xx host platform with a Linux 2.6.24 or 2.2.31.
On this host, I want to write a PCI driver for a target PMC device
wich only supports 30bits (1GB) DMA addressing.
The PMC device is the master of the DMA transfers from/to the host memory.
In the host driver, I begin to
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