Hi Leonardo,
On 6/11/19 12:17 AM, Leonardo Bras wrote:
On Mon, 2019-06-10 at 12:02 +0530, Anju T Sudhakar wrote:
Nest and core imc(In-memory Collection counters) assigns a particular
cpu as the designated target for counter data collection.
During system boot, the first online cpu in a chip
Le 11/06/2019 à 18:30, Horia Geanta a écrit :
On 6/11/2019 6:40 PM, Christophe Leroy wrote:
Le 11/06/2019 à 17:37, Horia Geanta a écrit :
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1
Below commit came with a typo in the CONFIG_ symbol, leading
to a permanently reduced max key size regarless of the driver
capabilities.
Reported-by: Horia Geantă
Fixes: b8fbdc2bc4e7 ("crypto: talitos - reduce max key size for SEC1")
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c
On Wed, Jun 12, 2019 at 8:54 AM Benjamin Herrenschmidt
wrote:
>
> On Tue, 2019-06-11 at 20:22 +0300, Oded Gabbay wrote:
> >
> > > So, to summarize:
> > > If I call pci_set_dma_mask with 48, then it fails on POWER9. However,
> > > in runtime, I don't know if its POWER9 or not, so upon failure I
On Thu, May 30, 2019 at 11:48:26AM +0800, Zhen Lei wrote:
> This patch removes the ifdefs around CONFIG_IOMMU_DEFAULT_PASSTHROUGH to
> improve readablity.
Avoid having "This patch" or "This commit" in the commit message. It is
tautologically useless.
Also, do
$ git grep 'This patch'
On 6/5/19 11:11 PM, Shawn Anastasio wrote:
On 5/30/19 2:03 AM, Alexey Kardashevskiy wrote:
This is an attempt to allow DMA masks between 32..59 which are not large
enough to use either a PHB3 bypass mode or a sketchy bypass. Depending
on the max order, up to 40 is usually available.
This is
On Fri, 2019-06-07 at 03:56:36 UTC, Nicholas Piggin wrote:
> The change to pmdp_invalidate to mark the pmd with _PAGE_INVALID broke
> the synchronisation against lock free lookups, __find_linux_pte's
> pmd_none check no longer returns true for such cases.
>
> Fix this by adding a check for this
On Fri, 2019-06-07 at 03:56:35 UTC, Nicholas Piggin wrote:
> Commit 1b2443a547f9 ("powerpc/book3s64: Avoid multiple endian conversion
> in pte helpers") changed the actual bitwise tests in pte_access_permitted
> by using pte_write() and pte_present() helpers rather than raw bitwise
> testing
On Mon, 2019-06-03 at 13:00:51 UTC, Christophe Leroy wrote:
> When booting through OF, setup_disp_bat() does nothing because
> disp_BAT are not set. By change, it used to work because BOOTX
> buffer is mapped 1:1 at address 0x8100 by the bootloader, and
> btext_setup_display() sets virt addr
On Mon, 2019-06-03 at 08:20:28 UTC, Christophe Leroy wrote:
> In the old days, _PAGE_EXEC didn't exist on 6xx aka book3s/32.
> Therefore, allthough __mapin_ram_chunk() was already mapping kernel
> text with PAGE_KERNEL_TEXT and the rest with PAGE_KERNEL, the entire
> memory was executable. Part of
Partition migration often results in the platform telling the OS to
replace all the cache nodes in the device tree. The cacheinfo code has
no knowledge of this, and continues to maintain references to the
deleted/detached nodes, causing subsequent CPU online/offline
operations to get warnings and
CPU online/offline code paths are sensitive to parts of the device
tree (various cpu node properties, cache nodes) that can be changed as
a result of a migration.
Prevent CPU hotplug while the device tree potentially is inconsistent.
Fixes: 410bccf97881 ("powerpc/pseries: Partition migration in
It's common for the platform to replace the cache device nodes after a
migration. Since the cacheinfo code is never informed about this, it
never drops its references to the source system's cache nodes, causing
it to wind up in an inconsistent state resulting in warnings and oopses
as soon as CPU
Allow external callers to force the cacheinfo code to release all its
references to cache nodes, e.g. before processing device tree updates
post-migration, and to rebuild the hierarchy afterward.
CPU online/offline must be blocked by callers; enforce this.
Fixes: 410bccf97881 ("powerpc/pseries:
On Tue, 2019-06-11 at 20:52 -0500, Larry Finger wrote:
> On 6/11/19 5:46 PM, Benjamin Herrenschmidt wrote:
> > On Tue, 2019-06-11 at 17:20 -0500, Larry Finger wrote:
> > > b43-pci-bridge 0001:11:00.0: dma_direct_supported: failed (mask =
> > > 0x3fff,
> > > min_mask = 0x5000/0x5000,
On 6/11/19 5:46 PM, Aaro Koskinen wrote:
Hi,
On Tue, Jun 11, 2019 at 05:20:12PM -0500, Larry Finger wrote:
It is obvious that the case of a mask smaller than min_mask should be
handled by the IOMMU. In my system, CONFIG_IOMMU_SUPPORT is selected. All
other CONFIG variables containing IOMMU are
On 6/11/19 5:46 PM, Benjamin Herrenschmidt wrote:
On Tue, 2019-06-11 at 17:20 -0500, Larry Finger wrote:
b43-pci-bridge 0001:11:00.0: dma_direct_supported: failed (mask =
0x3fff,
min_mask = 0x5000/0x5000, dma bits = 0x1f
Ugh ? A mask with holes in it ? That's very wrong... That
> On Jun 11, 2019, at 5:52 PM, Nicholas Piggin wrote:
>
> Christoph Hellwig's on June 12, 2019 12:41 am:
>> Instead of passing a set of always repeated arguments down the
>> get_user_pages_fast iterators, create a struct gup_args to hold them and
>> pass that by reference. This leads to an over
On Tue, Jun 11, 2019 at 2:55 PM Nicholas Piggin wrote:
>
> What does this do for performance? I've found this pattern can be
> bad for store aliasing detection.
I wouldn't expect it to be noticeable, and the lack of argument
reloading etc should make up for it. Plus inlining makes it a
non-issue
Christoph Hellwig's on June 12, 2019 12:41 am:
> Instead of passing a set of always repeated arguments down the
> get_user_pages_fast iterators, create a struct gup_args to hold them and
> pass that by reference. This leads to an over 100 byte .text size
> reduction for x86-64.
What does this do
On Tue, 2019-06-11 at 20:22 +0300, Oded Gabbay wrote:
>
> > So, to summarize:
> > If I call pci_set_dma_mask with 48, then it fails on POWER9. However,
> > in runtime, I don't know if its POWER9 or not, so upon failure I will
> > call it again with 32, which makes our device pretty much unusable.
On Tue, 2019-06-11 at 17:20 -0500, Larry Finger wrote:
> b43-pci-bridge 0001:11:00.0: dma_direct_supported: failed (mask =
> 0x3fff,
> min_mask = 0x5000/0x5000, dma bits = 0x1f
Ugh ? A mask with holes in it ? That's very wrong... That min_mask is
bogus.
Ben.
Hi,
On Tue, Jun 11, 2019 at 05:20:12PM -0500, Larry Finger wrote:
> It is obvious that the case of a mask smaller than min_mask should be
> handled by the IOMMU. In my system, CONFIG_IOMMU_SUPPORT is selected. All
> other CONFIG variables containing IOMMU are not selected. When
>
On 6/11/19 1:05 AM, Christoph Hellwig wrote:
On Mon, Jun 10, 2019 at 11:09:47AM -0500, Larry Finger wrote:
What might be confusing in your output is that dev->dma_mask is a pointer,
and we are setting it in dma_set_mask. That is before we only check
if the pointer is set, and later we override
https://bugzilla.kernel.org/show_bug.cgi?id=203837
--- Comment #4 from Shawn Anastasio (sh...@anastas.io) ---
I have applied Nick's patchset to 5.1.7 but the issue still occurs.
As for using pdbg, I'm aware of the tool's existence but I'm not sure how
I would effectively use it to diagnose this
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> We only support the generic GUP now, so rename the config option to
> be more clear, and always use the mm/Kconfig definition of the
> symbol and select it from the arch Kconfigs.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/arm/Kconfig |
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> The sparc64 code is mostly equivalent to the generic one, minus various
> bugfixes and two arch overrides that this patch adds to pgtable.h.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/sparc/Kconfig | 1 +
>
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> Add a helper to untag a user pointer. This is needed for ADI support
> in get_user_pages_fast.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/sparc/include/asm/pgtable_64.h | 22 ++
> 1 file changed, 22 insertions(+)
Looks
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> This will allow sparc64 to override its ADI tags for
> get_user_pages and get_user_pages_fast.
>
> Signed-off-by: Christoph Hellwig
> ---
Commit message is sparc64 specific but the goal here is to allow any
architecture with memory tagging to use
On Tue, Jun 11, 2019 at 8:05 PM Mauro Carvalho Chehab
wrote:
>
> Em Tue, 11 Jun 2019 19:52:04 +0300
> Andy Shevchenko escreveu:
>
> > On Fri, Jun 7, 2019 at 10:04 PM Mauro Carvalho Chehab
> > wrote:
> > > Sphinx doesn't like orphan documents:
> >
> > > Documentation/laptops/lg-laptop.rst:
When calling debugfs functions, there is no need to ever check the
return value. The function can work or not, but the code logic should
never do something different based on this.
Because there's no need to check, also make the return value of the
local debugfs_create_io_x64() call void, as no
On Jun 10 2019, Larry Finger wrote:
> I do not understand why the if statement returns true as neither of the
> values is zero.
That's because the format string does not make any sense. You are
printing garbage.
> diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
> index
On Tue, 2019-06-11 at 10:44 +0530, Anshuman Khandual wrote:
>
> On 06/10/2019 08:57 PM, Leonardo Bras wrote:
> > On Mon, 2019-06-10 at 08:09 +0530, Anshuman Khandual wrote:
> > > > > +/*
> > > > > + * To be potentially processing a kprobe fault and to be allowed
> > > > > + * to call
On Tue, Jun 11, 2019 at 8:03 PM Oded Gabbay wrote:
>
> On Tue, Jun 11, 2019 at 6:26 PM Greg KH wrote:
> >
> > On Tue, Jun 11, 2019 at 08:17:53AM -0700, Christoph Hellwig wrote:
> > > On Tue, Jun 11, 2019 at 11:58:57AM +0200, Greg KH wrote:
> > > > That feels like a big hack. ppc doesn't have
On Tue, Jun 11, 2019 at 5:07 PM Christoph Hellwig wrote:
>
> On Tue, Jun 11, 2019 at 03:30:08PM +0300, Oded Gabbay wrote:
> > Hello POWER developers,
> >
> > I'm trying to find out if there is an internal kernel API so that a
> > PCI driver can call it to check if its PCI device is running inside
Le 11/06/2019 à 18:30, Horia Geanta a écrit :
On 6/11/2019 6:40 PM, Christophe Leroy wrote:
Le 11/06/2019 à 17:37, Horia Geanta a écrit :
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1
On 06/11/2019 01:19 AM, Satheesh Rajendran wrote:
On Mon, Jun 10, 2019 at 04:33:57PM -0400, Nayna Jain wrote:
PowerNV secure boot relies on the kernel IMA security subsystem to
perform the OS kernel image signature verification. Since each secure
boot mode has different IMA policy
PowerNV secure boot defines different IMA policies based on the secure
boot state of the system.
This patch defines a function to detect the secure boot state of the
system.
Signed-off-by: Nayna Jain
---
arch/powerpc/include/asm/secboot.h | 21
PowerNV secure boot relies on the kernel IMA security subsystem to
perform the OS kernel image signature verification. Since each secure
boot mode has different IMA policy requirements, dynamic definition of
the policy rules based on the runtime secure boot mode of the system is
required. On
From: Claudio Carvalho
The X.509 certificates trusted by the platform and other information
required to secure boot the OS kernel are wrapped in secure variables,
which are controlled by OPAL.
This patch adds support to read OPAL secure variables through
OPAL_SECVAR_GET call. It returns the
This patch set, previously named "powerpc: Enabling secure boot on powernv
systems - Part 1", is part of a series that implements secure boot on
PowerNV systems.
In order to verify the OS kernel on PowerNV, secure boot requires X.509
certificates trusted by the platform, the secure boot modes,
Em Tue, 11 Jun 2019 19:52:04 +0300
Andy Shevchenko escreveu:
> On Fri, Jun 7, 2019 at 10:04 PM Mauro Carvalho Chehab
> wrote:
> > Sphinx doesn't like orphan documents:
>
> > Documentation/laptops/lg-laptop.rst: WARNING: document isn't included
> > in any toctree
>
> >
On Fri, Jun 7, 2019 at 10:04 PM Mauro Carvalho Chehab
wrote:
> Sphinx doesn't like orphan documents:
> Documentation/laptops/lg-laptop.rst: WARNING: document isn't included in
> any toctree
> Documentation/laptops/lg-laptop.rst | 2 ++
> diff --git
Le 11/06/2019 à 17:47, Christophe Leroy a écrit :
The patch referenced below moved the loading of segment registers
out of load_up_mmu() in order to do it earlier in the boot sequence.
However, the secondary CPU still needs it to be done when loading up
the MMU.
Reported-by: Erhard F.
On 6/11/2019 6:40 PM, Christophe Leroy wrote:
>
>
> Le 11/06/2019 à 17:37, Horia Geanta a écrit :
>> On 6/11/2019 5:39 PM, Christophe Leroy wrote:
>>> This series is the last set of fixes for the Talitos driver.
>>>
>>> We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
>>> SEC2
The patch referenced below moved the loading of segment registers
out of load_up_mmu() in order to do it earlier in the boot sequence.
However, the secondary CPU still needs it to be done when loading up
the MMU.
Reported-by: Erhard F.
Fixes: 215b823707ce ("powerpc/32s: set up an early static
Le 11/06/2019 à 17:37, Horia Geanta a écrit :
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
I am
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
> This series is the last set of fixes for the Talitos driver.
>
> We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
> SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
>
I am getting below failures on a sec 3.3.2
Instead of passing a set of always repeated arguments down the
get_user_pages_fast iterators, create a struct gup_args to hold them and
pass that by reference. This leads to an over 100 byte .text size
reduction for x86-64.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 338
All other get_user_page_fast cases mark the page referenced, so do
this here as well.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/mm/gup.c b/mm/gup.c
index 0733674b539d..8bcc042f933a 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2021,6 +2021,7 @@
While only powerpc supports the hugepd case, the code is pretty
generic and I'd like to keep all GUP internals in one place.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/mm/hugetlbpage.c | 72 --
include/linux/hugetlb.h
This applies the overflow fixes from 8fde12ca79aff
("mm: prevent get_user_pages() from overflowing page refcount")
to the powerpc hugepd code and brings it back in sync with the
other GUP cases.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 3 ++-
1 file changed, 2 insertions(+), 1
Always build mm/gup.c, and move the nommu versions and replace the
separate stubs for various functions by the default ones, with the _fast
version always falling back to the slow path because gup_fast_permitted
always returns false now if HAVE_FAST_GUP is not set, and we use the
nommu version of
We can only deal with FOLL_WRITE and/or FOLL_LONGTERM in
get_user_pages_fast, so reject all other flags.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/mm/gup.c b/mm/gup.c
index fe4f205651fd..78dc1871b3d4 100644
--- a/mm/gup.c
+++ b/mm/gup.c
We only support the generic GUP now, so rename the config option to
be more clear, and always use the mm/Kconfig definition of the
symbol and select it from the arch Kconfigs.
Signed-off-by: Christoph Hellwig
---
arch/arm/Kconfig | 5 +
arch/arm64/Kconfig | 4 +---
arch/mips/Kconfig
The sparc64 code is mostly equivalent to the generic one, minus various
bugfixes and two arch overrides that this patch adds to pgtable.h.
Signed-off-by: Christoph Hellwig
---
arch/sparc/Kconfig | 1 +
arch/sparc/include/asm/pgtable_64.h | 18 ++
arch/sparc/mm/Makefile
Add a helper to untag a user pointer. This is needed for ADI support
in get_user_pages_fast.
Signed-off-by: Christoph Hellwig
---
arch/sparc/include/asm/pgtable_64.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/sparc/include/asm/pgtable_64.h
sparc64 only had pgd_page_vaddr, but not pgd_page.
Signed-off-by: Christoph Hellwig
---
arch/sparc/include/asm/pgtable_64.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sparc/include/asm/pgtable_64.h
b/arch/sparc/include/asm/pgtable_64.h
index 22500c3be7a9..f0dcf991d27f 100644
---
The sh code is mostly equivalent to the generic one, minus various
bugfixes and two arch overrides that this patch adds to pgtable.h.
Signed-off-by: Christoph Hellwig
---
arch/sh/Kconfig | 2 +
arch/sh/include/asm/pgtable.h | 37 +
arch/sh/mm/Makefile | 2 +-
sh only had pud_page_vaddr, but not pud_page.
Signed-off-by: Christoph Hellwig
---
arch/sh/include/asm/pgtable-3level.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sh/include/asm/pgtable-3level.h
b/arch/sh/include/asm/pgtable-3level.h
index 7d8587eb65ff..3c7ff20f3f94 100644
---
The split low/high access is the only non-READ_ONCE version of
gup_get_pte that did show up in the various arch implemenations.
Lift it to common code and drop the ifdef based arch override.
Signed-off-by: Christoph Hellwig
---
arch/x86/Kconfig | 1 +
The mips code is mostly equivalent to the generic one, minus various
bugfixes and an arch override for gup_fast_permitted.
Note that this defines ARCH_HAS_PTE_SPECIAL for mips as mips has
pte_special and pte_mkspecial implemented and used in the existing
gup code. They are no-op stubs, though
Pass in the already calculated end value instead of recomputing it, and
leave the end > start check in the callers instead of duplicating them
in the arch code.
Signed-off-by: Christoph Hellwig
---
arch/s390/include/asm/pgtable.h | 8 +---
arch/x86/include/asm/pgtable_64.h | 8 +---
Hi Linus and maintainers,
below is a series to switch mips, sh and sparc64 to use the generic
GUP code so that we only have one codebase to touch for further
improvements to this code. I don't have hardware for any of these
architectures, and generally no clue about their page table
management,
This will allow sparc64 to override its ADI tags for
get_user_pages and get_user_pages_fast.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index ddde097cf9e4..6bb521db67ec 100644
--- a/mm/gup.c
+++
When building for SEC1 only, talitos2_done functions are unneeded
and should go away.
For this, use has_ftr_sec1() which will always return true when only
SEC1 support is being built, allowing GCC to drop TALITOS2 functions.
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c | 2 +-
icv_ool is not used anymore, drop it.
Fixes: 9cc87bc3613b ("crypto: talitos - fix AEAD processing")
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c | 3 ---
drivers/crypto/talitos.h | 2 --
2 files changed, 5 deletions(-)
diff --git a/drivers/crypto/talitos.c
On SEC1, hash provides wrong result when performing hashing in several
steps with input data SG list has more than one element. This was
detected with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
[ 44.185947] alg: hash: md5-talitos test failed (wrong result) on test vector
6, cfg="random: may_sleep
Next patch will require struct talitos_edesc to be defined
earlier in talitos.c
This patch moves it into talitos.h so that it can be used
from any place in talitos.c
Fixes: 37b5e8897eb5 ("crypto: talitos - chain in buffered data for ahash on
SEC1")
Cc: sta...@vger.kernel.org
Signed-off-by:
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
[3.385197] bus: 'platform': really_probe: probing driver talitos with
device ff02.crypto
[
Move SPR reads ahead of writes. Real mode entry that is not a KVM
guest is rare these days, but bad practice propagates.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
syscall / hcall entry unnecessarily differs between KVM and non-KVM
builds. Move the SMT priority instruction to the same location
(after INTERRUPT_TO_KERNEL).
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 25 +++--
1 file changed, 7
No generated code change. File is change is in bug table line numbers.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 17 +++--
arch/powerpc/kernel/exceptions-64s.S | 22 ++
2 files changed, 25 insertions(+), 14 deletions(-)
No generated code change. File is change is in bug table line numbers.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 97 +---
1 file changed, 45 insertions(+), 52 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
The bad stack test in interrupt handlers has a few problems. For
performance it is taken in the common case, which is a fetch bubble
and a waste of i-cache.
For code development and maintainence, it requires yet another stack
frame setup routine, and that constrains all exception handlers to
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 29 +++-
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index
Generally, macros that result in instructions being expanded are
indented by a tab, and those that don't have no indent. Fix the
obvious cases that go contrary to style.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 92
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 127 ---
1 file changed, 55 insertions(+), 72 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 43
1 file changed, 18 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 1 -
arch/powerpc/include/asm/head-64.h | 252 ---
arch/powerpc/kernel/exceptions-64s.S | 251 ++
3 files changed, 251 insertions(+), 253
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 430 --
arch/powerpc/kernel/exceptions-64s.S | 431 +++
2 files changed, 431 insertions(+), 430 deletions(-)
diff --git
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h
b/arch/powerpc/include/asm/exception-64s.h
index
These are only called in one place each.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 22 --
arch/powerpc/include/asm/head-64.h | 19 +--
2 files changed, 17 insertions(+), 24 deletions(-)
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 113 ---
1 file changed, 57 insertions(+), 56 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h
b/arch/powerpc/include/asm/exception-64s.h
index
After the previous cleanup, it becomes possible to consolidate some
common code outside the runtime alternate patching. Also remove
unused labels.
This results in some code change, but unchanged runtime instruction
sequence.
Signed-off-by: Nicholas Piggin
---
Many of these macros just specify 1-4 lines which are only called a
few times each at most, and often just once. Remove this indirection.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 101 ---
The aim is to reduce the amount of indirection it takes to get through
the exception handler macros, particularly where it provides little
code sharing.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 26
More cases of code insertion via macros that does not add a great
deal. All the additions have to be specified in the macro arguments,
so they can just as well go after the macro.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 42
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 25
arch/powerpc/kernel/exceptions-64s.S | 24 +++
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git
Move the KVM trap HSRR bit into the KVM handler, which can be
conditionally applied when hsrr parameter is set.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 5 +
arch/powerpc/include/asm/head-64.h | 7 ++-
2 files
Conditionally expand the skip case if it is specified.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 28 +---
arch/powerpc/include/asm/head-64.h | 8 +++
arch/powerpc/kernel/exceptions-64s.S | 2 +-
3
Conditionally expand the soft-masking test if a mask is passed in.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 113 +--
arch/powerpc/kernel/exceptions-64s.S | 20 ++--
2 files changed, 55 insertions(+), 78
The sreset handler KVM test theoretically should not depend on P7.
In practice KVM now only supports P7 and up so no real bug fix, but
this change is made now so the quirk is not propagated through
cleanup patches.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 6
Switch to a gas macro that conditionally expands the RI clearing
instruction.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 43 ++--
arch/powerpc/kernel/exceptions-64s.S | 12 +++
2 files changed, 17
Rather than pass in the soft-masking and KVM tests via macro that is
passed to another macro to expand it, switch to usig gas macros and
conditionally expand the soft-masking and KVM tests.
The system reset with its idle test is open coded as it is a one-off.
No generated code change.
- Re-name the macros to _REAL and _VIRT suffixes rather than no and
_RELON suffix.
- Move the macro definitions together in the file.
- Move RELOCATABLE ifdef inside the _VIRT macro.
Further consolidation between variants does not buy much here.
No generated code change.
Signed-off-by:
Replace all instances of this with gas macros that test the hsrr
parameter and use the appropriate register names / labels.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 333 +--
arch/powerpc/include/asm/head-64.h
This is another revision of the previous series rebased to upstream,
fixes, additions, and more testing.
Code changes were tested mostly with ppc64le_defconfig config, diffing
head_64.o from each build.
Most patches cause no changes to generated code, though a few at the
end make significant
By convention, all lines should be separated by a semicolons. Last line
should have neither semicolon or line wrap.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 36 ++---
arch/powerpc/include/asm/head-64.h | 68
On Tue, Jun 11, 2019 at 03:30:08PM +0300, Oded Gabbay wrote:
> Hello POWER developers,
>
> I'm trying to find out if there is an internal kernel API so that a
> PCI driver can call it to check if its PCI device is running inside a
> POWER9 machine. Alternatively, if that's not available, if it is
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