On Apr 5, 2013, at 2:53 AM, Bhushan Bharat-R65777 wrote:
Hi Kumar/Benh,
After further looking into the code I think that if we correct the vector
range below in DebugDebug handler then we do not need the change I provided
in this patch.
Here is the snapshot for 32 bit (head_booke.h,
On Apr 8, 2013, at 2:35 PM, Paul Bolle wrote:
The last users of Kconfig symbol MPC10X_OPENPIC were removed in v2.6.27.
Its Kconfig entry can be removed now.
Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
Untested.
arch/powerpc/platforms/embedded6xx/Kconfig | 5 -
1 file changed,
On Mar 13, 2013, at 2:07 PM, Kumar Gala wrote:
Move to keeping the SoC registers that control and config the PCI
controllers on FSL SoCs in the pci_controller struct. This allows us to
not need to ioremap() the registers in multiple different places that
use them.
Signed-off-by: Kumar
-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Vakul Garg va...@freescale.com
---
v2:
- incorporated review comments on commits message
- change unit address of cpu nodes to match the reg property
arch/powerpc/boot/dts
-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts
On Apr 5, 2013, at 1:33 AM, Shaveta Leekha wrote:
- Add support for B4 board in board file b4_qds.c,
It is common for B4860, B4420 and B4220QDS as they share same QDS board
- Add B4QDS support in Kconfig and Makefile
B4860QDS is a high-performance computing evaluation, development and
On Apr 5, 2013, at 1:33 AM, Shaveta Leekha wrote:
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/configs/corenet64_smp_defconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
applied to next
- k
___
Linuxppc-dev
On Apr 8, 2013, at 3:15 AM, Rojhalat Ibrahim wrote:
Up to now the PCIe link status on Freescale PCIe controllers was only
checked once at boot time. So hotplug did not work. With this patch the
link status is checked on every config read. PCIe devices not present at
boot time are found after
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Vakul Garg va...@freescale.com
---
v2:
- incorporated review comments on commits message
- change unit address of cpu nodes to match the reg property
arch/powerpc/boot/dts
* Fix cpu unit address to match reg
* Update compatible for rcpm clockgen to be 2.0 instead of 2
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |4 ++--
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | 22 +++---
2 files
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index 9b39a43
-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Vakul Garg va...@freescale.com
---
v2:
- incorporated review comments on commits message
- change unit address of cpu nodes to match the reg property
arch/powerpc/boot/dts/fsl
:
On Thursday 14 March 2013 15:35:40 Kumar Gala wrote:
On Mar 14, 2013, at 4:43 AM, Rojhalat Ibrahim wrote:
On Wednesday 13 March 2013 14:07:16 Kumar Gala wrote:
diff --git a/arch/powerpc/sysdev/fsl_pci.c
b/arch/powerpc/sysdev/fsl_pci.c
index 41bbcc4..b18c377 100644
--- a/arch/powerpc/sysdev
On Apr 4, 2013, at 2:03 AM, Leekha Shaveta-B20052 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, April 03, 2013 10:10 PM
To: Leekha Shaveta-B20052
Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336;
Lian Minghuan-B31939; Garg
On Apr 4, 2013, at 2:10 AM, Leekha Shaveta-B20052 wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Wednesday, April 03, 2013 10:10 PM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Li Yang-R58472; Tang
On Apr 3, 2013, at 8:09 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
The bootloader have done time base sync for all cores, so skip
the synchronization process at boot time of kernel.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang
On Apr 3, 2013, at 10:24 AM, Bhushan Bharat-R65777 wrote:
Hi All,
The kernel exception handling code for 32 bit (transfer_to_handler in
entry_32.S) clear DBSR and load DBCR0 with 0 (global_dbcr0 variable, which is
zero) if user space used debug (DBCR0.IDM set).
But I do not same
On Apr 2, 2013, at 2:16 AM, Shaveta Leekha wrote:
- Add support for B4 board in board file b4_qds.c,
It is common for B4860, B4420 and B4220QDS as they share same QDS board
- Add B4QDS support in Kconfig and Makefile
B4860QDS is a high-performance computing evaluation, development and
On Mar 18, 2013, at 6:19 PM, Ben Collins wrote:
Somehow the driver snuck in with these still in it.
Signed-off-by: Ben Collins be...@servergy.com
---
arch/powerpc/platforms/85xx/sgy_cts1000.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
applied to next
- k
On Apr 3, 2013, at 8:09 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
mpic_reset_core() need a logical cpu number instead of physical.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
On Apr 2, 2013, at 8:33 AM, Sebastian Andrzej Siewior wrote:
lockdep thinks that it might deadlock because it grabs a lock of the
same class while calling the generic_irq_handler(). This annotation will
inform lockdep that it will not.
Signed-off-by: Sebastian Andrzej Siewior
On Apr 2, 2013, at 2:14 AM, va...@freescale.com va...@freescale.com wrote:
From: Shaveta Leekha shav...@freescale.com
Signed-off-by: Vakul Garg va...@freescale.com
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/boot/dts/fsl/qoriq-sec5.3-0.dtsi | 118
On Mar 29, 2013, at 8:06 AM, Roy Zang wrote:
The size might be 64 bit, so use ilog2() instead of __ilog2() or
__ilog2_u64().
ilog2() can select 32bit or 64bit funciton automatically.
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
arch/powerpc/sysdev/fsl_pci.c | 10 +-
On Apr 2, 2013, at 12:49 PM, Scott Wood wrote:
On 04/02/2013 01:35:05 AM, Jia Hongtao-B38951 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Saturday, March 30, 2013 5:55 AM
To: Jia Hongtao-B38951
Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org; Wood
On Mar 18, 2013, at 3:31 AM, Prabhakar Kushwaha wrote:
Add CONFIG(s) required for NAND and NOR flash controller usage.
It defines MTD, Jffs2 and UBIFS file system required for controllers.
It also enables IFC controller
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
On Mar 18, 2013, at 2:11 PM, Kumar Gala wrote:
From: Stephen George stephen.geo...@freescale.com
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George stephen.geo...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc
On Mar 18, 2013, at 2:11 PM, Kumar Gala wrote:
From: Stephen George stephen.geo...@freescale.com
Signed-off-by: Stephen George stephen.geo...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 131
On Mar 18, 2013, at 1:28 AM, Leekha Shaveta-B20052 wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Friday, March 15, 2013 9:28 PM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 5/6] powerpc/fsl-booke: Add
On Mar 18, 2013, at 8:50 AM, Sergey Gerasimov wrote:
Signed-off-by: Sergey Gerasimov sergey.gerasi...@astrosoft-development.com
---
arch/powerpc/sysdev/fsl_pci.c | 71 +--
1 file changed, 34 insertions(+), 37 deletions(-)
Can you repost with subject
On Mar 17, 2013, at 10:48 AM, Sethi Varun-B16395 wrote:
+ guts_node = of_find_compatible_node(NULL, NULL,
+ fsl,qoriq-device-config-1.0);
This doesn't work for T4 or B4 device trees.
[Sethi Varun-B16395]hmm I need to use the dcfg space for this.
Let's see with
On Mar 18, 2013, at 1:31 AM, Leekha Shaveta-B20052 wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Saturday, March 16, 2013 1:57 AM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Lian Minghuan-B31939; Fleming
Andy-AFLEMING
On Mar 18, 2013, at 2:41 AM, Leekha Shaveta-B20052 wrote:
-Original Message-
From: Timur Tabi [mailto:ti...@tabi.org]
Sent: Friday, March 15, 2013 6:38 PM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Zhao Chenhui-B35336; Lian Minghuan-B31939;
Tang
As the T4240 is based on corenet chassis v2.0 spec we update the global
utilities (GUTS) device config compatiable to reflect this.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Stephen George stephen.geo...@freescale.com
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George stephen.geo...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi |2 +-
arch/powerpc
From: Stephen George stephen.geo...@freescale.com
Signed-off-by: Stephen George stephen.geo...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 131 +++
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | 25
On Mar 18, 2013, at 9:59 AM, Kumar Gala wrote:
On Mar 17, 2013, at 10:48 AM, Sethi Varun-B16395 wrote:
+ guts_node = of_find_compatible_node(NULL, NULL,
+ fsl,qoriq-device-config-1.0);
This doesn't work for T4 or B4 device trees.
[Sethi Varun-B16395]hmm I
On Mar 18, 2013, at 8:47 AM, Sergey Gerasimov wrote:
Signed-off-by: Sergey Gerasimov sergey.gerasi...@astrosoft-development.com
---
arch/powerpc/boot/dts/ib8315.dts | 490 +++
arch/powerpc/configs/83xx/ib8315_defconfig | 2121
On Mar 14, 2013, at 9:00 PM, Jia Hongtao-B38951 wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Friday, March 15, 2013 4:05 AM
To: Jia Hongtao-B38951
Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421;
mich...@ellerman.id.au; Li Yang-R58472
varun.se...@freescale.com
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:
- Add support for B4 board's personalities in board file
b4_qds.c, It is common for B4 personalities B4860 and B4420QDS
- Add B4QDS support in Kconfig and Makefile
Code also references a B4220, what about it?
B4860QDS is a
Commit 193ab2a6070039e7ee2b9b9bebea754a7c52fd1b changed the USB gadget
Kconfig symbol from USB_GADGET_FSL_QE to USB_FSL_QE, but did not update
the associated symbol name in qe_lib to match.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/sysdev/qe_lib/Kconfig |2 +-
1
On Mar 12, 2013, at 4:49 PM, Paul Bolle wrote:
The Kconfig entry for QE_USB contains
default y if USB_GADGET_FSL_QE
But USB_GADGET_FSL_QE got removed in commit
193ab2a6070039e7ee2b9b9bebea754a7c52fd1b (usb: gadget: allow multiple
gadgets to be built). This default will therefor
On Mar 14, 2013, at 10:40 AM, Roy Zang wrote:
E1000 NIC is a common used Ethernet card. Enable it as default
for mpc85xx platform.
other change is due to make savedefconfig
Reported-by: Fu Jiwei b36...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
tested on
On Mar 14, 2013, at 10:14 AM, Paul Bolle wrote:
The last user of Kconfig symbol 8260_PCI9 got removed in release v3.2.
Remove this symbol too.
Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
0) Untested.
1) This probably is a second order effect of my commit
On Mar 15, 2013, at 1:14 AM, Jia Hongtao wrote:
mpc85xx_pci_err_probe(struct platform_device *op) need platform_device
declaration for definition. Otherwise, it will cause compile error if any
files including fsl_pci.h without declaration of platform_device.
Signed-off-by: Jia Hongtao
-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/b4860qds.dts | 178
1 files changed, 178 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/b4860qds.dts
diff --git
varun.se...@freescale.com
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/boot/dts/b4420qds.dts | 168
1 files changed, 168 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/b4420qds.dts
On Mar 14, 2013, at 5:35 AM, Jia Hongtao wrote:
The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
that neither MSI nor MSI-X can work fine. This is a workaround to allow
MSI-X to function properly.
Signed-off-by: Liu Shuo soniccat@gmail.com
Signed-off-by: Li
On Mar 13, 2013, at 1:49 PM, Varun Sethi wrote:
+/*
+ * Table of SVRs and the corresponding PORT_ID values.
+ *
+ * All future CoreNet-enabled SOCs will have this erratum fixed, so this
table
+ * should never need to be updated. SVRs are guaranteed to be unique, so
+ * there is no worry
On Mar 14, 2013, at 3:20 PM, Kumar Gala wrote:
On Mar 13, 2013, at 1:49 PM, Varun Sethi wrote:
+/*
+ * Table of SVRs and the corresponding PORT_ID values.
+ *
+ * All future CoreNet-enabled SOCs will have this erratum fixed, so this
table
+ * should never need to be updated. SVRs
On Mar 14, 2013, at 4:43 AM, Rojhalat Ibrahim wrote:
On Wednesday 13 March 2013 14:07:16 Kumar Gala wrote:
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 41bbcc4..b18c377 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
On Mar 13, 2013, at 5:06 AM, Rojhalat Ibrahim wrote:
On Tuesday 12 March 2013 15:48:01 Kumar Gala wrote:
I'd rather we just export indirect_read_config() indirect_write_config()
from indirect_pci.c and call the functions directly. Adding a global and
call them via a function pointer seems
Move to keeping the SoC registers that control and config the PCI
controllers on FSL SoCs in the pci_controller struct. This allows us to
not need to ioremap() the registers in multiple different places that
use them.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/include
From: Rojhalat Ibrahim i...@rtschenk.de
Signed-off-by: Rojhalat Ibrahim i...@rtschenk.de
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/include/asm/pci-bridge.h |6 ++
arch/powerpc/sysdev/fsl_pci.c | 37 +
arch/powerpc
On Feb 8, 2013, at 1:22 PM, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-removed KVM prefix to patch subject, patch is not KVM specific
arch/powerpc/kernel/epapr_hcalls.S |2 ++
On Mar 12, 2013, at 4:23 AM, Rojhalat Ibrahim wrote:
On Monday 11 March 2013 12:17:42 Kumar Gala wrote:
Rather than do it this way, we should do something like:
fsl_indirect_read_config() {
link check
if (link)
indirect_read_config()
}
and just add
On Mar 10, 2013, at 9:36 PM, Jia Hongtao-B38951 wrote:
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Saturday, March 09, 2013 4:38 AM
To: Jia Hongtao-B38951
Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li Yang-R58472
Subject: Re: [PATCH
On Mar 12, 2013, at 3:44 PM, Kumar Gala wrote:
On Mar 12, 2013, at 4:23 AM, Rojhalat Ibrahim wrote:
On Monday 11 March 2013 12:17:42 Kumar Gala wrote:
Rather than do it this way, we should do something like:
fsl_indirect_read_config() {
link check
if (link
On Mar 5, 2013, at 4:39 PM, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v2
-deo is EREF specific, changed name of property
arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi |1 +
On Mar 5, 2013, at 4:39 PM, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
-also define a binding for fsl,eref-* properties
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v3
-converted EREF specific properties to fsl,eref-*
On Feb 25, 2013, at 8:33 PM, Jiucheng Xu wrote:
Due to the partition of JFFS2 overlaps with QE ucode firmware, So JFFS2
will break QE ucode. Shrink JFFS2's partition to reserve the space of
QE ucode firmware.
Signed-off-by: Jiucheng Xu jiucheng...@freescale.com
---
On Mar 12, 2013, at 3:03 PM, Scott Wood wrote:
This is a commonly used ethernet card, especially with mainline kernels
which lack datapath support.o
Other changes are due to running savedefconfig.
Signed-off-by: Scott Wood scottw...@freescale.com
---
On Mar 12, 2013, at 1:43 AM, yuantian.t...@freescale.com
yuantian.t...@freescale.com wrote:
From: Tang Yuantian yuantian.t...@freescale.com
Config FSL_SOC does not depend on PPC_CLOCK anymore since the following
commit got merged: 93abe8e (clk: add non CONFIG_HAVE_CLK routines)
Config CPM
On Mar 5, 2013, at 5:15 PM, Kumar Gala wrote:
From: Vakul Garg va...@freescale.com
Add device tree for SEC (crypto engine) version 5.0 used on T4240.
Signed-off-by: Vakul Garg va...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Kumar Gala ga
On Mar 7, 2013, at 1:58 PM, Kumar Gala wrote:
Enable a baseline T4240 SoC to boot. There are several things missing
from the device trees for T4240:
* Proper PAMU topology information
* DPAA related nodes (Qman, Bman, Fman, Rman, DCE)
* Prefetch Manager
* Thermal monitor unit
On Mar 5, 2013, at 5:15 PM, Kumar Gala wrote:
The e6500 core used on T4240 and B4860 SoCs from FSL implements MMUv2 of
the Power Book-E Architecture. However there are some minor differences
between it and other Book-E implementations.
Add support to parse SPRN_TLB1PS for the variable
On Mar 5, 2013, at 5:15 PM, Kumar Gala wrote:
From: Roy ZANG tie-fei.z...@freescale.com
The T4240 utilizes a new PCIe controller block that has some minor
programming model differences from previous versions.
The major one that impacts initialization is how we determine the link
state
On Mar 5, 2013, at 5:15 PM, Kumar Gala wrote:
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Shaohui Xie
On Mar 5, 2013, at 5:16 PM, Kumar Gala wrote:
* Add support for up to 24 cores on T4240 (includes threads)
* Enable AltiVec support (on T4240)
* Add T4240QDS board into build
* Other changes are due to general kernel update of defconfig
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
On Mar 5, 2013, at 5:15 PM, Kumar Gala wrote:
Some minor changes to the common corenet_ds.c code are needed to support
the T4240QDS:
* Add support for fsl,qoriq-pcie-v3.0 controller
* Bump max # of IRQs to 512 (T4240 supports more interrupts than
previous SoCs).
Signed-off-by: Kumar
On Mar 11, 2013, at 9:47 AM, Rojhalat Ibrahim wrote:
Hi,
this issue was brought up before.
See this thread:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-July/099529.html
The following patch works for me.
Hot-added devices appear after echo 1 /sys/bus/pci/rescan.
I tested it
On Mar 4, 2013, at 2:40 AM, Jia Hongtao wrote:
mpc85xx_pci_err_probe(struct platform_device *op) need platform_device
declaration for definition. Otherwise, it will cause compile error if any
files including fsl_pci.h without declaration of platform_device.
Signed-off-by: Jia Hongtao
On Feb 26, 2013, at 3:33 AM, Tiejun Chen wrote:
Currently we already support p5040ds which has 4 e5500 cores, but
twelve dual-threaded e6500 cores are also built on T4240, we can
change CONFIG_NR_CPUS with this value now.
Signed-off-by: Tiejun Chen tiejun.c...@windriver.com
---
On Mar 6, 2013, at 3:16 AM, yuantian.t...@freescale.com
yuantian.t...@freescale.com wrote:
From: Tang Yuantian yuantian.t...@freescale.com
config FSL_SOC and CPM do not really depend on PPC_CLOCK. So remove it.
PPC_CLOCK also keeps powerpc archtecture from supporting COMMON_CLK.
On Mar 5, 2013, at 6:15 PM, Scott Wood wrote:
On 03/05/2013 05:15:57 PM, Kumar Gala wrote:
Enable a baseline T4240 SoC to boot. There are several things missing
from the device trees for T4240:
* Thread support on e6500
Why did threads get removed from the device tree? It's supposed
On Mar 7, 2013, at 11:47 AM, Scott Wood wrote:
On 03/07/2013 11:09:50 AM, Kumar Gala wrote:
On Mar 5, 2013, at 6:15 PM, Scott Wood wrote:
On 03/05/2013 05:15:57 PM, Kumar Gala wrote:
Enable a baseline T4240 SoC to boot. There are several things missing
from the device trees for T4240
-by: Kumar Gala ga...@kernel.crashing.org
---
* Added thread ids to cpu nodes
* removed clock-frequency from PCI nodes as we dont use it
arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi | 41
arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi | 41
arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi
be expanded for more page sizes supported on
e6500 as well as other MMU features.
This patch is based on code from Scott Wood.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/mm/tlb_nohash.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git
register
instead of a PCI config register that reports the link state.
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/sysdev/fsl_pci.c | 29 ++---
arch
The e6500 core adds support for AltiVec on a Book-E class processor.
Connect up all the various exception handling code and build config
mechanisms to allow user spaces apps to utilize AltiVec.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/include/asm/cputable.h
From: Vakul Garg va...@freescale.com
Add device tree for SEC (crypto engine) version 5.0 used on T4240.
Signed-off-by: Vakul Garg va...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/qoriq-sec5.0
...@freescale.com
Signed-off-by: Laurentiu Tudor laurentiu.tu...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi | 41
arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi | 41
arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi | 41
Kushwaha prabha...@freescale.com
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/t4240qds.dts | 220
1 file changed, 220 insertions(+)
create mode 100644 arch/powerpc/boot/dts
Some minor changes to the common corenet_ds.c code are needed to support
the T4240QDS:
* Add support for fsl,qoriq-pcie-v3.0 controller
* Bump max # of IRQs to 512 (T4240 supports more interrupts than
previous SoCs).
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc
* Add support for up to 24 cores on T4240 (includes threads)
* Enable AltiVec support (on T4240)
* Add T4240QDS board into build
* Other changes are due to general kernel update of defconfig
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/configs/corenet64_smp_defconfig
On Feb 27, 2013, at 4:56 AM, Sethi Varun-B16395 wrote:
This patch is present in the next branch of linux ppc tree maintained by
Kumar Gala.
Following is the commit id:
52c5affc545053d37c0b05224bbf70f5336caa20
I am not sure if this would be part of 3.9-rc1.
Regards
varun
This is now
On Feb 27, 2013, at 5:33 AM, Joerg Roedel wrote:
On Mon, Feb 18, 2013 at 06:22:16PM +0530, Varun Sethi wrote:
Macros for checking FSL PCI controller version.
Signed-off-by: Varun Sethi varun.se...@freescale.com
---
arch/powerpc/include/asm/pci-bridge.h |4
1 files changed, 4
On Feb 27, 2013, at 6:04 AM, Sethi Varun-B16395 wrote:
Hi Kumar,Ben,
I am implementing the Freescale PAMU (IOMMU) driver using the Linux IOMMU
API. In this particular patch, I have added a new field to dev_archdata
structure to store the dma domain information.
This field is updated
Mostly misc code cleanups in various board ports and adding support for a
new MPC85xx board - ppa8548.
- k
The following changes since commit 2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8:
Ian Munsie (1):
powerpc: Add support for context switching the TAR register
are available in the git
On Jan 30, 2013, at 9:10 PM, Wang Dongsheng wrote:
Add irq_set_wake support. Just add IRQF_NO_SUSPEND to desc-action-flag.
So the wake up interrupt will not be disable in suspend_device_irqs.
Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com
---
arch/powerpc/sysdev/mpic.c | 15
On Jan 21, 2013, at 7:02 AM, Julia Lawall wrote:
From: Julia Lawall julia.law...@lip6.fr
Delete successive tests to the same location. The code tested the result
of a previous call, that itself was already tested. It is changed to test
the result of the most recent call.
A simplified
On Feb 13, 2013, at 8:09 AM, Stef van Os wrote:
Initial board support for the Prodrive PPA8548 AMC module. Board
is an MPC8548 AMC platform used in RapidIO systems. This module is
also used to test/work on mainline linux RapidIO software.
PPA8548 overview:
- 1.3 GHz Freescale PowerQUICC
On Jan 14, 2013, at 5:28 AM, Varun Sethi wrote:
The pci controller structure has a provision to store the device strcuture
pointer of the corresponding platform device. Currently this information is
not stored during fsl pci controller initialization. This information is
required while
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:
This will be used by the qemu-e500 platform, as the MPIC version (and
thus whether we have coreint) depends on how QEMU is configured.
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/powerpc/sysdev/mpic.c | 26
On Jan 21, 2013, at 7:56 PM, Scott Wood wrote:
The MPIC code will disable coreint if it detects an insufficient
MPIC version.
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/powerpc/platforms/85xx/qemu_e500.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
On Feb 12, 2013, at 10:31 PM, Michael Neuling wrote:
Add transactional memory paca scratch register to show_regs. This is useful
for debugging.
Signed-off-by: Matt Evans m...@ozlabs.org
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/include/asm/paca.h |1 +
On Feb 12, 2013, at 10:31 PM, Michael Neuling wrote:
This adds functions to restore the state of the FP/VSX registers from
what's stored in the thread_struct. Two version for FP/VSX are required
since one restores them from transactional/checkpoint side of the
thread_struct and the other
On Feb 12, 2013, at 10:31 PM, Michael Neuling wrote:
Kconfig option for transactional memory on powerpc.
Signed-off-by: Matt Evans m...@ozlabs.org
Signed-off-by: Michael Neuling mi...@neuling.org
---
arch/powerpc/Kconfig |8
1 file changed, 8 insertions(+)
diff --git
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