RE: [PATCH 2/9] powerpc/mpc85xxcds: Fix PCI I/O space resource of PCI bridge

2012-03-07 Thread Zhao Chenhui-B35336
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 40f03da..c009c5b 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c @@ -3,7 +3,7 @@ * * Maintained by Kumar Gala (see

Re: [PATCH 2/9] powerpc/mpc85xxcds: Fix PCI I/O space resource of PCI bridge

2012-03-07 Thread Kumar Gala
On Mar 7, 2012, at 3:31 AM, Zhao Chenhui-B35336 wrote: diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 40f03da..c009c5b 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c @@ -3,7

[PATCH 2/9] powerpc/mpc85xxcds: Fix PCI I/O space resource of PCI bridge

2012-03-06 Thread Zhao Chenhui
From: chenhui zhao chenhui.z...@freescale.com There is a PCI bridge(Tsi310) between the MPC8548 and a VIA southbridge chip. The bootloader sets the PCI bridge to open a window from 0x to 0x1fff on the PCI I/O space. But the kernel can't set the I/O resource. In the routine

Re: [PATCH 2/9] powerpc/mpc85xxcds: Fix PCI I/O space resource of PCI bridge

2012-03-06 Thread Kumar Gala
On Mar 6, 2012, at 3:06 AM, Zhao Chenhui wrote: From: chenhui zhao chenhui.z...@freescale.com There is a PCI bridge(Tsi310) between the MPC8548 and a VIA southbridge chip. The bootloader sets the PCI bridge to open a window from 0x to 0x1fff on the PCI I/O space. But the kernel