RE: [PATCH 3/3] perf: Use 64-bit value when comparing sample_regs

2014-03-06 Thread David Laight
From: Sukadev Bhattiprolu When checking whether a bit representing a register is set in sample_regs, a 64-bit mask, use 64-bit value (1LL). Signed-off-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com --- tools/perf/util/unwind.c |4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH 1/2] Revert KVM: PPC: Book3S HV: Add new state for transactional memory

2014-03-06 Thread Aneesh Kumar K.V
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause the below crash in the host. Unable to handle kernel paging request for data at address 0xf0001223f278 Faulting instruction address: 0xc0202a00 cpu 0x30:

[PATCH 2/2] KVM: PPC: Book3S HV: Fix register usage when loading/saving VRSAVE

2014-03-06 Thread Aneesh Kumar K.V
From: Paul Mackerras pau...@samba.org Commit 595e4f7e697e (KVM: PPC: Book3S HV: Use load/store_fp_state functions in HV guest entry/exit) changed the register usage in kvmppc_save_fp() and kvmppc_load_fp() but omitted changing the instructions that load and save VRSAVE. The result is that the

Re: [PATCH 2/3] dts: mpc512x: adjust clock specs for FEC nodes

2014-03-06 Thread Sascha Hauer
On Wed, Mar 05, 2014 at 11:52:09AM +0100, Gerhard Sittig wrote: On Wed, Mar 05, 2014 at 09:48 +0800, Shawn Guo wrote: On Mon, Mar 03, 2014 at 10:22:31AM +0100, Gerhard Sittig wrote: On Mon, Feb 24, 2014 at 11:25 +0100, Gerhard Sittig wrote: a recent FEC binding document update

Re: [PATCH 1/2] Revert KVM: PPC: Book3S HV: Add new state for transactional memory

2014-03-06 Thread Paul Mackerras
On Thu, Mar 06, 2014 at 04:06:09PM +0530, Aneesh Kumar K.V wrote: From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause the below crash in the host. Unable to handle kernel paging request for data at address

Re: [PATCH 3/3] perf: Use 64-bit value when comparing sample_regs

2014-03-06 Thread Gabriel Paubert
On Thu, Mar 06, 2014 at 09:44:47AM +, David Laight wrote: From: Sukadev Bhattiprolu When checking whether a bit representing a register is set in sample_regs, a 64-bit mask, use 64-bit value (1LL). Signed-off-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com ---

Re: [PATCH 1/2] Revert KVM: PPC: Book3S HV: Add new state for transactional memory

2014-03-06 Thread Aneesh Kumar K.V
Paul Mackerras pau...@samba.org writes: On Thu, Mar 06, 2014 at 04:06:09PM +0530, Aneesh Kumar K.V wrote: From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause the below crash in the host. Unable to handle kernel

Re: [PATCH RFC v8 5/5] dma: mpc512x: register for device tree channel lookup

2014-03-06 Thread Alexander Popov
Hello Andy. 2014-02-24 17:08 GMT+04:00 Andy Shevchenko andriy.shevche...@linux.intel.com: On Mon, 2014-02-24 at 15:09 +0400, Alexander Popov wrote: @@ -1018,11 +1019,23 @@ static int mpc_dma_probe(struct platform_device *op) /* Register DMA engine */ dev_set_drvdata(dev, mdma);

[PATCH] kexec/powerpc: fix exporting memory limit

2014-03-06 Thread Nikita Yushchenko
When preparing dump-capturing kernel, kexec userspace tool needs to know actual amount of memory used by the running kernel. This may differ from extire available DRAM for a couple of reasons. To address this issue, kdump kernel support code injects several attributes into device tree that are

Re: [PATCH 0/3] powerpc/perf: Enable linking with libunwind

2014-03-06 Thread Jiri Olsa
On Wed, Mar 05, 2014 at 08:41:56PM -0800, Sukadev Bhattiprolu wrote: When we try to create backtraces (call-graphs) with the perf tool perf record -g /tmp/sprintft we get backtraces with duplicate arcs for sprintft[1]: 14.61% sprintft libc-2.18.so [.] __random

Re: [PATCH 3/3] perf: Use 64-bit value when comparing sample_regs

2014-03-06 Thread Jiri Olsa
On Thu, Mar 06, 2014 at 12:33:32PM +0100, Gabriel Paubert wrote: On Thu, Mar 06, 2014 at 09:44:47AM +, David Laight wrote: From: Sukadev Bhattiprolu When checking whether a bit representing a register is set in sample_regs, a 64-bit mask, use 64-bit value (1LL). Signed-off-by:

Re: ibmveth: Fix endian issues with MAC addresses

2014-03-06 Thread David Miller
From: Anton Blanchard an...@samba.org Date: Wed, 5 Mar 2014 14:51:37 +1100 The code to load a MAC address into a u64 for passing to the hypervisor via a register is broken on little endian. Create a helper function called ibmveth_encode_mac_addr which does the right thing in both big and

Re: [PATCH] kexec/powerpc: fix exporting memory limit

2014-03-06 Thread Michael Ellerman
On Thu, 2014-03-06 at 18:24 +0400, Nikita Yushchenko wrote: When preparing dump-capturing kernel, kexec userspace tool needs to know actual amount of memory used by the running kernel. This may differ from extire available DRAM for a couple of reasons. To address this issue, kdump kernel

Re: [PATCH v2 14/52] powerpc, sysfs: Fix CPU hotplug callback registration

2014-03-06 Thread Benjamin Herrenschmidt
On Fri, 2014-02-14 at 13:22 +0530, Srivatsa S. Bhat wrote: Subsystems that want to register CPU hotplug callbacks, as well as perform initialization for the CPUs that are already online, often do it as shown below: get_online_cpus(); for_each_online_cpu(cpu)

Re: [PATCH RFC/RFT v3 6/9] powerpc: move cacheinfo sysfs to generic cacheinfo infrastructure

2014-03-06 Thread Anshuman Khandual
On 02/19/2014 09:36 PM, Sudeep Holla wrote: From: Sudeep Holla sudeep.ho...@arm.com This patch removes the redundant sysfs cacheinfo code by making use of the newly introduced generic cacheinfo infrastructure. Signed-off-by: Sudeep Holla sudeep.ho...@arm.com Cc: Benjamin Herrenschmidt

[PATCH 4/9] powerpc/85xx: support CPU hotplug for e500mc and e5500

2014-03-06 Thread Chenhui Zhao
Implemented CPU hotplug on e500mc and e5500. On e5500 both 32-bit and 64-bit modes can work. Used some callback functions implemented in RCPM driver. Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com --- arch/powerpc/Kconfig |2 +- arch/powerpc/kernel/smp.c |6

[PATCH 5/9] powerpc/85xx: disable irq by hardware when suspend for 64-bit

2014-03-06 Thread Chenhui Zhao
In 64-bit mode, kernel just clears the irq soft-enable flag in struct paca_struct to disable external irqs. But, in the case of suspend, irqs should be disabled by hardware. Therefore, hook a function to ppc_md.suspend_disable_irqs to really disable irqs. Signed-off-by: Chenhui Zhao

[PATCH 3/9] powerpc/rcpm: add RCPM driver

2014-03-06 Thread Chenhui Zhao
There is a RCPM (Run Control/Power Management) in Freescale QorIQ series processors. The device performs tasks associated with device run control and power management. The driver implements some features: mask/unmask irq, enter/exit low power states, freeze time base, etc. There are two versions

[PATCH 6/9] powerpc/85xx: support sleep feature on QorIQ SoCs with RCPM

2014-03-06 Thread Chenhui Zhao
In sleep mode, the clocks of e500 cores and unused IP blocks is turned off. The IP blocks which are allowed to wake up the processor are still running. The sleep mode is equal to the Standby state in Linux. Use the command to enter sleep mode: echo standby /sys/power/state Signed-off-by:

[PATCH 7/9] fsl: add EPU FSM configuration for deep sleep

2014-03-06 Thread Chenhui Zhao
From: Hongbo Zhang hongbo.zh...@freescale.com In the last stage of deep sleep, software will trigger a Finite State Machine (FSM) to control the hardware precedure, such as board isolation, killing PLLs, removing power, and so on. When the system is waked up by an interrupt, the FSM controls the

[PATCH 8/9] powerpc/85xx: add save/restore functions for core registers

2014-03-06 Thread Chenhui Zhao
From: Wang Dongsheng dongsheng.w...@freescale.com Add booke_cpu_state_save() and booke_cpu_state_restore() functions which can be used to save/restore CPU's registers in the case of deep sleep and hibernation. Supported processors: E6500, E5500, E500MC, E500v2 and E500v1. Signed-off-by: Wang

[PATCH 9/9] powerpc/pm: support deep sleep feature on T1040

2014-03-06 Thread Chenhui Zhao
From: Zhao Chenhui chenhui.z...@freescale.com T1040 supports deep sleep feature, which can switch off most parts of the SoC when it is in deep sleep mode. This way, it becomes more energy-efficient. The DDR controller will also be powered off in deep sleep. Therefore, the last stage (the latter

Re: [PATCH] kexec/powerpc: fix exporting memory limit

2014-03-06 Thread Nikita Yushchenko
On Thu, 2014-03-06 at 18:24 +0400, Nikita Yushchenko wrote: When preparing dump-capturing kernel, kexec userspace tool needs to know actual amount of memory used by the running kernel. This may differ from extire available DRAM for a couple of reasons. To address this issue, kdump kernel

[PATCH 2/9] powerpc/cache: add cache flush operation for various e500

2014-03-06 Thread Chenhui Zhao
Various e500 core have different cache architecture, so they need different cache flush operations. Therefore, add a callback function cpu_flush_caches to the struct cpu_spec. The cache flush operation for the specific kind of e500 is selected at init time. The callback function will flush all

[PATCH 1/9] powerpc/fsl: add PVR definition for E500MC and E5500

2014-03-06 Thread Chenhui Zhao
From: Wang Dongsheng dongsheng.w...@freescale.com Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com --- arch/powerpc/include/asm/reg.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index

[PATCH] powerpc/powernv: Infrastructure to support OPAL async completion

2014-03-06 Thread Neelesh Gupta
This patch adds support for notifying the clients of their request completion. Clients request for the token before making OPAL call and then wait for the response. This patch uses messaging infrastructure to pull the data to linux by registering itself for the message type OPAL_MSG_ASYNC_COMP.

[PATCH] powerpc/powernv: Enable reading and updating of system parameters

2014-03-06 Thread Neelesh Gupta
This patch enables reading and updating of system parameters through OPAL call. Signed-off-by: Neelesh Gupta neele...@linux.vnet.ibm.com Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org --- arch/powerpc/include/asm/opal.h| 14 +

[PATCH 0/2] Enable powernv based platform sensors

2014-03-06 Thread Neelesh Gupta
This patchset contains the enablement code to expose platform sensor data on powernv platform. First patch fetches the sensor data from the firmware and second patch being an hwmon driver, enables the sysfs interfaces. --- Neelesh Gupta (1): powerpc/powernv: Enable fetching of platform

[PATCH 1/2] powerpc/powernv: Enable fetching of platform sensor data

2014-03-06 Thread Neelesh Gupta
This patch enables fetching of various platform sensor data through OPAL and expects a sensor handle from the driver to pass to OPAL. Signed-off-by: Neelesh Gupta neele...@linux.vnet.ibm.com Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org --- arch/powerpc/include/asm/opal.h

[PATCH 2/2] powerpc/powernv: hwmon driver for power values, fan rpm and temperature

2014-03-06 Thread Neelesh Gupta
From: Shivaprasad G Bhat sb...@linux.vnet.ibm.com This patch adds basic kernel enablement for reading power values, fan speed rpm and temperature values on powernv platforms which will be exported to user space through sysfs interface. Signed-off-by: Shivaprasad G Bhat sb...@linux.vnet.ibm.com

Re: [PATCH RFC/RFT v3 6/9] powerpc: move cacheinfo sysfs to generic cacheinfo infrastructure

2014-03-06 Thread Anshuman Khandual
On 03/07/2014 09:36 AM, Anshuman Khandual wrote: On 02/19/2014 09:36 PM, Sudeep Holla wrote: From: Sudeep Holla sudeep.ho...@arm.com This patch removes the redundant sysfs cacheinfo code by making use of the newly introduced generic cacheinfo infrastructure. Signed-off-by: Sudeep Holla

Re: [PATCH v2 14/52] powerpc, sysfs: Fix CPU hotplug callback registration

2014-03-06 Thread Gautham R Shenoy
Hello Ben, On Fri, Mar 07, 2014 at 01:57:31PM +1100, Benjamin Herrenschmidt wrote: On Fri, 2014-02-14 at 13:22 +0530, Srivatsa S. Bhat wrote: Subsystems that want to register CPU hotplug callbacks, as well as perform initialization for the CPUs that are already online, often do it as shown