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In message 585D9BAABBE7D211A2B0F8050AAF759A09 at thebrain.drs.ca
Utku Karaaslan wrote:
I have ported the ppcboot to our custom board and everything runs correctly
except
Congratulations.
the linux kernel :).
Hi,
Does somebody know the ATLAS ACE860 DARWIN board?
It's monitor can auto test the 4M/8M DRAM successfully.
But when I insert a 32M DRAM, the monitor only pass 16M, then test failed.
I use BDM test it, only can access 16M too.
Is this the bug of this board?
Best regards,
Wang Chao Feng
**
Hi folks,
I've been working on a 'Simon Vogl' type I2C driver for MPC8xx (i.e. the
new I2C interface in the 2.4.0 kernels) based on the work by Dan Malek,
Kim Jorgensen and Dan Winkler.
My driver only works in master mode. So far I have only been testing it
with simple write and read transfers
Hello,
I was wondering if anbody has a working SPI driver yet. I noticed one
that
wasn't working yet was included in HHL 1.2 . Has anyone made any progress
on it since then? I also noticed it relied on CPM_IIC micro code patch
, does it have any known side effects?
Many thanks
I was wondering if anbody has a working SPI driver yet.
I have no ready-to-use driver but a few functions (init, transfer,
disable) that I use successfully with my MBX.
I also noticed it relied on CPM_IIC micro code patch,
My code works with or witout the patch; MBX uses SCC1 for Ethernet.
I am using custom board with 855Ts version D3. The 50Mhz version runs fine
but the 66 Mhz version hangs or start to hang in the delay loop after a
while. This happens immediately, if the CPU is warm. Obviously the timer is
not decrementing.
The TBSCR[TBE] bit is being set (yes the key register is
Hello Again,
I should have been a little more informative in my previous post. I am
using a custom board with a MPC850ZTxxBT. Right now I am running ppcboot
and kernel 2.2.13 . My board does use SCC2 as its Ethernet connection. So I
do assume I need the IIC/SPI microcode patch.
I was wondering if anbody has a working SPI driver yet that gets along
with SCC2 Ethernet?
Adding some lines you should be able to use my code.
Is there any known side effects IIC/SPI microcode patch?
The I2C/SPI host commands (Init Rx/Tx params, close RxBD) are not
supported when using the
I have a working SPI and I2C driver with and without the microcode patch
(I'm currently using it in slave mode but it can be easily modified to work
in master mode). I'll e-mail them after I clean them up a bit.
-Dan Winkler
-Original Message-
From: clark at esteem.com [mailto:[EMAIL
Hi,
I have two mvme2604 boards that are up and running with root mounted NFS
using Gabriel's patches against 2.2.12 kernel. The boot messages for the
boards always report VFS: Mounted root (NFS filesystem) read-only. Not
knowing NFS that well, is there a way I can change it so the boards mount
Root is initially mounted RO on power up. Are you remounting it RW?
# mount -n -o remount,rw /
From /etc/rc.d/rc.sysinit:
action Remounting root filesystem in read-write mode mount -n -o
remount,rw /
gvb
At 04:29 PM 11/8/00 -0600, jlhagen at collins.rockwell.com wrote:
Hi,
I have two
The boot messages for the boards always report VFS: Mounted root
(NFS filesystem) read-only. Not knowing NFS that well, is there a
way I can change it so the boards mount the file system as
read/write?
You want to add rw to the boot arguments to mount the file system
read/write. Here is
Hello,
We have our own proprietary asyncronous serial driver. Does anyone know the
easiest way to attach this to ppp? ppp over an async port.
Thanks in advance.
--Julia
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