On Mon, 2005-03-28 at 10:44 -0600, Kumar Gala wrote:
Guys,
While this is not overly important to me, I was wondering if we had any
rules related to formatting of assembly files. We seem to have code
formatted with and without spaces in the args.
I'm assuming something like this (w/o
Kumar Gala writes:
I'm assuming something like this (w/o spaces):
TABinsnTABargD,arg1,arg2
is what we want? Just trying to get a rule documented going forward.
Yep, that's the style we use.
Paul.
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Hi all,
I just joint to embedded software world and I am facing with a problem
related to ppc_405-gcc compiler. My problem is my source code if compiled by
gcc compiler and run on Linux platform, everything is OK, but if my source
code is compiled with ppc_405-gcc and transfering to Power PC
Hi,
From linux/arch/ppc/platforms/pq2ads.h
#define BCSR_ADDR ((uint) 0xf450)
From u-boot/include/configs/MPC8260ADS.h
#define CFG_BCSR 0xF450
So ...
Which version of u-boot and/or linux tree are you using?
With linuxppc-2.5 and u-boot 1.2 everything works fine for me.
Maybe Mike's
Hi Walt!
Using Vitaly's 2.4-based patch below as a starting point, I've been
adding PCI support to 2.6.11.4 for the MPC8272ADS board.
The good news is that I think I have PCI interrupts pretty well sorted
out, and I see *something* half-way reasonable from lspci.
The bad news is that
On Tue, Mar 29, 2005 at 08:21:50AM +1000, Benjamin Herrenschmidt wrote:
On Mon, 2005-03-28 at 10:44 -0600, Kumar Gala wrote:
Guys,
While this is not overly important to me, I was wondering if we had any
rules related to formatting of assembly files. We seem to have code
formatted
Bruce Donadt wrote:
To answer the original question. The code is provided under a GPL license to
companies that purchase a subscription to the Arabella Linux distribution.
We have invested many man months in developing a commercial grade security
solution for the PowerQUICCs and all of it has
In message 42492C93.2060906 at eircom.net you wrote:
If it is the case that you have provided a GPL-Arabella-Linux-Kernel, to
a customer and all the code is GPL compliant, then that customer, is
*free* to fork and/or redistribute that code, which seems like a bit of
an oxymoron, for a
Wolfgang Denk wrote:
In message 42492C93.2060906 at eircom.net you wrote:
If it is the case that you have provided a GPL-Arabella-Linux-Kernel, to
a customer and all the code is GPL compliant, then that customer, is
*free* to fork and/or redistribute that code, which seems like a bit of
an
Hi everbody:
I am a new guy, I want get a ready embedded linux for Motorala
ppc8245, give me a hand.
Thank you very much!
anchor xie
03-29-2005
Anchor wrote:
Hi everbody:
I am a new guy, I want get a ready embedded linux for Motorala
ppc8245, give me a hand.
Thank you very much!
anchor xie
CLAP CLap Clap clap
Wolfgang Denk has a very good turn-key system Embedded Linux
Development Kit (ELDK). Download it and install it
Thanks for the data points, Alex.
I'm using U-Boot 1.1.1 and vanilla kernel.org 2.6.11.4 (actually now
2.6.11.5). My BCSR_ADDR looks the same as what you've listed below, so
I'd guess the difference is with U-Boot... (Another engineer here
installed U-Boot on my board, from, I believe, a
Thanks to all who offered suggestions regarding PCI on the MPC8272ADS.
I too suspected that the PCI bus frequency may have been the problem,
and even spent some time looking at the clock configuration in the
Freescale documentation before I posted my message. The documentation
seemed very
Andrew,
Removed the FCC3 device from the lists of devices on MPC8555 MPC8555E
since it does not exist on these processors.
Signed-off-by: Jason McMullan jason.mcmullan at timesys.com
Signed-off-by: Kumar Gala kumar.gala at freescale.com
---
diff -Nru a/arch/ppc/syslib/mpc85xx_sys.c
Walter L. Wimer III wrote:
Thanks to all who offered suggestions regarding PCI on the MPC8272ADS.
I too suspected that the PCI bus frequency may have been the problem,
and even spent some time looking at the clock configuration in the
Freescale documentation before I posted my message. The
Andrew,
Cleaned up the CPM2 interrupt controller code:
* Added the ability to offset the IRQs
* Refactored common PIC init code out of platform files
* Fixed IRQ offsets on MPC85xx so it can handle properly handled multiple
interrupt controllers (i8259, CPM2 PIC, and OpenPIC)
Signed-off-by:
Hi there,
I hope this is the place to go...
I have a some problems figuring out the OOM-killer and configuring the
overcommit_memory parameter. Hope someone here can guide me in the right
directions...
Specs:
I'm having an embedded Linux system running on a PPC405EP (PPChameleon)
with 64 megs
On Tue, Mar 29, 2005 at 10:42:29AM -0600, Kumar Gala wrote:
Andrew,
Cleaned up the CPM2 interrupt controller code:
* Added the ability to offset the IRQs
* Refactored common PIC init code out of platform files
* Fixed IRQ offsets on MPC85xx so it can handle properly handled multiple
Andrew,
Cleaned up irq_to_siubit array so we no longer need to do 1 (31-bit),
just 1 bit.
Signed-off-by: Kumar Gala kumar.gala at freescale.com
---
diff -Nru a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c
--- a/arch/ppc/syslib/cpm2_pic.c2005-03-29 16:25:34 -06:00
+++
Andrew,
(Updated this patch to include a comment at Dan Malek's request.)
Cleaned up irq_to_siubit array so we no longer need to do 1 (31-bit),
just 1 bit.
Signed-off-by: Kumar Gala kumar.gala at freescale.com
---
diff -Nru a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c
---
Done, updated patch w/comment sent to Andrew.
- kumar
On Mar 29, 2005, at 7:10 PM, Dan Malek wrote:
On Mar 29, 2005, at 5:30 PM, Kumar Gala wrote:
Cleaned up irq_to_siubit array so we no longer need to do 1
(31-bit),
just 1 bit.
Will you please put a comment in here that
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