Currently, has_surface_tile_offset is equivalent to gen == 4 !is_g4x.
We already use it for related checks in brw_wm_surface_state.c, so it
makes sense to use it here too. It's simpler and more future-proof.
Broadwell also lacks surface tile offsets. With this patch, I won't
need to update
On 11/06/2013 12:02 AM, Paul Berry wrote:
On 1 November 2013 02:16, Tapani Pälli tapani.pa...@intel.com
mailto:tapani.pa...@intel.com wrote:
+static void
+calc_item(const void *key, void *data, void *closure)
How about increment_count for the name of this function?
ok
+{
Done, I also improved commit message of patches 3 and 4. Updated patches
follow.
I think we could simplify this a bit.
2013/11/5 Fabio Pedretti fabio@libero.it:
From: Aurelien Jarno aure...@debian.org
From: Cyril Brulebois k...@debian.org
mesa fails to build on GNU/kFreeBSD, since some
Based on existing patch from Debian package.
Debian bug: http://bugs.debian.org/524690
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 0a25047..989168a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -974,7 +974,7 @@ if test
Patch from Debian package
---
src/gallium/auxiliary/rtasm/rtasm_execmem.c | 2 +-
src/gallium/include/pipe/p_config.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/rtasm/rtasm_execmem.c
b/src/gallium/auxiliary/rtasm/rtasm_execmem.c
index
https://bugs.freedesktop.org/show_bug.cgi?id=69101
Mike Lothian m...@fireburn.co.uk changed:
What|Removed |Added
CC||m...@fireburn.co.uk
We need to take/release the driver lock around this as well.
I've fixed this and pushed the result upstream. Any idea when your
deinterlacer is ready to hit the list as a patch?
Thanks for the help,
Christian.
Am 06.11.2013 00:35, schrieb Grigori Goronzy:
Otherwise OutputSurface interop has
From: Christian König christian.koe...@amd.com
This makes VDPAU thread save again.
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/auxiliary/vl/vl_mpeg12_decoder.c | 180 ++-
src/gallium/auxiliary/vl/vl_mpeg12_decoder.h | 1 +
2 files changed,
On 06.11.2013 15:08, Christian König wrote:
We need to take/release the driver lock around this as well.
I've fixed this and pushed the result upstream. Any idea when your
deinterlacer is ready to hit the list as a patch?
Thanks for fixing this up.
The simple temporal deinterlacer should be
From: Roland Scheidegger srol...@vmware.com
We weren't adding the soa offsets when constructing the indices
for the gather functions. That meant that we were always returning
the data in the first element.
(Copied straight from the same fix for temps.)
While here fix up a couple of broken
Ups, indeed. That line is still in my code directory not amended to the
patch.
Thanks for the info, will send out a v2 soon. Anything else I should
take care of?
Christian.
Am 06.11.2013 16:38, schrieb Aaron Watry:
I haven't looked in-depth at the rest of the patch, but I don't see
Looks good. Though I thought we had fixed this once before.
Could you double check there are no similar issues with the remaining register
files (output, etc)?
Jose
- Original Message -
From: Roland Scheidegger srol...@vmware.com
We weren't adding the soa offsets when constructing
On Wed, Nov 6, 2013 at 8:13 AM, Christian König deathsim...@vodafone.de wrote:
From: Christian König christian.koe...@amd.com
This makes VDPAU thread save again.
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/auxiliary/vl/vl_mpeg12_decoder.c | 180
Hello all,
I'm attempting to port our GLX based code to EGL/X11, as a first step towards
being ready for Wayland, and I've hit a snag. We use an X11 compositor to get
translucent windows blending one atop the other, and I carefully select a 32
bit RGBA visual (ID 0x64 on my system) instead of
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
src/gallium/state_trackers/egl/drm/modeset.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/egl/drm/modeset.c
b/src/gallium/state_trackers/egl/drm/modeset.c
index dc71a761053b..11b6db1949c6
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
src/gallium/targets/pipe-loader/Makefile.am | 16
src/gallium/targets/pipe-loader/pipe_freedreno.c | 21 +
2 files changed, 37 insertions(+)
create mode 100644
Allows to load gallium pipes for ARM DRM drivers.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
include/platform_ids/platform_driver_map.h | 18
src/gallium/auxiliary/pipe-loader/pipe_loader.h| 1 +
.../auxiliary/pipe-loader/pipe_loader_drm.c| 53
---
src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c
b/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c
index 339d7bf..927fb24 100644
---
---
src/gallium/drivers/radeonsi/radeonsi_compute.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_compute.c
b/src/gallium/drivers/radeonsi/radeonsi_compute.c
index 265dbd7..28a3f17 100644
---
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
include/platform_ids/platform_driver_map.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/platform_ids/platform_driver_map.h
b/include/platform_ids/platform_driver_map.h
index c428b81349e6..68595ef0a2f7 100644
---
From: Thierry Reding thierry.reding at avionic-design.de
When probing non-PCI DRM devices, such as those found in a lot of SoCs,
GBM errors out because it expects the device to have an associated PCI
ID which can be used to lookup the driver name in a table.
This patch removes this restriction
On 11/05/2013 09:42 AM, Ian Romanick wrote:
On 11/05/2013 09:32 AM, burlen wrote:
Upgrading from 9.2.0 to 9.2.2 with OSMesa classic I'm seeing 80 new
regressions in VTK.
http://open.cdash.org/viewTest.php?onlyfailedbuildid=3087854
click Failed to see an image diff. Maybe related to line
Dear Tom,
Tom Stellard schrieb am 06.11.2013 01:24:
On Wed, Oct 23, 2013 at 04:26:18PM -0400, Tom Stellard wrote:
The attached patches introduce linker scripts to the pipe-loader and
egl-static targets. The linker scripts prevents these targets from
exporting LLVM (and other) symbols that
Sorry for the late reply.
On Fri, Nov 1, 2013 at 4:14 PM, Tapani tapani.pa...@intel.com wrote:
On 11/01/2013 03:31 PM, Erik Faye-Lund wrote:
Won't using the git-sha1 as a compatibility-criteria cause issues for
developers with local changes? I'm not so worried about this for
On Tue, Oct 29, 2013 at 4:37 PM, Francisco Jerez curroje...@riseup.net wrote:
v2: Mark atomic counters as read-only variables. Move offset overlap
code to the linker. Use the contains_atomic() convenience method.
v3: Use pointer to integer instead of non-const reference. Add
comment
On Wed, Nov 06, 2013 at 10:36:51AM -0600, Aaron Watry wrote:
---
src/gallium/drivers/radeon/radeon_llvm_emit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.c
b/src/gallium/drivers/radeon/radeon_llvm_emit.c
index 8bf278b..20b3206 100644
These look good, but the indentation seems wrong in patches 2 through 6.
-Tom
On Wed, Nov 06, 2013 at 10:36:49AM -0600, Aaron Watry wrote:
I decided to have some fun and hooked valgrind up to my 7850 while running
a few OpenCL tests in piglit. This is the first batch of fixes.
Aaron Watry
On 6 November 2013 09:35, Erik Faye-Lund kusmab...@gmail.com wrote:
Sorry for the late reply.
On Fri, Nov 1, 2013 at 4:14 PM, Tapani tapani.pa...@intel.com wrote:
On 11/01/2013 03:31 PM, Erik Faye-Lund wrote:
Won't using the git-sha1 as a compatibility-criteria cause issues for
On Wed, Nov 6, 2013 at 12:15 PM, Tom Stellard t...@stellard.net wrote:
These look good, but the indentation seems wrong in patches 2 through 6.
An artifact of expanding tabs to 4 spaces in the IDE... Although I'd
argue that patch 6 is correct given that the portion of the file
affected already
On Wed, Nov 6, 2013 at 7:49 PM, Paul Berry stereotype...@gmail.com wrote:
On 6 November 2013 09:35, Erik Faye-Lund kusmab...@gmail.com wrote:
Sorry for the late reply.
On Fri, Nov 1, 2013 at 4:14 PM, Tapani tapani.pa...@intel.com wrote:
On 11/01/2013 03:31 PM, Erik Faye-Lund wrote:
On 6 November 2013 11:24, Erik Faye-Lund kusmab...@gmail.com wrote:
On Wed, Nov 6, 2013 at 7:49 PM, Paul Berry stereotype...@gmail.com
wrote:
On 6 November 2013 09:35, Erik Faye-Lund kusmab...@gmail.com wrote:
Sorry for the late reply.
On Fri, Nov 1, 2013 at 4:14 PM, Tapani
When I build osmesa with --with-osmesa-bits=32 I notice that I get 31
bits by way of the compile line define -DDEFAULT_SOFTWARE_DEPTH_BITS=31.
What's the story with the number 31? Is 31 bits really better than 32?
___
mesa-dev mailing list
From: Roland Scheidegger srol...@vmware.com
There's only one minor functional change, for immediates the pixel offsets
are no longer added since the values are all the same for all elements in
any case (it might be better if those weren't stored as soa vectors in the
first place maybe).
---
The only interesting targets in teximagemultisample are
GL_TEXTURE_2D_MULTISAMPLE and GL_TEXTURE_2D_MULTISAMPLE_ARRAY.
On Thu, Nov 7, 2013 at 8:55 AM, Courtney Goeltzenleuchter
court...@lunarg.com wrote:
TexStorage and TexStorageMultisample updates texture object
state needed by
On 6 November 2013 11:24, Erik Faye-Lund kusmab...@gmail.com wrote:
On Wed, Nov 6, 2013 at 7:49 PM, Paul Berry stereotype...@gmail.com
wrote:
On 6 November 2013 09:35, Erik Faye-Lund kusmab...@gmail.com wrote:
Sorry for the late reply.
On Fri, Nov 1, 2013 at 4:14 PM, Tapani
On Sat, Nov 2, 2013 at 9:00 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
... and symlink to each target.
Make automake's subdir-objects work for r600.
I think r600 and r300 were removed from the tree[1].
git am complains about missing dirs
error: src/gallium/targets/r600/xorg/Makefile.am:
Correct and I check_multisample_target checks for that.
And we never get to this code if using a PROXY target.
Or did I miss something?
On Wed, Nov 6, 2013 at 1:14 PM, Chris Forbes chr...@ijw.co.nz wrote:
The only interesting targets in teximagemultisample are
GL_TEXTURE_2D_MULTISAMPLE and
On 6 November 2013 00:59, Tapani Pälli tapani.pa...@intel.com wrote:
On 11/06/2013 12:02 AM, Paul Berry wrote:
On 1 November 2013 02:16, Tapani Pälli tapani.pa...@intel.com wrote:
+static void
+calc_item(const void *key, void *data, void *closure)
How about increment_count for the name
On 06/11/13 20:26, Adrian M Negreanu wrote:
On Sat, Nov 2, 2013 at 9:00 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
... and symlink to each target.
Make automake's subdir-objects work for r600.
I think r600 and r300 were removed from the tree[1].
git am complains about missing dirs
On 5 November 2013 23:45, Tapani Pälli tapani.pa...@intel.com wrote:
On 11/05/2013 07:36 PM, Paul Berry wrote:
On 1 November 2013 02:16, Tapani Pälli tapani.pa...@intel.com wrote:
+
+/**
+ * Function to create an unique string for a ir_variable. This is
+ * used by variable dereferences
On 11/06/2013 12:34 PM, burlen wrote:
When I build osmesa with --with-osmesa-bits=32 I notice that I get 31
bits by way of the compile line define -DDEFAULT_SOFTWARE_DEPTH_BITS=31.
What's the story with the number 31? Is 31 bits really better than 32?
IIRC, 32 bit Z never worked properly
Ah, I get it, the switch statement after. Yeah, that could make sense as a
helper wouldn't it. I'll look at that.
On Wed, Nov 6, 2013 at 1:42 PM, Chris Forbes chr...@ijw.co.nz wrote:
Your change to teximagemultisample just has a bunch of spurious stuff for
other targets. not harmful -- it
Thanks,
I've pushed all 4 patches.
2013/11/6 Fabio Pedretti fabio@libero.it:
Done, I also improved commit message of patches 3 and 4. Updated patches
follow.
I think we could simplify this a bit.
2013/11/5 Fabio Pedretti fabio@libero.it:
From: Aurelien Jarno aure...@debian.org
From:
Okay, making that change, the commit's flow better if patches 5,6,7 become
new 5,6,7,8.
What's the recommended process for superseding the previous patches for
these new ones?
Courtney
On Wed, Nov 6, 2013 at 2:04 PM, Courtney Goeltzenleuchter
court...@lunarg.com wrote:
Ah, I get it, the
The usual way is you send out a complete new series marked V2 after
incorporating all the review comments etc.
On Thu, Nov 7, 2013 at 11:04 AM, Courtney Goeltzenleuchter
court...@lunarg.com wrote:
Okay, making that change, the commit's flow better if patches 5,6,7 become
new 5,6,7,8.
Patches 1-4, 6 are:
Reviewed-by: Chris Forbes chr...@ijw.co.nz
With the changes discussed for teximagemultisample and pulling the
view parameter setting out into a helper function, patch 5 is also:
Reviewed-by: Chris Forbes chr...@ijw.co.nz
On Wed, Nov 6, 2013 at 11:59 AM, Courtney
Looks good.
Reviewed-by: Zack Rusin za...@vmware.com
- Original Message -
From: Roland Scheidegger srol...@vmware.com
There's only one minor functional change, for immediates the pixel offsets
are no longer added since the values are all the same for all elements in
any case (it
Fredrik Höglund fred...@kde.org writes:
So here's ARB_vertex_attrib_binding, take two.
This incorporates all the feedback from Eric and Ian.
Patches 6, 7, and 8 in the previous series have now been squashed into
patch 5. This is unfortunate, since patch 5 was already larger than
I would
Matt Turner matts...@gmail.com writes:
Uses SSE 4.1's MOVNTDQA instruction (streaming load) to read from
uncached memory without polluting the cache.
---
We should add runtime detection support later.
I'd really like to see runtime detection with this. Effectively not
supporting this on
Turns out that I don't have commit access to Mesa, just piglit. Feel
free to push if they look good.
I decided to have some fun and hooked valgrind up to my SI while running
a few OpenCL tests in piglit. This is the first batch of fixes.
Aaron Watry (6):
radeon/llvm: fix spelling error
v2: Fix indentation
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/radeonsi/radeonsi_compute.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_compute.c
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c
b/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c
index 339d7bf..927fb24 100644
v2: Fix indentation
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/radeon/radeon_llvm_emit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.c
b/src/gallium/drivers/radeon/radeon_llvm_emit.c
index 8bf278b..d2e5642
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index
Kenneth Graunke kenn...@whitecape.org writes:
Currently, has_surface_tile_offset is equivalent to gen == 4 !is_g4x.
We already use it for related checks in brw_wm_surface_state.c, so it
makes sense to use it here too. It's simpler and more future-proof.
Broadwell also lacks surface tile
On 11/06/2013 12:58 PM, Brian Paul wrote:
On 11/06/2013 12:34 PM, burlen wrote:
When I build osmesa with --with-osmesa-bits=32 I notice that I get 31
bits by way of the compile line define -DDEFAULT_SOFTWARE_DEPTH_BITS=31.
What's the story with the number 31? Is 31 bits really better than 32?
This exposes the kernel API for performing asynchronous flips
Signed-off-by: Keith Packard kei...@keithp.com
---
include/drm/drm.h | 1 +
include/drm/drm_mode.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index
Keith Packard kei...@keithp.com writes:
This exposes the kernel API for performing asynchronous flips
Signed-off-by: Keith Packard kei...@keithp.com
Reviewed-by: Eric Anholt e...@anholt.net
pgpWaOc6OxPM4.pgp
Description: PGP signature
___
mesa-dev
On 4 November 2013 06:57, Brian Paul bri...@vmware.com wrote:
On 11/04/2013 02:09 AM, Chris Forbes wrote:
From: Christoph Bumiller e0425...@student.tuwien.ac.at
diff --git a/src/mapi/glapi/gen/ARB_draw_indirect.xml
b/src/mapi/glapi/gen/ARB_draw_indirect.xml
new file mode 100644
index
Hi Matt, thanks for the CC!
On Tue, 2013-11-05 at 15:14 -0800, Matt Turner wrote:
We do support out of tree builds now.
Indeed, I added this patch on top of the 9.2 branch and ran it through
gnome-continuous, appears to build and work OK.
Tested-By: Colin Walters walt...@verbum.org
Hi everyone,
here’s a bugfix to make implicit alignment and padding
assumptions explicit, please apply.
Thanks,
//mirabilos
--
21:26⎜cnuke cool cool, pitch ist zu hoch
21:26⎜cnuke eingebauter chipmunk modus in dragonfly bsd │ I luv it ^^
21:31⎜«yofuh» ich glaube ich wuerde den rechner aussm
On 11/06/2013 02:44 PM, Eric Anholt wrote:
Matt Turner matts...@gmail.com writes:
Uses SSE 4.1's MOVNTDQA instruction (streaming load) to read from
uncached memory without polluting the cache.
---
We should add runtime detection support later.
I'd really like to see runtime detection with
With the removal of the r600 and radeonsi xorg targets, the only ones
left are i915 and nouveau. Does anyone have a compelling reason to
keep them (and the state tracker code itself) around anymore?
Seems like VMware uses XA, which Rob might also use for freedreno.
I'd be happy to delete them
On Wed, Nov 6, 2013 at 5:43 PM, Matt Turner matts...@gmail.com wrote:
With the removal of the r600 and radeonsi xorg targets, the only ones
left are i915 and nouveau. Does anyone have a compelling reason to
keep them (and the state tracker code itself) around anymore?
I'm fine with removing
Long ago, the HW_REG usage in assign_curb/urb_setup() were scheduling
barriers, so we had to run scheduler before them in order for it to be
able to do basically anything. Now that that's fixed, we can delay the
scheduling until we go to allocate (which will make the next change less
scary).
---
Since LIFO fails on some shaders in one particular way, and non-LIFO
systematically fails in another way on different kinds of shaders, try
them both. and pick whichever one successfully register allocates first.
Slightly prefer non-LIFO in case we produce extra dependencies in register
We care about depth-until-program-end, as a proxy for make sure I
schedule those early instructions that open up the other things that can
make progress while keeping register pressure low, not actual latency
(since we're relying on the post-register-alloc scheduling to actually
schedule for the
On Thu, Nov 7, 2013 at 3:30 AM, Stéphane Marchesin
stephane.marche...@gmail.com wrote:
On Wed, Nov 6, 2013 at 5:43 PM, Matt Turner matts...@gmail.com wrote:
With the removal of the r600 and radeonsi xorg targets, the only ones
left are i915 and nouveau. Does anyone have a compelling reason to
Eric Anholt e...@anholt.net writes:
Keith Packard kei...@keithp.com writes:
This exposes the kernel API for performing asynchronous flips
Signed-off-by: Keith Packard kei...@keithp.com
Reviewed-by: Eric Anholt e...@anholt.net
I've pushed this to master.
--
keith.pack...@intel.com
https://bugs.freedesktop.org/show_bug.cgi?id=67672
--- Comment #15 from James Cook james.c...@utoronto.ca ---
I can reproduce the problem on my machine.
I'm using the tarball at
ftp://ftp.freedesktop.org/pub/mesa/${version}/MesaLib-${version}.tar.bz2 ,
where version is 9.2.2, with some
On 11/06/2013 10:55 PM, Paul Berry wrote:
On 5 November 2013 23:45, Tapani Pälli tapani.pa...@intel.com
mailto:tapani.pa...@intel.com wrote:
On 11/05/2013 07:36 PM, Paul Berry wrote:
On 1 November 2013 02:16, Tapani Pälli tapani.pa...@intel.com
mailto:tapani.pa...@intel.com wrote:
---
configure.ac | 3 +-
src/gallium/targets/Makefile.am | 4 -
src/gallium/targets/xorg-nouveau/Makefile.am | 68
src/gallium/targets/xorg-nouveau/nouveau_target.c | 20 ---
src/gallium/targets/xorg-nouveau/nouveau_xorg.c
Acked-by: Jakob Bornecrantz wallbra...@gmail.com
Acked-by: Stéphane Marchesin stephane.marche...@gmail.com
---
configure.ac | 3 +-
src/gallium/SConscript | 5 -
src/gallium/targets/Makefile.am | 4 -
This series adds ARB_draw_indirect and ARB_multi_draw_indirect for i965 Gen7+.
Big changes from V1:
- Split up the old 2/11 into some more sensible pieces
- Discarded all the unused dlist stuff; this was a carryover from when draws
were handled by the vtxfmt vtable rather than in the main
From: Christoph Bumiller e0425...@student.tuwien.ac.at
Split from patch implementing ARB_draw_indirect.
v2: Const-qualify the struct gl_buffer_object *indirect argument.
v3: Fix up some more draw calls for new argument.
v4: Fix up rebase conflicts in i965.
---
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_draw.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index e6c3508..9f8ad45 100644
---
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/vbo/vbo.h| 3 ++-
src/mesa/vbo/vbo_exec_array.c | 5 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/vbo/vbo.h b/src/mesa/vbo/vbo.h
index 113374a..942b34a 100644
--- a/src/mesa/vbo/vbo.h
+++
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/vbo/vbo_exec_array.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/src/mesa/vbo/vbo_exec_array.c
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mapi/glapi/gen/ARB_draw_indirect.xml | 45
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml|
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/main/bufferobj.c| 14 ++
src/mesa/main/get.c | 4
src/mesa/main/get_hash_params.py | 2 ++
src/mesa/main/mtypes.h
- MMIO registers for draw parameters
- New bit in 3DPRIMITIVE command to enable indirection
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/intel_reg.h | 8
2 files changed, 9 insertions(+)
diff --git
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_context.h | 10 +
src/mesa/drivers/dri/i965/brw_draw_upload.c | 32
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
---
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 2 +-
src/mesa/vbo/vbo.h| 3 ++-
src/mesa/vbo/vbo_exec_array.c | 2 +-
src/mesa/vbo/vbo_primitive_restart.c | 3 ++-
4 files changed, 6 insertions(+), 4 deletions(-)
diff
V2: Check for mapping failure (thanks Brian)
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/vbo/vbo_primitive_restart.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/src/mesa/vbo/vbo_primitive_restart.c
b/src/mesa/vbo/vbo_primitive_restart.c
---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_draw.h | 3 ++-
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 5 +++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
Just prior to emitting the 3DPRIMITIVE command, we load each of the
indirect registers. The values loaded are either from offsets into the
current indirect BO, or constant zero if the parameter is not used for
this draw.
Enabling use of the indirect registers is done by turning on a bit in
the
.. and mark them off on the extensions list as done.
V2: Enable only if pipelined register writes work.
V3: Also update relnotes
Signed-off-by: Chris Forbes chr...@ijw.co.nz
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
docs/GL3.txt | 4 ++--
We will reuse the same extension flag for ARB_multi_draw_indirect since
it can always be supported by looping.
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/main/extensions.c | 2 ++
src/mesa/main/get.c
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/main/api_validate.c | 163 +++
src/mesa/main/api_validate.h | 26 +++
2 files changed, 189 insertions(+)
diff --git
Eric Anholt e...@anholt.net writes:
Since LIFO fails on some shaders in one particular way, and non-LIFO
systematically fails in another way on different kinds of shaders, try
them both. and pick whichever one successfully register allocates first.
Slightly prefer non-LIFO in case we produce
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