On Fri, Jul 04, 2014 at 05:26:43PM +0100, Neil Roberts wrote:
The Meta implementation of glClearTexSubImage is going to want to ensure that
dithering is disabled so that it can get a consistent color across the whole
texture when clearing. This adds a state flag to easily save it and set it to
On Fri, Jul 04, 2014 at 05:26:44PM +0100, Neil Roberts wrote:
Here is version 3 of the glClearTexImage implementation. I figured out
I could avoid the whole issue of preserving the glClearColor state by
using glClearBuffer instead of glClear. I think the patch is a lot
neater this way.
I like
On 07/05/2014 07:18 PM, Ilia Mirkin wrote:
On Sat, Jul 5, 2014 at 2:49 PM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
Hi,
As part of my Google Summer of Code 2014, I implemented
GL_AMD_performance_monitor for Nouveau using the state tracker of Gallium.
Currently, only MP counters for
On 07/06/2014 01:39 PM, Marek Olšák wrote:
The same as patch 3 - this will break radeon.
Marek
Thanks for your reviews, I'll fix the radeon part.
On Sat, Jul 5, 2014 at 8:49 PM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
This will be used by GL_AMD_performance_monitor.
Signed-off-by:
Pohjolainen, Topi topi.pohjolai...@intel.com writes:
Here in this function you use glClearBuffer*() and later on in
cleartexsubimage_depth_stencil() you use _mesa_ClearBuffer*() - I
would switch to the latter here also.
Ah, whoops, yes, sorry about that. I'll fix it up in the Git branch.
Pohjolainen, Topi topi.pohjolai...@intel.com writes:
All the other state flags considered in _mesa_meta_begin() are
explicitly set as disabled. And having noticed that you
unconditionally disable dithering also in cleartexsubimage_using_fbo()
I'm wondering if I'm missing something.
My
Hi,
In src/mesa/main, the bindings for atomic buffers are made to
mesa_init_buffers, mesa_free_buffers, mesa_deletebuffers.
Here are the two commits made on Jul 07 2014.
https://github.com/adityaatluri/mesa/commits/master
--
Regards,
*Aditya Atluri,*
*USA.*
V2:
- make group_id the last field of this struct, this fixes
drivers which use pipe_driver_query_info like radeon
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/include/pipe/p_defines.h | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Christoph Bumiller e0425...@student.tuwien.ac.at
This is based on the original patch of Christoph Bumiller.
(source: http://people.freedesktop.org/~chrisbmr/perfmon.diff)
V2: (Samuel Pitoiset)
- Fix compilation
- Improve the original code
- Rewrite some parts of the original code
V3:
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/mesa/state_tracker/st_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 4207cb6..25042fb 100644
---
This allows to return different numeric types for queries.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/auxiliary/hud/hud_driver_query.c| 2 +-
src/gallium/drivers/freedreno/freedreno_query.c | 12 ++--
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 8
This can be used to check if a query is unable to start.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/freedreno/freedreno_query.c| 4 ++--
src/gallium/drivers/freedreno/freedreno_query.h| 2 +-
src/gallium/drivers/freedreno/freedreno_query_hw.c | 3
V2:
- do not return immediately after nvc0_mp_pm_query_end() in
order to set the current state of the given query
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff
This will be used by GL_AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/include/pipe/p_defines.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
index
On nvc0, a counter can up to 6 sources instead of only one
for nve4+. This fixes a crash when a counter uses more than
one source.
V2:
- add the Reviewed-by
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/svga/svga_screen.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/gallium/drivers/svga/svga_screen.c
b/src/gallium/drivers/svga/svga_screen.c
index b213b04..5621271 100644
---
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/radeon/r600_pipe_common.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 46e8a79..43d86a4
This will be used for the GL_FLOAT counter type of
AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/include/pipe/p_defines.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/include/pipe/p_defines.h
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/freedreno/freedreno_query.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/drivers/freedreno/freedreno_query.c
b/src/gallium/drivers/freedreno/freedreno_query.c
index
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
index
This adds two groups of queries for nvc0. All other drivers
which use pipe_driver_query_info (freedreno, svga and radeon)
only define one group of queries.
V2:
- rewrite commit message
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c |
Hello,
This is the second version of GL_AMD_performance_monitor.
V2 (global changes):
- Fix radeon as pinpointd by Marek.
- Implement pipe_driver_query_group_info for svga, radeon and
freedreno
GL_AMD_performance_monitor is now available for nvc0, svga,
freedreno and radeon.
Thanks in
This adds two groups of queries.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 52 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 +
src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 3 ++
3 files
This will be used to sort counters per group for
GL_AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/include/pipe/p_defines.h | 7 +++
src/gallium/include/pipe/p_screen.h | 11 +++
2 files changed, 18 insertions(+)
diff --git
v2: Use CLAMP macro (Ian Romanick)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/ir_constant_expression.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index 7f83eb1..6813180
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/ir_optimization.h | 1 +
src/glsl/lower_instructions.cpp | 29 +
2 files changed, 30 insertions(+)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/program/ir_to_mesa.cpp| 6 ++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++
2 files changed, 12 insertions(+)
diff --git
When sel conditon is bounded within 0 and 1.0. This allows code as:
mov.sat a b
sel.ge dst a 0.25F
To be propagated as:
sel.ge.sat dst b 0.25F
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 18
v2: Check that the base type is float (Ian Romanick)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/opt_algebraic.cpp | 34 ++
1 file changed, 34 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index
When sel conditon is bounded within 0 and 1.0. This allows code as:
mov.sat a b
sel.ge dst a 0.25F
To be propagated as:
sel.ge.sat dst b 0.25F
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
.../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 75
v2: - Output min(saturate(x),b) instead of saturate(min(x,b)) suggested by Ilia
Mirkin
- Make sure we do component-wise comparison for vectors (Ian Romanick)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/opt_algebraic.cpp | 10 ++
1 file changed, 10
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/ir.cpp | 2 ++
src/glsl/ir.h| 1 +
src/glsl/ir_validate.cpp | 1 +
3 files changed, 4 insertions(+)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index 1d8bb6e..4a6e8e3 100644
--- a/src/glsl/ir.cpp
Now that we have the ir_unop_saturate implemented as a single
instruction, generate the correct simplified expression.
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/ir_builder.cpp | 6 +-
1 file changed, 1
Now that saturate is implemented natively as instruction,
we can cut down on unneeded functionality.
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/program/ir_to_mesa.cpp| 48
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 51
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4
2 files changed, 5 insertions(+)
diff --git
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
Needed when vertex programs doesn't allow saturate
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/program/ir_to_mesa.cpp| 5 -
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 +-
2 files changed, 9
V2 of clamp/saturate optimizations
This patch series add the plumbing to support the GLSL IR instruction
saturate().
Previously, saturate is implemented as min/max instructions. Most GPUs, however,
can probably perform saturate for free. With these changes, we can allow
saturate
to be optimized
Now that saturate is implemented natively as instruction,
we can cut down on unneeded functionality.
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 -
Now that saturate is implemented natively as an instruction,
we can cut down on unneeded functionality.
Reviewed-by: Matt Turner matts...@gmail.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 -
v2: - Output max(saturate(x),b) instead of saturate(max(x,b))
- Make sure we do component-wise comparison for vectors (Ian Romanick)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/opt_algebraic.cpp | 12
1 file changed, 12 insertions(+)
diff --git
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
This adds two groups of queries for nvc0. All other drivers
which use pipe_driver_query_info (freedreno, svga and radeon)
only define one group of queries.
V2:
- rewrite commit message
Subject should just be
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
V2:
- make group_id the last field of this struct, this fixes
drivers which use pipe_driver_query_info like radeon
While I have no problem with this patch, how exactly would placing
group_id at some other
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
This allows to return different numeric types for queries.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/auxiliary/hud/hud_driver_query.c| 2 +-
On 07/07/2014 05:12 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
V2:
- make group_id the last field of this struct, this fixes
drivers which use pipe_driver_query_info like radeon
While I have no problem with this patch, how
On 07/07/2014 05:13 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
This adds two groups of queries for nvc0. All other drivers
which use pipe_driver_query_info (freedreno, svga and radeon)
only define one group of queries.
V2:
-
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/mesa/state_tracker/st_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
On 07/07/2014 05:17 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
This allows to return different numeric types for queries.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/auxiliary/hud/hud_driver_query.c
On 07/07/2014 05:23 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/mesa/state_tracker/st_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git
On Mon, Jul 7, 2014 at 11:20 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
On 07/07/2014 05:12 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
V2:
- make group_id the last field of this struct, this fixes
drivers which use
Now, before moving everything to host memory, we try to create a
new resource to use as a pool. I we succeed we just use this resource
and delete the previous one. If we fail we fallback to using the
shadow.
This should make growing the pool faster, and we can also save
64KB of memory that were
https://bugs.freedesktop.org/show_bug.cgi?id=21239
Andreas Boll andreas.boll@gmail.com changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop.
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git
You should also add docs bit in gallium/docs/source/screen.rst
Otherwise looks ok to me.
Roland
Am 07.07.2014 17:47, schrieb Samuel Pitoiset:
This will be used to sort counters per group for
GL_AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
On Fri, Jul 04, 2014 at 09:43:08PM -0700, Matt Turner wrote:
On Wed, Jul 2, 2014 at 6:59 AM, Pohjolainen, Topi
topi.pohjolai...@intel.com wrote:
On Mon, Jun 30, 2014 at 02:40:42PM -0700, Matt Turner wrote:
With a hack to place an exec_node in the struct in C to be at the same
location as
https://bugs.freedesktop.org/show_bug.cgi?id=29711
Andreas Boll andreas.boll@gmail.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Oh and 2,5,6,7,8 have a somewhat bogus commit message - this is a
pipe_screen function, not pipe_context.
Roland
Am 07.07.2014 18:42, schrieb Roland Scheidegger:
You should also add docs bit in gallium/docs/source/screen.rst
Otherwise looks ok to me.
Roland
Am 07.07.2014 17:47, schrieb
On Mon, Jul 7, 2014 at 6:57 AM, Abdiel Janulgue
abdiel.janul...@linux.intel.com wrote:
v2: Check that the base type is float (Ian Romanick)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/glsl/opt_algebraic.cpp | 34 ++
1 file changed,
On Mon, Jul 7, 2014 at 6:57 AM, Abdiel Janulgue
abdiel.janul...@linux.intel.com wrote:
v2: - Output min(saturate(x),b) instead of saturate(min(x,b)) suggested by
Ilia Mirkin
- Make sure we do component-wise comparison for vectors (Ian Romanick)
Signed-off-by: Abdiel Janulgue
On Mon, Jul 7, 2014 at 6:57 AM, Abdiel Janulgue
abdiel.janul...@linux.intel.com wrote:
v2: - Output max(saturate(x),b) instead of saturate(max(x,b))
- Make sure we do component-wise comparison for vectors (Ian Romanick)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
Am 07.07.2014 17:47, schrieb Samuel Pitoiset:
This allows to return different numeric types for queries.
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/auxiliary/hud/hud_driver_query.c| 2 +-
src/gallium/drivers/freedreno/freedreno_query.c | 12 ++--
On Mon, Jul 7, 2014 at 6:57 AM, Abdiel Janulgue
abdiel.janul...@linux.intel.com wrote:
When sel conditon is bounded within 0 and 1.0. This allows code as:
mov.sat a b
sel.ge dst a 0.25F
To be propagated as:
sel.ge.sat dst b 0.25F
Signed-off-by: Abdiel Janulgue
On Mon, Jul 7, 2014 at 6:57 AM, Abdiel Janulgue
abdiel.janul...@linux.intel.com wrote:
When sel conditon is bounded within 0 and 1.0. This allows code as:
mov.sat a b
sel.ge dst a 0.25F
To be propagated as:
sel.ge.sat dst b 0.25F
Signed-off-by: Abdiel Janulgue
On Jul 7, 2014, at 8:28 AM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
This affects new intrinsics only.
What surprises me is that v32i8 still works.
---
lib/Target/R600/SIInstructions.td | 4 +-
lib/Target/R600/SIIntrinsics.td | 6
On Mon, Jul 7, 2014 at 6:56 AM, Abdiel Janulgue
abdiel.janul...@linux.intel.com wrote:
V2 of clamp/saturate optimizations
This patch series add the plumbing to support the GLSL IR instruction
saturate().
Previously, saturate is implemented as min/max instructions. Most GPUs,
however,
can
On 07/07/2014 07:15 PM, Roland Scheidegger wrote:
Oh and 2,5,6,7,8 have a somewhat bogus commit message - this is a
pipe_screen function, not pipe_context.
Oh my bad! I'm sorry...
I fixed it locally, thanks.
Roland
Am 07.07.2014 18:42, schrieb Roland Scheidegger:
You should also add docs
Hi,
Is it possible to turn off the optimizations in the backend,
while still leaving optimizations on in the glsl-compiler?
I'm currently exploring different execution-orders
of optimization-passes in the glsl-compiler.
While I've found some room for improvement, my guess
is a lot of the
On 07/07/2014 06:32 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 19 +--
1 file changed, 13 insertions(+),
On Mon, Jul 7, 2014 at 3:45 PM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
On 07/07/2014 06:32 PM, Ilia Mirkin wrote:
On Mon, Jul 7, 2014 at 11:47 AM, Samuel Pitoiset
samuel.pitoi...@gmail.com wrote:
Signed-off-by: Samuel Pitoiset samuel.pitoi...@gmail.com
---
https://bugs.freedesktop.org/show_bug.cgi?id=21239
Andreas Boll andreas.boll@gmail.com changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop
On Mon, Jul 7, 2014 at 12:36 PM, Thomas Helland
thomashellan...@gmail.com wrote:
Is it possible to turn off the optimizations in the backend,
while still leaving optimizations on in the glsl-compiler?
Not via an environment variable or anything, but you can of course
comment out the
Previously instruction scheduling tracked dependencies on a per-register
basis. This meant that there was an artificial dependency between
interpolation instructions writing into the same virtual register.
Instruction scheduling would insert a number of instructions between the
two instructions
... on Gen7+. I'm not actually sure which class Gen6 fits into.
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
On Monday, July 07, 2014 01:39:17 PM Matt Turner wrote:
... on Gen7+. I'm not actually sure which class Gen6 fits into.
It looks like you actually did this for Gen6+, not Gen7+. I think that's
correct. Gen6 is when we moved from the mathbox shared function to an actual
MATH instruction.
Mesa 10.2.3 has been released. Mesa 10.2.3 is a bug fix release which
fixes bugs fixed since the 10.2.2 release, (see below for a list of
changes).
The tag in the git repository for Mesa 10.2.3 is 'mesa-10.2.3'.
Mesa 10.2.3 is available for download at
ftp://freedesktop.org/pub/mesa/10.2.3/
From: Marek Olšák marek.ol...@amd.com
---
src/gallium/drivers/radeonsi/si_blit.c| 2 +-
src/gallium/drivers/radeonsi/si_descriptors.c | 12 +-
src/gallium/drivers/radeonsi/si_pipe.c| 6 ++---
src/gallium/drivers/radeonsi/si_pipe.h| 4 +---
From: Marek Olšák marek.ol...@amd.com
This is a follow-up to the commit which adds texture fetches with offsets.
---
src/gallium/drivers/radeonsi/si_shader.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git
Thanks for info. However, the home page of llvm.org doesn't seem to mention it.
Marek
On Wed, Jul 2, 2014 at 6:12 PM, Tom Stellard t...@stellard.net wrote:
On Sat, Jun 28, 2014 at 01:12:49PM +0200, Marek Olšák wrote:
The one that increases the number of input SGPRs to 22 (16 user + 6
From: Marek Olšák marek.ol...@amd.com
Needed by ARB_draw_indirect.
---
configure.ac | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index 4646212..9d5cd89 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1888,8 +1888,9 @@ radeon_llvm_check() {
I'm re-sending what remains to be merged to get ARB_draw_indirect on radeonsi.
They are patches 3-5.
The first 2 patches bump the LLVM version requirement to 3.4.2, which contains
a fix for the calling convention to allow one more user SGPR.
Please review.
Marek
From: Marek Olšák marek.ol...@amd.com
---
src/gallium/drivers/radeon/r600_pipe_common.c | 7 ---
src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++
src/gallium/drivers/radeonsi/si_pipe.c| 12
src/gallium/drivers/radeonsi/si_pipe.h| 4
From: Marek Olšák marek.ol...@amd.com
The draw indirect packets cannot set VGT_INDX_OFFSET, they can only set user
data SGPRs. This is the only way to support start/index_bias with indirect
drawing.
---
src/gallium/drivers/radeonsi/si_shader.c | 11 +++
From: Marek Olšák marek.ol...@amd.com
info-start will be invalid once info-indirect isn't NULL, so it shouldn't
be added to ib.offset.
---
src/gallium/drivers/radeonsi/si_state_draw.c | 36 +++-
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git
From: Marek Olšák marek.ol...@amd.com
---
docs/GL3.txt | 4 +-
docs/relnotes/10.3.html | 2 +
src/gallium/drivers/radeonsi/si_commands.c | 53
src/gallium/drivers/radeonsi/si_pipe.c | 1 +
From: Marek Olšák marek.ol...@amd.com
---
src/gallium/drivers/radeonsi/si_hw_context.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c
b/src/gallium/drivers/radeonsi/si_hw_context.c
index e4ce3af..56fa664 100644
---
On Mon, Jul 7, 2014 at 9:40 PM, Marek Olšák mar...@gmail.com wrote:
From: Marek Olšák marek.ol...@amd.com
You might want to mention the bug URL that this fixes when you push.
Reviewed-by: Alex Deucher alexander.deuc...@amd.com
---
src/gallium/drivers/radeonsi/si_hw_context.c | 1 +
1 file
Hi Chris,
I found your new piglit tests for arb_texture_view (format-consistency-get and
format-consistency-render) and checked that all of them pass with my patch.
Also I slightly modified test format-consistency-get and now it fails without
patch and demonstrates the regression. The test and
Hello,
I've discussed this with Chris a bunch, but wanted to also get other
people's take on this.
The way I interpret things is that when ARB_sample_shading's
provisions are met, it's as if each fragment input were to have been
declared with a 'sample' attribute in an ARB_gpu_shader5 world.
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