This has bothered me for about as long as NIR has been around. Why do we
have two different unions for constants? No good reason other than one of
them is a direct port from GLSL IR.
---
src/compiler/glsl/glsl_to_nir.cpp | 35
src/compiler/nir/nir.c | 36
We've had a few instances in the past where complex macro code caused
super long MSVC compile times. But, AFAIK, nothing's changed recently
in the u_unfilled_gen.c code.
-Brian
On 11/29/2016 08:48 PM, Roland Scheidegger wrote:
It's the second time it reached a timeout today - albeit the
This new feature lets us generate C enums for inline values of a
field. If the type attribute on a field is an otherwise undefined type,
the generator will create an enum with that type name and the inline
values. The enum can be referenced further down in the XML as if it had
be declared
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen8.xml | 2 +-
src/intel/genxml/gen9.xml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 04d3590..85f1c73 100644
---
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 8
src/intel/genxml/gen7.xml | 8
src/intel/genxml/gen75.xml | 8
src/intel/genxml/gen8.xml | 8
src/intel/genxml/gen9.xml | 8
5 files changed, 20
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen_pack_header.py | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/intel/genxml/gen_pack_header.py
b/src/intel/genxml/gen_pack_header.py
index 1024745..001ad17 100644
This is already supported in genX_state.c, expose the extension string.
Signed-off-by: Ilia Mirkin
---
./deqp-vk --deqp-visibility=hidden --deqp-case='*mirror_clamp_to_edge*'
Test run totals:
Passed:2795/3640 (76.8%)
Failed:0/3640 (0.0%)
Not
Hi Emil,
Thank you for the comments. Please find my response inlined in the below mail.
Regards,
Chandu
-Original Message-
From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
Sent: Tuesday, November 29, 2016 3:09 AM
To: Christian König
Cc: Namburu, Chandu-babu
It's the second time it reached a timeout today - albeit the first time
it didn't even start compiling...
No idea what's up, but it looks like things are really slow today, one
hour build time should be quite sufficient I think.
Roland
Am 30.11.2016 um 04:05 schrieb Ilia Mirkin:
> "Build
Build mesa 2843 completed
Commit 2ea021a1eb by Timothy Arceri on 11/2/2016 3:28 AM:
glsl: use linked_shaders bitmask to iterate stages for subroutine fields\n\nThis should be faster than looping over every stage and null checking, but\nwill also make the code
"Build execution time has reached the maximum allowed time for your
plan (60 minutes)."
The last line in the log is "Generating
build\windows-x86-debug\gallium\auxiliary\indices\u_unfilled_gen.c".
Either way, I don't think it's my bad. Let me know if I've
misanalyzed.
-ilia
On Tue, Nov 29,
Build mesa 2842 failed
Commit ddf0f097e7 by Ilia Mirkin on 11/24/2016 11:02 PM:
swr: [rasterizer jit] use signed integer representation for logic op\n\nInstead of (incorrectly) biasing the snorm value to make it look like a\nunorm, just use signed integer
https://bugs.freedesktop.org/show_bug.cgi?id=95460
Shmerl changed:
What|Removed |Added
Summary|Please add more drivers |Please add more drivers
The buffer_size does not take the offset into account. Just add the
offset into the pointer which lines up the structures much better.
Signed-off-by: Ilia Mirkin
---
This doesn't really fix anything right now, but logically the streamOffset
is incremented on each draw, and
The number has to be less than or equal to the max, not just less than.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_state.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/swr_state.cpp
The components count the number of individual values, not the number of
slots.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_screen.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/swr_screen.cpp
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_context.cpp | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/swr_context.cpp
b/src/gallium/drivers/swr/swr_context.cpp
index b355bba..b8c87fa 100644
---
There is no support for resuming streamout. Furthermore, this also
controls glDrawTransformFeedback functionality which requires the same
ability to query how many primitives were sent out of TF.
Signed-off-by: Ilia Mirkin
---
I have a partially-working patch for bringing
We need to take the instance divisor and number of instances into
account for instanced client-side arrays, rather than the vertex
parameters.
Loosely based on the comparable nvc0 logic.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_state.cpp | 74
Signed-off-by: Ilia Mirkin
---
I've been running this for a little while and haven't hit it. I had a theory
at one point that there was a missing format in there which turned out to be
false, but I think this is still good to have rather than silently fail.
We now support clearing these, and actually rendering to multiple layers
would require GS support, which will fail in much more spectacular ways
for now. Once that is hooked up, there won't be anything else to do
here.
Signed-off-by: Ilia Mirkin
---
On Tue, Nov 29, 2016 at 5:49 PM, Ilia Mirkin wrote:
> On Tue, Nov 29, 2016 at 8:48 PM, Ilia Mirkin wrote:
> > On Tue, Nov 29, 2016 at 8:41 PM, Jason Ekstrand
> wrote:
> >> In an attempt to fix 3DSTATE_DEPTH_BUFFER for
When I originally implemented support for the ARB_copy_image extension, I
did so with a meta-based path that used texture views to smash surface
formats to match. Because this doesn't actually work for all cases
(compressed textures come to mind), we had a blit-based fallback path and,
because
On Tue, Nov 29, 2016 at 8:48 PM, Ilia Mirkin wrote:
> On Tue, Nov 29, 2016 at 8:41 PM, Jason Ekstrand wrote:
>> In an attempt to fix 3DSTATE_DEPTH_BUFFER for stencil-only cases, I
>> accidentally kept setting the SurfaceType to 2D in the stencil-only
On Tue, Nov 29, 2016 at 8:41 PM, Jason Ekstrand wrote:
> In an attempt to fix 3DSTATE_DEPTH_BUFFER for stencil-only cases, I
> accidentally kept setting the SurfaceType to 2D in the stencil-only case
depth-only, right?
> thanks to a copy+paste error.
>
> Cc: Nanley Chery
On Tue, Nov 29, 2016 at 8:21 PM, Rowley, Timothy O
wrote:
>
> On Nov 27, 2016, at 11:13 PM, Ilia Mirkin wrote:
>
> On Thu, Nov 24, 2016 at 6:11 PM, Ilia Mirkin wrote:
>
> Instead of (incorrectly) biasing the snorm value to
In an attempt to fix 3DSTATE_DEPTH_BUFFER for stencil-only cases, I
accidentally kept setting the SurfaceType to 2D in the stencil-only case
thanks to a copy+paste error.
Cc: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 2 +-
1 file changed, 1 insertion(+), 1
Pretty basic, but it's a start.
---
src/mesa/drivers/dri/i965/Makefile.am | 7 +
.../drivers/dri/i965/test_fs_copy_propagation.cpp | 204 +
2 files changed, 211 insertions(+)
create mode 100644 src/mesa/drivers/dri/i965/test_fs_copy_propagation.cpp
diff --git
We shouldn't ever see a SEL with conditional mod other than GE (for max)
or L (for min), but we might see one with predication and no conditional
mod.
total instructions in shared programs: 8241806 -> 8241902 (0.00%)
instructions in affected programs: 13284 -> 13380 (0.72%)
HURT: 62
total cycles
Matches the vec4 backend, cmod propagation, and saturate propagation.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 10 +-
src/mesa/drivers/dri/i965/brw_fs.h| 6 +++---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 15 ---
3 files
instructions in affected programs: 550 -> 544 (-1.09%)
helped: 6
cycles in affected programs: 6952 -> 6850 (-1.47%)
helped: 6
---
src/compiler/nir/nir_opt_algebraic.py | 2 ++
src/compiler/nir/nir_search_helpers.h | 23 +++
2 files changed, 25 insertions(+)
diff --git
From: Marek Olšák
not needed
---
src/gallium/drivers/radeonsi/si_shader.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index ee2fce1..44a4dd2 100644
---
From: Marek Olšák
Internal docs don't mention it, but they also don't mention that the bug
has been fixed (like other CI bugs fixed in VI).
Vulkan does this too.
Cc: 13.0
---
src/gallium/drivers/radeon/r600_pipe_common.c | 3 ++-
1 file
From: Marek Olšák
ported from Vulkan
Cc: 13.0
---
src/gallium/drivers/radeonsi/si_state_draw.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
From: Marek Olšák
Cc: 13.0
---
src/gallium/drivers/radeonsi/si_shader.c | 34 +---
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
From: Marek Olšák
Cc: 13.0
---
src/gallium/drivers/radeonsi/si_state_draw.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index
From: Marek Olšák
All codepaths are handled except for clover.
Cc: 13.0
---
src/gallium/drivers/radeonsi/si_compute.c| 1 +
src/gallium/drivers/radeonsi/si_shader.c | 24 ++--
From: Marek Olšák
This one is easy to miss, because it's not documented in any internal doc.
---
src/amd/common/sid.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index 7f598ca..3b3983f 100644
---
From: Marek Olšák
The next commit will need this.
Cc: 13.0
---
src/gallium/drivers/radeonsi/si_shader.c | 43 ++--
1 file changed, 19 insertions(+), 24 deletions(-)
diff --git
Build mesa 2840 completed
Commit 662b9c24d0 by Marek Olšák on 11/28/2016 12:37 AM:
radeonsi: don't fetch 8 dwords for samplerBuffer and imageBuffer\n\nThe compiler doesn't shrink s_load_dwordx8, so we always wasted 4 SGPRs.\nAlso, the extraction of the
On Nov 27, 2016, at 11:13 PM, Ilia Mirkin
> wrote:
On Thu, Nov 24, 2016 at 6:11 PM, Ilia Mirkin
> wrote:
Instead of (incorrectly) biasing the snorm value to make it look like a
unorm, just use
> Am 29.11.2016 um 15:18 schrieb Jose Fonseca:
>> Actually, IIUC https://github.com/divVerent/s2tc/wiki/libtxc_dxtn picks
>> colors at random, so its possible you have the same version of s2tc
>> library, but random colors are being picked.
>>
>> If so, you might to hack s2tc to not pick colors at
Thanks! I'll keep 15 and 17 out. I'd still like to have tile mode as an
enum, but maybe I'll make the generator split inline values out as enums -
or maybe just when you've specified an enum name as the type. That is,
generates
enum GEN9_TILE_MODE {
Reviewed-by: Bruce Cherniak
> On Nov 22, 2016, at 8:03 PM, Rowley, Timothy O
> wrote:
>
> ---
> .../drivers/swr/rasterizer/common/swr_assert.cpp | 96 ++
> .../drivers/swr/rasterizer/common/swr_assert.h | 14
>
On 30 November 2016 at 09:45, Bas Nieuwenhuizen
wrote:
> With nir_intrinsic_ssbo_atomic_comp_swap we run out of params.
>
> Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Dave Airlie
___
With or without Emil's suggestions, this patch is
Reviewed-by: Ian Romanick
On 11/20/2016 05:28 AM, Timothy Arceri wrote:
> This should be faster than looping over every stage and null checking, but
> will also make the code a bit cleaner when we switch to getting more
On Mon, 2016-11-28 at 19:05 -0800, Ian Romanick wrote:
> On 11/20/2016 05:28 AM, Timothy Arceri wrote:
> >
> > This now contains everything we need.
> > ---
> > src/mesa/main/api_validate.c | 2 +-
> > src/mesa/program/prog_print.c | 5 ++---
> > src/mesa/program/prog_print.h | 2 +-
> > 3
On 11/28/2016 09:12 PM, Timothy Arceri wrote:
> On Mon, 2016-11-28 at 18:59 -0800, Ian Romanick wrote:
>> On 11/20/2016 05:28 AM, Timothy Arceri wrote:
>>>
>>> Now that we have a linked_stages bitfield we can use this
>>> to check if the program is used at a later stage.
>>>
>>> This change is
I'm a bit inclined to drop patch 15 because I think tile mode deserves to
remain inline. I don't care about 17. I didn't really review it for not
breaking things though. The rest are
Reviewed-by: Jason Ekstrand
Don't push until you get Jenkins' ok though!
--Jason
On
On Tue, Nov 29, 2016 at 4:03 PM Jason Ekstrand wrote:
> On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
> hoegsb...@gmail.com> wrote:
>
> Signed-off-by: Kristian H. Kristensen
> ---
> src/intel/genxml/gen8.xml | 9 -
>
Thanks! I've been meaning to fix this.
Reviewed-by: Jason Ekstrand
On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
hoegsb...@gmail.com> wrote:
> This one was split across two dwords as "Kernel Start Pointer" and
> "Kernel Start Pointer High", which looks like
On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
hoegsb...@gmail.com> wrote:
> Signed-off-by: Kristian H. Kristensen
> ---
> src/intel/genxml/gen8.xml | 9 -
> src/intel/genxml/gen9.xml | 14 --
> 2 files changed, 16 insertions(+), 7
On Tue, Nov 29, 2016 at 3:37 PM Jason Ekstrand wrote:
> On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
> hoegsb...@gmail.com> wrote:
>
> Signed-off-by: Kristian H. Kristensen
> ---
> src/intel/genxml/gen6.xml | 39
Build mesa 2839 failed
Commit 048143b9d9 by Dave Airlie on 11/24/2016 12:35 AM:
radv: set spi_baryc_cntl.pos_float_location to 0\n\nThis fixes:\ndEQP-VK.pipeline.multisample_interpolation.offset_interpolate_at_sample_position.*\n\nThis should probably be 2
With nir_intrinsic_ssbo_atomic_comp_swap we run out of params.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/common/ac_nir_to_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index
On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
hoegsb...@gmail.com> wrote:
> Signed-off-by: Kristian H. Kristensen
> ---
> src/intel/genxml/gen6.xml | 39 ---
> src/intel/genxml/gen7.xml | 41
Reviewed-by: Tim Rowley
>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
> wrote:
Signed-off-by: Ilia Mirkin >
---
I’ve verified the same entries are in the list before/after.
Reviewed-by: Tim Rowley
>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
> wrote:
Signed-off-by: Ilia Mirkin
Signed-off-by: Kristian H. Kristensen
---
> Missing gen75?
Yes, added here. I also found that I'd replaced
with
in a couple of places (3DSTATE_GS) - fixed as well.
src/intel/genxml/gen6.xml | 2 +-
src/intel/genxml/gen7.xml | 6 +++---
On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
hoegsb...@gmail.com> wrote:
> Signed-off-by: Kristian H. Kristensen
> ---
> src/intel/genxml/gen6.xml | 2 +-
> src/intel/genxml/gen7.xml | 6 +++---
>
Missing gen75?
> src/intel/genxml/gen8.xml | 8
>
Cleaner this way and we avoid including gen9_pack.h when we compile with
gen8_pack.h. We also avoid the if (cherryview) condition for non-gen8
gens that don't need it.
Signed-off-by: Kristian H. Kristensen
---
v2: Add prototype and call gen9 emit function from gen8 when
On Tue, Nov 29, 2016 at 1:56 PM, Ilia Mirkin wrote:
> On Tue, Nov 29, 2016 at 3:44 PM, Jason Ekstrand
> wrote:
> >
> >
> > On Tue, Nov 29, 2016 at 12:24 PM, Nanley Chery
> > wrote:
> >>
> >> On Mon, Nov 28, 2016 at 03:45:41PM
On 29 November 2016 at 11:40, Eric Engestrom wrote:
> Fixes: ba28f2136febca32fe56 ("docs: add note about r-b/other tags when
> resending")
> CC: Emil Velikov
> Signed-off-by: Eric Engestrom
> ---
>
This patch adds missing error-checking and fixes resource leak in
allocation failure path on anv_CreateDevice()
v2: Fixes from Jason Ekstrand's review
a) Add missing destructors for all of the state pools on allocation
failure path
b) Add missing destructor for batch bo pools on
On Tue, Nov 29, 2016 at 3:44 PM, Jason Ekstrand wrote:
>
>
> On Tue, Nov 29, 2016 at 12:24 PM, Nanley Chery
> wrote:
>>
>> On Mon, Nov 28, 2016 at 03:45:41PM -0800, Jason Ekstrand wrote:
>> > ---
>> > src/intel/vulkan/genX_cmd_buffer.c | 51
>> >
On Tue, Nov 29, 2016 at 8:41 PM, Nicolai Hähnle wrote:
> Maybe only do this when debug printing is enabled?
OK. I'll do that before pushing.
Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
On Tue, Nov 29, 2016 at 12:48 PM, Kristian H. Kristensen <
hoegsb...@gmail.com> wrote:
> Cleaner this way and we avoid including gen9_pack.h when we compile with
> gen8_pack.h. We also avoid the if (cherryview) condition for non-gen8
> gens that don't need it.
>
> Signed-off-by: Kristian H.
On Tue, Nov 29, 2016 at 12:48 PM Kristian H. Kristensen
wrote:
> Hi,
>
> Here's a few patches to the genxml files that I've been sitting on. The
> main part of the series is about emitting C enums for genxml enums, so
> it looks nice and pretty in gdb. It also adds support
Reviewed-by: Tim Rowley
>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
> wrote:
Everything is in place for these.
Signed-off-by: Ilia Mirkin
Reviewed-by: Tim Rowley
>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
> wrote:
Signed-off-by: Ilia Mirkin >
---
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 39 ---
src/intel/genxml/gen7.xml | 41 +
src/intel/genxml/gen75.xml | 41 +
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 8
src/intel/genxml/gen7.xml | 8
src/intel/genxml/gen75.xml | 8
src/intel/genxml/gen8.xml | 8
src/intel/genxml/gen9.xml | 8
5 files changed, 20
This lets us reference enums in the type attribute of a field.
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen_pack_header.py | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/intel/genxml/gen_pack_header.py
b/src/intel/genxml/gen_pack_header.py
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen8.xml | 9 -
src/intel/genxml/gen9.xml | 14 --
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 165ff25..17234f6
Cleaner this way and we avoid including gen9_pack.h when we compile with
gen8_pack.h. We also avoid the if (cherryview) condition for non-gen8
gens that don't need it.
Signed-off-by: Kristian H. Kristensen
---
src/intel/vulkan/gen8_cmd_buffer.c | 13 -
1 file
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 2 +-
src/intel/genxml/gen7.xml | 6 +++---
src/intel/genxml/gen8.xml | 8
src/intel/genxml/gen9.xml | 8
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 38 --
src/intel/genxml/gen7.xml | 38 --
src/intel/genxml/gen75.xml | 38 --
These values were defined both as an enum and as inline values. Remove
the inline values and reference the 3D_Compare_Function enum instead.
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 44
The batch chain logic only needs the pre-gen8 size of
MI_BATCH_BUFFER_START, which seems like something we can make a special
case for. The other two gen7 references, MI_BATCH_BUFFER_END and
MI_NOOP, are the same on all gens.
Signed-off-by: Kristian H. Kristensen
---
Useful for people writing Intel GPU simulators...
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen_pack_header.py | 108
1 file changed, 108 insertions(+)
diff --git a/src/intel/genxml/gen_pack_header.py
This one was split across two dwords as "Kernel Start Pointer" and
"Kernel Start Pointer High", which looks like it works when the driver
only accesses "Kernel Start Pointer". This breaks, of course, with BO
offsets > 4G.
Signed-off-by: Kristian H. Kristensen
---
Signed-off-by: Kristian H. Kristensen
---
src/intel/tools/decoder.c | 97 ++-
src/intel/tools/decoder.h | 36 +++---
2 files changed, 93 insertions(+), 40 deletions(-)
diff --git a/src/intel/tools/decoder.c
The previous commits got rid of any clashes between #defines and enum
values and we can now emit the genxml enums as debugger friendly C
enums.
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen_pack_header.py | 8
1 file changed, 4 insertions(+), 4
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 9 -
src/intel/genxml/gen7.xml | 9 -
src/intel/genxml/gen75.xml | 9 -
src/intel/genxml/gen8.xml | 9 -
src/intel/genxml/gen9.xml | 9 -
5 files changed, 40
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 74 ++
src/intel/genxml/gen7.xml | 74 ++
src/intel/genxml/gen75.xml | 74
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen6.xml | 4 ++--
src/intel/genxml/gen7.xml | 4 ++--
src/intel/genxml/gen75.xml | 4 ++--
src/intel/genxml/gen8.xml | 4 ++--
src/intel/genxml/gen9.xml | 4 ++--
5 files changed, 10 insertions(+), 10
When the state fields where shuffled around for gen8, the compare
function enums were downgraded to just uints. Change them to enum
3D_Compare_Function.
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen8.xml | 8
src/intel/genxml/gen9.xml | 8
Hi,
Here's a few patches to the genxml files that I've been sitting on. The
main part of the series is about emitting C enums for genxml enums, so
it looks nice and pretty in gdb. It also adds support to aubinator so
it knows how to decode enums as well as the inline values Lionel added
support
On Tue, Nov 29, 2016 at 12:24 PM, Nanley Chery
wrote:
> On Mon, Nov 28, 2016 at 03:45:41PM -0800, Jason Ekstrand wrote:
> > ---
> > src/intel/vulkan/genX_cmd_buffer.c | 51 ++
> ++--
> > 1 file changed, 49 insertions(+), 2 deletions(-)
> >
On Tue, Nov 29, 2016 at 2:59 PM, Kyriazis, George
wrote:
>
>> -Original Message-
>> From: ibmir...@gmail.com [mailto:ibmir...@gmail.com] On Behalf Of Ilia
>> Mirkin
>> Sent: Tuesday, November 29, 2016 1:54 PM
>> To: Kyriazis, George
Patches 9-11:
Reviewed-by: Nicolai Hähnle
On 29.11.2016 04:25, Ian Romanick wrote:
From: Dave Airlie
This adds support to call the new operations on conversions.
v2 (idr): Delete an unnecessary break-statement. Noticed by Matt. Add
a missing
On Mon, Nov 28, 2016 at 03:45:41PM -0800, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 51
> --
> 1 file changed, 49 insertions(+), 2 deletions(-)
>
This patch does not match the one you've merged
Ouch, that must have been a pain to reorganize - thanks. Visual inspection
says the caps are the same before and after, and testing shows it still passing
the same tests.
Reviewed-by: Tim Rowley
>
On Nov 22, 2016, at 7:37 PM, Ilia
> -Original Message-
> From: ibmir...@gmail.com [mailto:ibmir...@gmail.com] On Behalf Of Ilia
> Mirkin
> Sent: Tuesday, November 29, 2016 1:54 PM
> To: Kyriazis, George
> Cc: mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH] swr: Templetize
From: Boyuan Zhang
The gop_size in rate control is the budget window for internal rate
control calculation, and shouldn't always equal to idr period. Define
a coefficient to let budget window contains a number of idr period for
proper rate control calculation. Adjust the
How about just making 'layers' unsigned? (Hm, I wonder why this didn't
trigger issues with gcc... maybe it should be +1u instead of +1?)
On Tue, Nov 29, 2016 at 2:46 PM, George Kyriazis
wrote:
> ---
> src/gallium/drivers/swr/swr_clear.cpp | 6 +++---
> 1 file changed,
For the series:
Acked-by: Nicolai Hähnle
On 28.11.2016 12:25, Marek Olšák wrote:
From: Marek Olšák
---
si-report.py | 43 ++-
1 file changed, 30 insertions(+), 13 deletions(-)
diff --git a/si-report.py
---
src/gallium/drivers/swr/swr_clear.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/swr/swr_clear.cpp
b/src/gallium/drivers/swr/swr_clear.cpp
index f59179f..e752ee0 100644
--- a/src/gallium/drivers/swr/swr_clear.cpp
+++
One minor comment on patch #8, apart from that the series is:
Reviewed-by: Nicolai Hähnle
On 28.11.2016 12:17, Marek Olšák wrote:
From: Marek Olšák
The compiler doesn't shrink s_load_dwordx8, so we always wasted 4 SGPRs.
Also, the extraction of
From: Boyuan Zhang
The gop_size in rate control is the budget window for internal rate
control calculation, and shouldn't always equal to idr period. Define
a coefficient to let budget window contains a number of idr period for
proper rate control calculation. Adjust the
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