[Mesa-dev] [RFC v2] nir: Add a uniformity analysis pass

v2: Start with everything uniform and mark non-uniformity. This is required in order to properly handle loops. Cc: Kenneth Graunke Cc: Connor Abbott --- src/compiler/Makefile.sources | 1 + src/compiler/nir/nir.c

Re: [Mesa-dev] [PATCH] ralloc: don't leave out the alignment factor

I've spent the whole night tracking down this bug I thought it was an issue with a recent upgrade of binutils Please add my: Tested by: Mike Lothian On Sat, 4 Mar 2017 at 00:49 Grazvydas Ignotas wrote: > Experimentation shows that without alignment

[Mesa-dev] [RFC] nir: Add a uniformity analysis pass

Cc: Kenneth Graunke Cc: Connor Abbott --- src/compiler/Makefile.sources | 1 + src/compiler/nir/nir.c| 3 + src/compiler/nir/nir.h| 18 +++ src/compiler/nir/nir_analyze_uniformity.c | 211

[Mesa-dev] [PATCH 7/8] nir: Make image_size a variable-width intrinsic

--- src/compiler/glsl/glsl_to_nir.cpp | 7 --- src/compiler/nir/nir_intrinsics.h | 2 +- src/compiler/spirv/spirv_to_nir.c | 18 +++--- 3 files changed, 16 insertions(+), 11 deletions(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index

Re: [Mesa-dev] [PATCH 0/8] nir: Require numbers of components to always match

+correct connor On Fri, Mar 3, 2017 at 5:12 PM, Jason Ekstrand wrote: > When NIR was first created, we were a bit lazy about numbers of components. > The rule was that a source couldn't consume more components than the thing > it was reading from. However, this leads to a

[Mesa-dev] [PATCH 0/8] nir: Require numbers of components to always match

When NIR was first created, we were a bit lazy about numbers of components. The rule was that a source couldn't consume more components than the thing it was reading from. However, this leads to a lot of confusion because you now have a thing sourcing from a vec4 but only reading two of the

[Mesa-dev] [PATCH 1/8] nir/intrinsics: Make load_barycentric_input take a 2-component coor

Cc: "17.0 13.0" --- src/compiler/nir/nir_intrinsics.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_intrinsics.h b/src/compiler/nir/nir_intrinsics.h index f45bfe2..5c8f283 100644 ---

[Mesa-dev] [PATCH 6/8] i965/fs: Use num_components from the SSA def in image intrinsics

--- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 3d5967a..fc85f0e 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++

[Mesa-dev] [PATCH 3/8] nir/spirv: Restrict the number of channels in texture coordinates

Some SPIR-V texturing instructions pack more than the texture coordinate into the coordinate source. We need to mask off the unused channels. --- src/compiler/spirv/spirv_to_nir.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/compiler/spirv/spirv_to_nir.c

[Mesa-dev] [PATCH 2/8] nir/copy_prop: Respect the source's number of components

Because we suddenly have to know how many components each source has, this makes the pass a bit more complicated. Fortunately, copy propagation is the only pass that cares about the number of components are read by any given source so it's fairly contained. Shader-db results on Sky Lake:

[Mesa-dev] [PATCH 8/8] nir/validate: Validate that bit sizes and components always match

--- src/compiler/nir/nir_validate.c | 101 +--- 1 file changed, 63 insertions(+), 38 deletions(-) diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c index 15ba65f..16efcb2 100644 --- a/src/compiler/nir/nir_validate.c +++

[Mesa-dev] [PATCH 5/8] anv/apply_dynamic_offsets: Only use one channel for computed offsets

The offset source of the UBO and SSBO intrinsics is only one channel. --- src/intel/vulkan/anv_nir_apply_dynamic_offsets.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_nir_apply_dynamic_offsets.c b/src/intel/vulkan/anv_nir_apply_dynamic_offsets.c

[Mesa-dev] [PATCH 4/8] nir/lower_tex: Use tex_instr_dest_size for txs destinations

Using coord_components of the source texture is correct for everything except cube maps where it's off by one. --- src/compiler/nir/nir_lower_tex.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index

[Mesa-dev] [PATCH] anv/blorp: Only set a clear color for resolves if fast-cleared

Cc: "17.0" --- src/intel/vulkan/anv_blorp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index d79c5e0..72a5980 100644 --- a/src/intel/vulkan/anv_blorp.c +++

Re: [Mesa-dev] [PATCH v3 24/24] docs: mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as supported by i965/gen7+

Samuel Iglesias Gonsálvez writes: > Signed-off-by: Samuel Iglesias Gonsálvez Acked-by: Francisco Jerez > --- > docs/features.txt | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/docs/features.txt

Re: [Mesa-dev] [PATCH v3 23/24] i965: enable OpenGL 4.0 to Ivybridge/Baytrail

Samuel Iglesias Gonsálvez writes: > Signed-off-by: Samuel Iglesias Gonsálvez Reviewed-by: Francisco Jerez > --- > src/mesa/drivers/dri/i965/intel_extensions.c | 2 ++ > src/mesa/drivers/dri/i965/intel_screen.c | 6 --

Re: [Mesa-dev] [PATCH v3 22/24] i965: enable ARB_gpu_shader_fp64 for Ivybridge/Baytrail

Samuel Iglesias Gonsálvez writes: > Signed-off-by: Samuel Iglesias Gonsálvez Reviewed-by: Francisco Jerez > --- > src/mesa/drivers/dri/i965/intel_extensions.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff

Re: [Mesa-dev] [PATCH v3 21/24] i965: Use correct VertStride on align16 instructions.

Samuel Iglesias Gonsálvez writes: > From: Matt Turner > > In commit c35fa7a, we changed the "width" of DF source registers to 2, > which is conceptually fine. Unfortunately a VertStride of 2 is not > allowed by align16 instructions on IVB/BYT, and the

[Mesa-dev] [Bug 100049] "ralloc: Make sure ralloc() allocations match malloc()'s alignment." causes seg fault in 32bit build

https://bugs.freedesktop.org/show_bug.cgi?id=100049 --- Comment #1 from Grazvydas Ignotas --- Patch sent: https://patchwork.freedesktop.org/patch/142123/ -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the

[Mesa-dev] [PATCH] ralloc: don't leave out the alignment factor

Experimentation shows that without alignment factor gcc and clang choose a factor of 16 even on IA-32, which doesn't match what malloc() uses (8). The problem is it makes gcc assume the pointer is 16 byte aligned, so with -O3 it starts using aligned SSE instructions that later fault, so always

Re: [Mesa-dev] [PATCH v3 19/24] i965/vec4: fix SIMD-with lowering for CMP/MOV instructions with conditional modifiers

Samuel Iglesias Gonsálvez writes: > From: "Juan A. Suarez Romero" > > When splitting a CMP/MOV instruction with NULL dest, DF sources, and > conditional modifier; we can't use directly the flag registers, as they will > have the wrong results in

Re: [Mesa-dev] [PATCH v3 20/24] i965/vec4: Fix exec size for MOVs SET_{HIGH, LOW}_32BIT.

Samuel Iglesias Gonsálvez writes: > From: Matt Turner > > Otherwise for a pack_double_2x32_split opcode, we emit: > >vec1 64 ssa_135 = pack_double_2x32_split ssa_133, ssa_134 > mov(8) g5<1>UD g5<4>.xUD {

Re: [Mesa-dev] [PATCH v3 18/24] i965/vec4: adapt setup_imm_df() to allow inserting instructions before another one

Samuel Iglesias Gonsálvez writes: > Add a new setup_imm_df() that allows the insertion of the instructions > before another one. This will be used in the lowering passes for DF > instructions. > > v2: > - Adapt emission of DIM instruction too. > > Signed-off-by: Samuel

Re: [Mesa-dev] [PATCH v3 17/24] i965/vec4: consider subregister offset in live variables

Samuel Iglesias Gonsálvez writes: > From: "Juan A. Suarez Romero" > > Take into account offset values less than a full register (32 bytes) > when getting the var from register. > > This is required when dealing with an operation that writes half of the

Re: [Mesa-dev] [PATCH v3 16/24] i965/vec4: fix SIMD-width lowering for VEC4_OPCODE_FROM_DOUBLE in IVB/BYT

Samuel Iglesias Gonsálvez writes: > From: "Juan A. Suarez Romero" > > When splitting VEC4_OPCODE_FROM_DOUBLE in Ivybridge/Baytrail, the second > part should use a temporal register, and then move the values to the > second half of the original

Re: [Mesa-dev] [PATCH v3 15/24] i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYT

Samuel Iglesias Gonsálvez writes: > From: "Juan A. Suarez Romero" > > In the generator we must generate slightly different code for > Ivybridge/Baytrail, because of the way the stride works in > this hardware. > --- >

Re: [Mesa-dev] [PATCH v3 14/24] i965/vec4: keep original type when dealing with null registers

Samuel Iglesias Gonsálvez writes: > From: "Juan A. Suarez Romero" > > Keep the original type when dealing with null registers. Specially s/specially/especially/ here and below. > because we do no want to introduce an implicit conversion between >

Re: [Mesa-dev] [PATCH v3 13/24] i965/vec4: split DF instructions and later double its execsize in IVB/BYT

Samuel Iglesias Gonsálvez writes: > We need to split DF instructions in two on IVB/BYT as it needs an > execsize 8 to process 4 DF values (one GRF in total). > > v2: > - Rename helper and make it static inline function (Matt). > - Fix indention and add braces (Matt). > >

Re: [Mesa-dev] [PATCH V2] util/disk_cache: support caches for multiple architectures

On 03/03/17 23:27, Grazvydas Ignotas wrote: On Fri, Mar 3, 2017 at 5:27 AM, Timothy Arceri wrote: Previously we were deleting the entire cache if a user switched between 32 and 64 bit applications. V2: make the check more generic, it should now work with any platform

Re: [Mesa-dev] [PATCH 1/2] util/disk_cache: support caches for multiple architectures

On 04/03/17 04:05, Alan Swanson wrote: On Fri, 2017-03-03 at 12:24 +1100, Timothy Arceri wrote: On 03/03/17 11:53, Marek Olšák wrote: OK. I also wonder if 1GB isn't too conservative. Today’s games take up a lot of space. My installed games occupy 480 GB. I could certainly spare 10 GB for a

Re: [Mesa-dev] [PATCH v3 07/24] i965/fs: generalize the legalization d2x pass

Samuel Iglesias Gonsálvez writes: > Add support to SEL instruction and add an assert to detect unsupported > instructions than do d2x conversions. > > Signed-off-by: Samuel Iglesias Gonsálvez > --- > > Curro, this patch legalizes SEL instruction too.

Re: [Mesa-dev] [PATCH RFC] clover: clone pipe-resource if root-buffer already exists

Jan Vesely writes: > Fixes cl-api-enqueue-read_write-buffer on carrizo+topaz machine > > Signed-off-by: Jan Vesely > --- > I'm not sure if cloning is the right thigh to do. > Should we copy the pointer and increase ref count instead? > > PS: the

[Mesa-dev] [PATCH] i965: Rename brw_format_for_mesa_format() to brw_isl_format_for_mesa_format()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp.c| 2 +- src/mesa/drivers/dri/i965/brw_context.c | 2 +- src/mesa/drivers/dri/i965/brw_meta_util.c| 2 +- src/mesa/drivers/dri/i965/brw_state.h| 2 +-

Re: [Mesa-dev] [PATCH] nir/builder: Add an int46 immediate helper

with s/int46/int64/, Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] nir/int64: Properly handle imod/irem

Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: Clamp texture buffer size to GL_MAX_TEXTURE_BUFFER_SIZE.

On Fri, Mar 3, 2017 at 11:32 AM, Kenneth Graunke wrote: > The OpenGL 4.5 specification's description of TexBuffer says: > > "The number of texels in the texture image is then clamped to an > implementation-dependent limit, the value of MAX_TEXTURE_BUFFER_SIZE." > > We set

Re: [Mesa-dev] [PATCH v2 0/5] swr: geometry shaders

Maybe a little cleaner working on the relnotes: “Geometry shaders on on swr”; perhaps “Geometry shaders enabled on swr”? With that… Reviewed-by: Bruce Cherniak > On Mar 3, 2017, at 2:24 PM, Tim Rowley wrote: > > This patch set implements

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

On Fri, Mar 3, 2017 at 11:41 AM, Emil Velikov wrote: > On 3 March 2017 at 18:42, Mauro Rossi wrote: > >> ok .. now I got some fixes for this here: > >> > >> https://github.com/tpalli/external-mesa/commits/move_compiler > >> > >> but yeah .. more

Re: [Mesa-dev] [PATCH 1/4] configure.ac: increase required swr llvm to 3.9.0

> On Mar 3, 2017, at 5:55 AM, Emil Velikov wrote: > > On 3 March 2017 at 01:16, Tim Rowley wrote: >> GS implementation uses the masked.{gather,store} intrinsics, >> introduced in llvm-3.9.0. > > Please mention in the commit message that

Re: [Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

On Fri, Mar 3, 2017 at 11:41 AM, Ilia Mirkin wrote: > On Fri, Mar 3, 2017 at 2:16 PM, Jason Ekstrand > wrote: > > Hey Elie! > > > > On Fri, Mar 3, 2017 at 8:22 AM, Elie Tournier > > wrote: > >> > >> From: Elie Tournier

[Mesa-dev] [PATCH v2 4/5] docs: update features.txt for swr geometry shaders

--- docs/features.txt | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/docs/features.txt b/docs/features.txt index 67d177d..df1860d 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -78,18 +78,18 @@ GL 3.1, GLSL 1.40 --- all DONE: freedreno, i965,

[Mesa-dev] [PATCH v2 5/5] relnotes: [swr] note addition of gs, increased llvm requirement

--- docs/relnotes/17.1.0.html | 4 1 file changed, 4 insertions(+) diff --git a/docs/relnotes/17.1.0.html b/docs/relnotes/17.1.0.html index 9ababcc..3678173 100644 --- a/docs/relnotes/17.1.0.html +++ b/docs/relnotes/17.1.0.html @@ -47,6 +47,7 @@ Note: some of the new features are only

[Mesa-dev] [PATCH v2 1/5] configure.ac: increase required swr llvm to 3.9.0

GS implementation uses the masked.{gather,store} intrinsics, introduced in llvm-3.9.0. swr llvm version requirement in automake and scons now match (scons already needed >= 3.9). --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac

[Mesa-dev] [PATCH v2 3/5] swr: [rasterizer core] fix primID provoking vertex for GS

--- src/gallium/drivers/swr/rasterizer/core/frontend.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp index c150c51..18728e5 100644 ---

[Mesa-dev] [PATCH v2 2/5] swr: implement geometry shaders

--- src/gallium/drivers/swr/swr_context.cpp| 2 +- src/gallium/drivers/swr/swr_context.h | 26 +- src/gallium/drivers/swr/swr_draw.cpp | 50 +-- src/gallium/drivers/swr/swr_fence_work.cpp | 21 ++ src/gallium/drivers/swr/swr_fence_work.h | 3 +

[Mesa-dev] [PATCH v2 0/5] swr: geometry shaders

This patch set implements geometry shaders for the swr driver. Probably still some problems (some hidden by tranform feedback bugs), but an additional 1719 piglit tests pass, and the VTK tests using geometry shaders now pass. v2: * swr: remove SWR_NEW_ALL, make new vs dirty gs state *

Re: [Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

On Fri, Mar 3, 2017 at 2:16 PM, Jason Ekstrand wrote: > Hey Elie! > > On Fri, Mar 3, 2017 at 8:22 AM, Elie Tournier > wrote: >> >> From: Elie Tournier >> >> This series is based on Ian's work about

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

On 3 March 2017 at 18:42, Mauro Rossi wrote: >> ok .. now I got some fixes for this here: >> >> https://github.com/tpalli/external-mesa/commits/move_compiler >> >> but yeah .. more work required :/ I don't understand why adding >> MESA_GEN_GLSL_H to LOCAL_GENERATED_SOURCES

Re: [Mesa-dev] [PATCH] EGL/Android: Add EGL_EXT_buffer_age extension

On 3 March 2017 at 08:30, Tapani Pälli wrote: > As discussed offline, this passes all dEQP tests for the extension on > Android-IA (let's add this to commit message when pushing). > > Reviewed-by: Tapani Pälli > Ok Let's land this. Kalyan promised

Re: [Mesa-dev] [PATCH v2] gallium/targets: don't leave an empty target directory(ies)

Reviewed-by: Matt Turner Thanks Emil! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Clamp texture buffer size to GL_MAX_TEXTURE_BUFFER_SIZE.

The OpenGL 4.5 specification's description of TexBuffer says: "The number of texels in the texture image is then clamped to an implementation-dependent limit, the value of MAX_TEXTURE_BUFFER_SIZE." We set GL_MAX_TEXTURE_BUFFER_SIZE to 2^27. For buffers with a byte element size, this is the

[Mesa-dev] [PATCH v2] gallium/targets: don't leave an empty target directory(ies)

Some drivers do not support certain targets - for example nouveau doesn't do VAAPI, while freedreno doesn't do of the video backends. As such if we enter vdpau when building freedreno/ilo/etc, a vdpau/ folder will be created, empty library will be build and almost immediately removed. Thus

Re: [Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

One other comment. I'm not sure if you've seen it but, if you haven't, you should check out what Connor and the Igalia guys already did for NIR: https://cgit.freedesktop.org/mesa/mesa/tree/src/compiler/nir/nir_lower_double_ops.c It's not full soft-float but there's some very nice algorithms in

Re: [Mesa-dev] [PATCH] genxml: Depend on Makefile.am for generated sources.

On 2 March 2017 at 19:06, Matt Turner wrote: > Depending on the generated Makefile means that all generated sources are > recreated after ./configure. > --- > src/intel/Makefile.genxml.am | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git

Re: [Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

Hey Elie! On Fri, Mar 3, 2017 at 8:22 AM, Elie Tournier wrote: > From: Elie Tournier > > This series is based on Ian's work about GL_ARB_gpu_shader_int64 [1]. > The goal is to expose GL_ARB_shader_fp64 to OpenGL 3.0 GPUs. > > Each function

Re: [Mesa-dev] [RFC 07/11] glsl: Add "built-in" functions to do mul(fp64, fp64)

On Fri, Mar 3, 2017 at 10:51 AM, tournier.elie wrote: > On 3 March 2017 at 17:46, Eric Engestrom wrote: >> On Friday, 2017-03-03 16:23:03 +, Elie Tournier wrote: >>> Signed-off-by: Elie Tournier >>> --- >>>

Re: [Mesa-dev] [PATCH] android: fix outdir for gen_enum_to_str files

2017-03-03 11:52 GMT+01:00 Tapani Pälli : > when files are being generated the value of $intermediates var content can be > completely random, this makes sure that outdir is the wanted one. The value of intermediates variable is local to the module and is set at the line:

Re: [Mesa-dev] [RFC 07/11] glsl: Add "built-in" functions to do mul(fp64, fp64)

On 3 March 2017 at 17:46, Eric Engestrom wrote: > On Friday, 2017-03-03 16:23:03 +, Elie Tournier wrote: >> Signed-off-by: Elie Tournier >> --- >> src/compiler/glsl/builtin_float64.h | 2558 >> +++ >>

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

> ok .. now I got some fixes for this here: > > https://github.com/tpalli/external-mesa/commits/move_compiler > > but yeah .. more work required :/ I don't understand why adding > MESA_GEN_GLSL_H to LOCAL_GENERATED_SOURCES does not help. Hi Emil, Tapani, The problem is just that the

Re: [Mesa-dev] Moving i965 driver to genxml commands and structures

On Friday, March 3, 2017 10:27:51 AM PST Kenneth Graunke wrote: > On Friday, March 3, 2017 10:16:57 AM PST Jason Ekstrand wrote: > > Also, you can find most of the gen4-5 XML here: > > > > https://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/blorp-gen4 > > > > That should save you some

Re: [Mesa-dev] Moving i965 driver to genxml commands and structures

On Friday, March 3, 2017 10:16:57 AM PST Jason Ekstrand wrote: > Also, you can find most of the gen4-5 XML here: > > https://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/blorp-gen4 > > That should save you some typing. :-) I typed up Gen4-4.5 XML a few months ago, and Jason fixed a bunch of

Re: [Mesa-dev] Moving i965 driver to genxml commands and structures

Also, you can find most of the gen4-5 XML here: https://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/blorp-gen4 That should save you some typing. :-) On Fri, Mar 3, 2017 at 8:57 AM, Jason Ekstrand wrote: > Lois-Francis, > > Thanks for taking a crack at this! There

Re: [Mesa-dev] [PATCH 1/2] util/disk_cache: support caches for multiple architectures

On Fri, 2017-03-03 at 12:24 +1100, Timothy Arceri wrote: > On 03/03/17 11:53, Marek Olšák wrote: > > > > OK. > > > > I also wonder if 1GB isn't too conservative. Today’s games take up > > a > > lot of space. My installed games occupy 480 GB. I could certainly > > spare 10 GB for a shader cache

Re: [Mesa-dev] [RFC 07/11] glsl: Add "built-in" functions to do mul(fp64, fp64)

On Friday, 2017-03-03 16:23:03 +, Elie Tournier wrote: > Signed-off-by: Elie Tournier > --- > src/compiler/glsl/builtin_float64.h | 2558 > +++ > src/compiler/glsl/builtin_functions.cpp |4 + >

Re: [Mesa-dev] Any updates on threaded GL dispatch?

On Fri, 3 Mar 2017 16:46:24 +0100 Marek Olšák wrote: > On Fri, Mar 3, 2017 at 10:19 AM, Timothy Arceri wrote: > > On 02/03/17 22:18, Marek Olšák wrote: > >> > >> The bad news is my involvement is currently on hold due to other > >> projects and

Re: [Mesa-dev] [RFC 02/11] glsl: Add "built-in" function to do neg(fp64)

On Fri, Mar 3, 2017 at 11:57 AM, tournier.elie wrote: > On 3 March 2017 at 16:29, Ilia Mirkin wrote: >> On Fri, Mar 3, 2017 at 11:22 AM, Elie Tournier >> wrote: >>> Signed-off-by: Elie Tournier

Re: [Mesa-dev] Moving i965 driver to genxml commands and structures

Lois-Francis, Thanks for taking a crack at this! There are a couple other people (I put them in the Cc) who have talked about doing this so thank you for sending the announcement! My primary request as you dive into this would be that you do things in such a way that we can have a fairly

Re: [Mesa-dev] [RFC 02/11] glsl: Add "built-in" function to do neg(fp64)

On 3 March 2017 at 16:29, Ilia Mirkin wrote: > On Fri, Mar 3, 2017 at 11:22 AM, Elie Tournier > wrote: >> Signed-off-by: Elie Tournier >> --- >> src/compiler/glsl/builtin_float64.h | 19 +++ >>

Re: [Mesa-dev] [PATCH 2/4] swr: implement geometry shaders

Set looks great with a couple suggestions: * In swr_update_derived() it seems like the GS should also depend on SWR_NEW_VS dirty since swr_generate_gs_key() references ctx->vs->info.base. *In swr_context.h the SWR_NEW_ALL mask should be expanded by 2-bits to account for the new dirty flags.

Re: [Mesa-dev] [RFC 02/11] glsl: Add "built-in" function to do neg(fp64)

On Fri, Mar 3, 2017 at 11:22 AM, Elie Tournier wrote: > Signed-off-by: Elie Tournier > --- > src/compiler/glsl/builtin_float64.h | 19 +++ > src/compiler/glsl/builtin_functions.cpp | 4 >

[Mesa-dev] [RFC 10/11] glsl: Add "built-in" functions to do fp64_to_fp32(fp64)

Signed-off-by: Elie Tournier --- src/compiler/glsl/builtin_float64.h | 589 src/compiler/glsl/builtin_functions.cpp | 4 + src/compiler/glsl/builtin_functions.h | 3 + src/compiler/glsl/float64.glsl | 133

[Mesa-dev] [RFC 11/11] glsl: Add fp64 functions to the parser.

Like we use two integers to store our fp64, the functions are available with MESA_shader_integer_functions. Signed-off-by: Elie Tournier --- src/compiler/glsl/glcpp/glcpp-parse.y | 10 ++ 1 file changed, 10 insertions(+) diff --git

Re: [Mesa-dev] [PATCH v3] i965: Add script to gen code for OA counter queries

On 2 March 2017 at 21:25, Robert Bragg wrote: > > > On Mar 2, 2017 7:32 PM, "Emil Velikov" wrote: > > On 2 March 2017 at 18:58, Robert Bragg wrote: >> Adds R/b from Dylan and Makefile fixups from Emil, including fixing race

[Mesa-dev] [RFC 02/11] glsl: Add "built-in" function to do neg(fp64)

Signed-off-by: Elie Tournier --- src/compiler/glsl/builtin_float64.h | 19 +++ src/compiler/glsl/builtin_functions.cpp | 4 src/compiler/glsl/builtin_functions.h | 3 +++ src/compiler/glsl/float64.glsl | 10 ++ 4 files

[Mesa-dev] [RFC 04/11] glsl: Add "built-in" functions to do le(fp64, fp64)

Signed-off-by: Elie Tournier --- src/compiler/glsl/builtin_float64.h | 179 src/compiler/glsl/builtin_functions.cpp | 4 + src/compiler/glsl/builtin_functions.h | 3 + src/compiler/glsl/float64.glsl | 52 ++

[Mesa-dev] [RFC 03/11] glsl: Add "built-in" functions to do eq(fp64, fp64)

Signed-off-by: Elie Tournier --- src/compiler/glsl/builtin_float64.h | 119 src/compiler/glsl/builtin_functions.cpp | 4 ++ src/compiler/glsl/builtin_functions.h | 3 + src/compiler/glsl/float64.glsl | 41

[Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

From: Elie Tournier This series is based on Ian's work about GL_ARB_gpu_shader_int64 [1]. The goal is to expose GL_ARB_shader_fp64 to OpenGL 3.0 GPUs. Each function can be independently tested using shader_runner from piglit. The piglit files are stored on github

[Mesa-dev] [RFC 09/11] glsl: Add "built-in" functions to do fp32_to_fp64(fp32)

Signed-off-by: Elie Tournier --- src/compiler/glsl/builtin_float64.h | 490 src/compiler/glsl/builtin_functions.cpp | 4 + src/compiler/glsl/builtin_functions.h | 3 + src/compiler/glsl/float64.glsl | 77 + 4

[Mesa-dev] [RFC 05/11] glsl: Add "built-in" functions to do lt(fp64, fp64)

Signed-off-by: Elie Tournier --- src/compiler/glsl/builtin_float64.h | 161 src/compiler/glsl/builtin_functions.cpp | 4 + src/compiler/glsl/builtin_functions.h | 3 + src/compiler/glsl/float64.glsl | 45 +

[Mesa-dev] [RFC 01/11] glsl: Add "built-in" function to do abs(fp64)

Signed-off-by: Elie Tournier --- src/compiler/Makefile.sources | 1 + src/compiler/glsl/builtin_float64.h | 19 +++ src/compiler/glsl/builtin_functions.cpp | 4 src/compiler/glsl/builtin_functions.h | 3 +++

Re: [Mesa-dev] Any updates on threaded GL dispatch?

On Fri, Mar 3, 2017 at 10:19 AM, Timothy Arceri wrote: > On 02/03/17 22:18, Marek Olšák wrote: >> >> The bad news is my involvement is currently on hold due to other >> projects and responsibilities. > > > I can probably spend some time on this. Seems like Gregory has taken

Re: [Mesa-dev] [RFC PATCH 0/7] gallium: Video postprocessor rework

So after an off-line chat with Christian we decided to drop this series, since I don't have the cycles to fix this up. For completeness, if anybody decides at some point to (re)use some of the code, some comments below. On 03/03/2017 01:32 PM, Christian König wrote: > Hi Thomas, > > Am

[Mesa-dev] Moving i965 driver to genxml commands and structures

Hi, As to avoid any duplicate work, I want to inform everyone that I'm in the process of modifying the i965 driver so that it uses the same genxml infrastructure that the one used by the Intel Vulkan driver. The task has been proposed by Jason Ekstrand.  I will probably post my first patchset

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

On 3 March 2017 at 11:50, Tapani Pälli wrote: > > > On 03/03/2017 01:30 PM, Tapani Pälli wrote: >> >> >> >> On 03/03/2017 01:21 PM, Tapani Pälli wrote: >>> >>> >>> >>> On 03/02/2017 03:41 PM, Emil Velikov wrote: Cc: Mauro Rossi Cc:

[Mesa-dev] [Bug 100049] "ralloc: Make sure ralloc() allocations match malloc()'s alignment." causes seg fault in 32bit build

https://bugs.freedesktop.org/show_bug.cgi?id=100049 Bug ID: 100049 Summary: "ralloc: Make sure ralloc() allocations match malloc()'s alignment." causes seg fault in 32bit build Product: Mesa Version: git Hardware: Other

Re: [Mesa-dev] [PATCH] android: fix outdir for gen_enum_to_str files

On Friday, 2017-03-03 12:52:56 +0200, Tapani Pälli wrote: > when files are being generated the value of $intermediates var content can be > completely random, this makes sure that outdir is the wanted one. > > Fixes: 3f2cb699 ("android: vulkan: add support for libmesa_vulkan_util") >

Re: [Mesa-dev] [RFC PATCH 0/7] gallium: Video postprocessor rework

Hi Thomas, Am 02.03.2017 um 21:00 schrieb Thomas Hellstrom: This patch series introduces a postprocessor abstraction. It could be promoted to a gallium interface but for now it's implemented as a utility. Well, first of all use a gallium interface for this. Putting this into utility doesn't

Re: [Mesa-dev] [PATCH V2] util/disk_cache: support caches for multiple architectures

On Fri, Mar 3, 2017 at 5:27 AM, Timothy Arceri wrote: > Previously we were deleting the entire cache if a user switched > between 32 and 64 bit applications. > > V2: make the check more generic, it should now work with any > platform we are likely to support. > --- >

Re: [Mesa-dev] [PATCH 1/2] configure.ac: require pthread-stubs only where available

On 2 March 2017 at 19:34, Gary Wong wrote: > On Thu, Mar 02, 2017 at 07:02:44PM +, Emil Velikov wrote: >> Jeremy, others, >> >> Afaict pthread-stubs expands to a simple .pc on your platforms, but a >> confirmation will be greatly appreciated. > > Hurd is not really "my"

Re: [Mesa-dev] [PATCH 1/4] configure.ac: increase required swr llvm to 3.9.0

Hi Tim, On 3 March 2017 at 01:16, Tim Rowley wrote: > GS implementation uses the masked.{gather,store} intrinsics, > introduced in llvm-3.9.0. Please mention in the commit message that the SCons build already requires 3.9 or later. Can you add a note about the LLVM

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

On 03/03/2017 01:30 PM, Tapani Pälli wrote: On 03/03/2017 01:21 PM, Tapani Pälli wrote: On 03/02/2017 03:41 PM, Emil Velikov wrote: Cc: Mauro Rossi Cc: Tapani Pälli Cc: Jason Ekstrand --- All, here is a 5min

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

On 03/03/2017 01:21 PM, Tapani Pälli wrote: On 03/02/2017 03:41 PM, Emil Velikov wrote: Cc: Mauro Rossi Cc: Tapani Pälli Cc: Jason Ekstrand --- All, here is a 5min attempt to fix the Android build. Tapani, Mauro do

Re: [Mesa-dev] [PATCH] fixup! i965: Move the back-end compiler to src/intel/compiler

On 03/02/2017 03:41 PM, Emil Velikov wrote: Cc: Mauro Rossi Cc: Tapani Pälli Cc: Jason Ekstrand --- All, here is a 5min attempt to fix the Android build. Tapani, Mauro do give it a test since I've done an educated

[Mesa-dev] [PATCH] android: fix outdir for gen_enum_to_str files

when files are being generated the value of $intermediates var content can be completely random, this makes sure that outdir is the wanted one. Fixes: 3f2cb699 ("android: vulkan: add support for libmesa_vulkan_util") Signed-off-by: Tapani Pälli --- src/vulkan/Android.mk

Re: [Mesa-dev] [PATCH 1/2] configure.ac: require pthread-stubs only where available

On Thursday, 2017-03-02 19:02:44 +, Emil Velikov wrote: > From: Emil Velikov > > The project is a thing only for BSD platforms. Or in other words - for > any other platforms building/installing pthread-stubs results only in a > pthread-stub.pc file. > > And even

Re: [Mesa-dev] Any updates on threaded GL dispatch?

On 02/03/17 22:18, Marek Olšák wrote: The bad news is my involvement is currently on hold due to other projects and responsibilities. I can probably spend some time on this. Seems like Gregory has taken care of most of the problems and it just needs someone to push it over the line. Tim

[Mesa-dev] [Bug 99987] Mesa 13+ breaks Xvnc (and similar X servers)

https://bugs.freedesktop.org/show_bug.cgi?id=99987 --- Comment #5 from Pierre Ossman --- The analysis on bug 99027 seems to be only about why it is crashing, and not why Mesa has changed its requirements on the X server. There is some talk about 8 bit depth, but the issue

Re: [Mesa-dev] [PATCH] EGL/Android: Add EGL_EXT_buffer_age extension

As discussed offline, this passes all dEQP tests for the extension on Android-IA (let's add this to commit message when pushing). Reviewed-by: Tapani Pälli On 02/08/2017 04:46 AM, Xiaosong Wei wrote: This patch implements the EGL_EXT_buffer_age extension for Android.