Re: [Mesa-dev] [PATCH 11/11] st/va: add config support for 10bit decoding

Replaying here from the comment in your other mail as well: Um, libav* is querying the capabilities and finding that only 8-bit output is supported for Main10: [SNIP] Unable to create config to test surface attributes: 14 (the requested RT Format is not supported) [SNIP] So, it works

Re: [Mesa-dev] [PATCH v3 16/24] i965/vec4: fix SIMD-width lowering for VEC4_OPCODE_FROM_DOUBLE in IVB/BYT

On 08/03/17 20:30, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> On 07/03/17 22:24, Francisco Jerez wrote: >>> Samuel Iglesias Gonsálvez writes: >>> On 04/03/17 01:04, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez

Re: [Mesa-dev] [PATCH] i965: Improve conditional rendering in fallback paths.

On Thursday, March 2, 2017 12:24:07 AM PST Chris Wilson wrote: > On Thu, Mar 02, 2017 at 12:06:00AM -0800, Kenneth Graunke wrote: > > We need to fall back in a couple of cases: > > - Sandybridge (it just doesn't do this in hardware) > > - Occlusion queries on Gen7-7.5 with command parser version <

Re: [Mesa-dev] [PATCH] i965: Rename brw_format_for_mesa_format() to brw_isl_format_for_mesa_format()

On Sat, Mar 04, 2017 at 07:44:17AM -0800, Jason Ekstrand wrote: > Hopefully, this doesn't conflict too badly with what Topi is doing. If not, Oh, sorry, almost forgot to reply, This is fine by me. It is easy rebase if not even that. > > Reviewed-by: Jason Ekstrand > >

Re: [Mesa-dev] [PATCH 00/16] anv: Handle out of memory situations better

On Thu, Mar 09, 2017 at 08:04:29AM +0100, Iago Toral wrote: > On Wed, 2017-03-08 at 15:00 -0800, Jason Ekstrand wrote: > > On Wed, Mar 8, 2017 at 12:24 AM, Iago Toral > > wrote: > > > On Tue, 2017-03-07 at 10:31 +0200, Pohjolainen, Topi wrote: > > > > On Tue, Mar 07, 2017 at

Re: [Mesa-dev] [PATCH 00/16] anv: Handle out of memory situations better

On Wed, 2017-03-08 at 15:00 -0800, Jason Ekstrand wrote: > On Wed, Mar 8, 2017 at 12:24 AM, Iago Toral > wrote: > > On Tue, 2017-03-07 at 10:31 +0200, Pohjolainen, Topi wrote: > > > On Tue, Mar 07, 2017 at 08:15:45AM +0100, Iago Toral Quiroga > > wrote: > > > > > > > > There

Re: [Mesa-dev] [PATCH v2] glsl: builtin: always return clones of the builtins

On Wednesday, March 8, 2017 1:15:04 PM PST Lionel Landwerlin wrote: > Builtins are created once and allocated using their own private ralloc > context. When reparenting IR that includes builtins, we might be steal > bits of builtins. This is problematic because these builtins might now > be freed

Re: [Mesa-dev] merged/mega *_dri.so files?

On Wed, Mar 8, 2017 at 8:29 PM, Brian Paul wrote: > > I just noticed something: > > $ ls -l lib/*_dri.so > -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/i915_dri.so* > -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/i965_dri.so* > -rwxr-xr-x 8 brianp users 43779971

Re: [Mesa-dev] [PATCH 1/6] nir/validate: Validate ALU bit-size rules

We already try to validate these rules in validate_alu_src() and validate_alu_dest(), but it seems like we don't handle the case where the sources are unsized but the destination isn't -- we don't currently check that the source's sizes match each other. Maybe delete that code at the same time and

Re: [Mesa-dev] merged/mega *_dri.so files?

On 09/03/17 01:29 PM, Brian Paul wrote: > > I just noticed something: > > $ ls -l lib/*_dri.so > -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/i915_dri.so* > -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/i965_dri.so* > -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59

Re: [Mesa-dev] [PATCH 0/8] nir: Require numbers of components to always match

I agree that this is a good idea. For the series: Reviewed-by: Connor Abbott On Fri, Mar 3, 2017 at 8:12 PM, Jason Ekstrand wrote: > When NIR was first created, we were a bit lazy about numbers of components. > The rule was that a source couldn't

[Mesa-dev] [Bug 100133] swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive]

https://bugs.freedesktop.org/show_bug.cgi?id=100133 Vinson Lee changed: What|Removed |Added Resolution|--- |FIXED

[Mesa-dev] [Bug 99987] Mesa 13+ breaks Xvnc (and similar X servers)

https://bugs.freedesktop.org/show_bug.cgi?id=99987 --- Comment #6 from Norman Gaywood --- On Fedora under x2go, updated to libepoxy-1.4.1-1.fc25.x86_64 and the segfaults have gone away in xfce4-terminal and gnome-terminal However, with mesa-libGL-13.0.4-1.fc25.x86_64,

Re: [Mesa-dev] [PATCH 00/17] Move i965 compiler to src/intel/

On 03/08/2017 07:15 PM, Emil Velikov wrote: Hi all, Here is a re-spin of the earlier work by Jason. There were a changes throughout, with most notable of which: - rad actually builds ;-) - all the compiler files are now moved - a bunch of dead includes are removed, making the compiler <>

Re: [Mesa-dev] [PATCH 0/8] nir: Require numbers of components to always match

On Friday, March 3, 2017 5:12:24 PM PST Jason Ekstrand wrote: > When NIR was first created, we were a bit lazy about numbers of components. > The rule was that a source couldn't consume more components than the thing > it was reading from. However, this leads to a lot of confusion because you >

[Mesa-dev] [RFC v2 3/3] gk110/ir: Use the new rcp/rsq in library

Signed-off-by: Boyan Ding --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 32 ++ .../nouveau/codegen/nv50_ir_lowering_nvc0.h| 1 + 2 files changed, 33 insertions(+) diff --git

[Mesa-dev] [RFC v2 0/3] More precise rcp and rsq for fp64 on gk110

This is the second version of fp64 precision series, including fixes as per Ilia's advice. The first patch should be functionally equivalent to the previous version. Changes mostly focuses on code cleanup and rewording comments. The second patch fixes a case where the original patch would

[Mesa-dev] [RFC v2 2/3] gk110/ir: Add rsq f64 implementation

Signed-off-by: Boyan Ding --- src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 69 +- .../drivers/nouveau/codegen/lib/gk110.asm.h| 42 - 2 files changed, 109 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [RFC v2 1/3] gk110/ir: Add rcp f64 implementation

Signed-off-by: Boyan Ding --- src/gallium/drivers/nouveau/codegen/lib/gk110.asm | 152 - .../drivers/nouveau/codegen/lib/gk110.asm.h| 87 +++- 2 files changed, 235 insertions(+), 4 deletions(-) diff --git

[Mesa-dev] [Bug 100120] Mesa fails to build with gcc address sanitizer (-fsanitize=address -lasan)

https://bugs.freedesktop.org/show_bug.cgi?id=100120 --- Comment #2 from Hi-Angel --- FWIW, build with CFLAGS="-fsanitize=address" CXXFLAGS="-fsanitize=address" LIBS="-ldl -lasan" ./autogen.sh CC="gcc -m32" CXX="g++ -m32" --build=x86_64-pc-linux-gnu

[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

https://bugs.freedesktop.org/show_bug.cgi?id=99856 Jan Vesely changed: What|Removed |Added Attachment #129929|0 |1 is

[Mesa-dev] merged/mega *_dri.so files?

I just noticed something: $ ls -l lib/*_dri.so -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/i915_dri.so* -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/i965_dri.so* -rwxr-xr-x 8 brianp users 43779971 Mar 8 20:59 lib/nouveau_vieux_dri.so* -rwxr-xr-x 8 brianp users 43779971 Mar 8

[Mesa-dev] [Bug 98714] Weird whitish spots and green stuff mostly on black.

https://bugs.freedesktop.org/show_bug.cgi?id=98714 --- Comment #6 from Mathieu Belanger --- Seam to be fixed now, Display is now fine in Talos since about a week. Someone can confirm? I close? @langk...@tomblog.de -- You are receiving this mail because: You are the assignee

[Mesa-dev] [Bug 100091] Failure to create folder for on-disk shader cache

https://bugs.freedesktop.org/show_bug.cgi?id=100091 --- Comment #18 from John --- (In reply to Emil Velikov from comment #16) > Some ideas: > - a non-timestamp better solution might be applicable/in the works > (guessing here) A simple workaround would be to use a

[Mesa-dev] [PATCH 6/8] radv: Only flush for the needed stages, and before the flushes.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5d4236ca187..274495f134f 100644 ---

[Mesa-dev] [PATCH 4/8] radv: Flush more caches after writes.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 8c812084141..a1127130a5d 100644 ---

[Mesa-dev] [PATCH 8/8] radv: Don't flush the CB before doing a fast clear eliminate.

The only way we write CMASK/DCC compressed textures through shaders is fast clears and CMASK/DCC inits, which have their own flushes. Hence the CB cache is always up to date. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_meta_fast_clear.c | 2 -- 1 file changed, 2

[Mesa-dev] [PATCH 7/8] radv: Don't emit cache flushes on subpass switch.

I think we should only flush right before an action (draw/dispatch etc.), as otherwise it is too easy to issue redundant flushes. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 4 src/amd/vulkan/radv_meta_fast_clear.c | 1 -

[Mesa-dev] [PATCH 5/8] radv: Don't invalidate CB/DB for images that aren't modified outside CB/DB.

Without storaes, the only writes are fast clears, transfers and metadata initialization, each of which have the appropiate invalidations already. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 28 +++- 1 file changed, 19

[Mesa-dev] [PATCH 1/8] radv: Determine cache flushes per object.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 36 +++- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5b44ce84529..07d0a0c2c12

[Mesa-dev] [PATCH 2/8] radv: Invalidate the correct caches for CB/DB dst barriers.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 07d0a0c2c12..088a3c9025c 100644 ---

Re: [Mesa-dev] [PATCH 0/8] nir: Require numbers of components to always match

On Wed, Mar 8, 2017 at 4:56 PM, Eric Anholt wrote: > Jason Ekstrand writes: > > > When NIR was first created, we were a bit lazy about numbers of > components. > > The rule was that a source couldn't consume more components than the > thing > > it was

Re: [Mesa-dev] [PATCH 0/8] nir: Require numbers of components to always match

Jason Ekstrand writes: > When NIR was first created, we were a bit lazy about numbers of components. > The rule was that a source couldn't consume more components than the thing > it was reading from. However, this leads to a lot of confusion because you > now have a thing

[Mesa-dev] [Bug 100037] [vmwgfx] Invalid SVGA3D command: 1202

https://bugs.freedesktop.org/show_bug.cgi?id=100037 --- Comment #4 from Grief --- Hello Deepak, The issue still reproduces but the message is gone. I definetely saw it every time after that crash happened but it seems that after one of frequent KDE neon updates the message

[Mesa-dev] [PATCH 1/2] util/disk_cache: fix compressed size calculation

It incorrectly doubles the size on each iteration. Fixes: 85a9b1b5 "util/disk_cache: compress individual cache entries" Signed-off-by: Grazvydas Ignotas --- src/util/disk_cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/util/disk_cache.c

[Mesa-dev] [PATCH 2/2] util/disk_cache: fix size subtraction on 32bit

Negating size_t on 32bit produces a 32bit result. This was effectively adding values close to UINT_MAX to the cache size (the files are usually small) instead of intended subtraction. Fixes 'make check' disk_cache failures on 32bit. Signed-off-by: Grazvydas Ignotas ---

[Mesa-dev] [Bug 100091] Failure to create folder for on-disk shader cache

https://bugs.freedesktop.org/show_bug.cgi?id=100091 --- Comment #17 from Michel Dänzer --- Emil, I don't think there's any mystery anymore given comment 13 — the different cache timestamps are due to *_dri.so and d3dadapter9.so.1.0.0 having different timestamps. (In reply to

[Mesa-dev] [PATCH] mesa/main: clean up sampler lookup functions

Signed-off-by: Samuel Pitoiset --- src/mesa/main/samplerobj.c | 32 1 file changed, 4 insertions(+), 28 deletions(-) diff --git a/src/mesa/main/samplerobj.c b/src/mesa/main/samplerobj.c index c073f4221e..61b73e8905 100644 ---

Re: [Mesa-dev] [PATCH 1/3] anv: Add anv_outarray

On Mon 06 Mar 2017, Jason Ekstrand wrote: > On Mon, Mar 6, 2017 at 10:25 AM, Chad Versace > wrote: > > > anv_outarray is a wrapper for a Vulkan output array. A Vulkan output > > array is one that follows the convention of the parameters to > >

Re: [Mesa-dev] [PATCH 3/8] nir/spirv: Restrict the number of channels in texture coordinates

Jason Ekstrand writes: > Some SPIR-V texturing instructions pack more than the texture coordinate > into the coordinate source. We need to mask off the unused channels. > --- > src/compiler/spirv/spirv_to_nir.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > >

Re: [Mesa-dev] [PATCH 6/6] nir: Rework conversion opcodes

On Wed, Mar 8, 2017 at 4:09 PM, Eric Anholt wrote: > Jason Ekstrand writes: > > > The NIR story on conversion opcodes is a mess. We've had way too many > > of them, naming is inconsistent, and which ones have explicit sizes was > > sort-of random. This

Re: [Mesa-dev] [PATCH 2/8] nir/copy_prop: Respect the source's number of components

Jason Ekstrand writes: > Because we suddenly have to know how many components each source has, > this makes the pass a bit more complicated. Fortunately, copy > propagation is the only pass that cares about the number of components > are read by any given source so it's

Re: [Mesa-dev] [PATCH 4/6] isl: Let isl_surf_init's caller set the exact row pitch

On Wed 08 Mar 2017, Jason Ekstrand wrote: > On Wed, Mar 8, 2017 at 4:16 PM, Chad Versace > wrote: > > > On Mon 06 Mar 2017, Jason Ekstrand wrote: > > > On Mon, Mar 6, 2017 at 10:12 AM, Chad Versace > > > wrote: > > > > > > > The caller does so

Re: [Mesa-dev] [PATCH 5/5] anv: Handle failure in make_hiz_surface_maybe()

On Mon 06 Mar 2017, Jason Ekstrand wrote: > On Mon, Mar 6, 2017 at 10:18 AM, Chad Versace > wrote: > > > make_ccs_surface_maybe() correctly handles failure > > isl_surf_get_ccs_surf(). When it fails, the resultant VkImage is still > > valid, just without a ccs surface.

Re: [Mesa-dev] [PATCH 4/5] anv/image: Refactor creation of aux surfaces

On Mon 06 Mar 2017, Jason Ekstrand wrote: > On Mon, Mar 6, 2017 at 10:18 AM, Chad Versace > wrote: > > > Creation of hiz, ccs, and mcs surfaces was encoded by a giant 'if' tree > > at the tail of make_surface(). This patch extracts that 'if' tree into > > the new

Re: [Mesa-dev] [PATCH 6/6] isl: Drop unused isl_surf_init_info::min_pitch

On Wed, Mar 8, 2017 at 4:05 PM, Chad Versace wrote: > On Mon 06 Mar 2017, Jason Ekstrand wrote: > > why do we sped two patches refactoring/renaming this field just so we can > > delete it? > > There's no good reason... > > How it happened: These patches were written at

Re: [Mesa-dev] [PATCH 4/6] isl: Let isl_surf_init's caller set the exact row pitch

On Wed, Mar 8, 2017 at 4:16 PM, Chad Versace wrote: > On Mon 06 Mar 2017, Jason Ekstrand wrote: > > On Mon, Mar 6, 2017 at 10:12 AM, Chad Versace > > wrote: > > > > > The caller does so by setting the new field > > >

Re: [Mesa-dev] [PATCH 3/5] anv/image: Fix return type of make_surface()

On Mon 06 Mar 2017, Jason Ekstrand wrote: > With modifiers, aren't we going to want to be able to reject an image if > the provide bogus stuff? The current Vulkan spec says that vkCreateImage() only fails due to K_ERROR_OUT_OF_HOST_MEMORY and VK_ERROR_OUT_OF_DEVICE_MEMORY. It never fails due to

Re: [Mesa-dev] [PATCH 1/8] nir/intrinsics: Make load_barycentric_input take a 2-component coor

Jason Ekstrand writes: In the subject: "load_interpolated_input", and "coord" signature.asc Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 4/6] isl: Let isl_surf_init's caller set the exact row pitch

On Mon 06 Mar 2017, Jason Ekstrand wrote: > On Mon, Mar 6, 2017 at 10:12 AM, Chad Versace > wrote: > > > The caller does so by setting the new field > > isl_surf_init_info::row_pitch, which overrides isl's row pitch > > calculation. > > --- > > src/intel/isl/isl.c | 11

Re: [Mesa-dev] [PATCH] swr: s/uint/enum pipe_render_cond_flag/

Reviewed-by: Roland Scheidegger Am 09.03.2017 um 00:06 schrieb Vinson Lee: > Fix build error. > > swr_context.cpp: In function ‘void swr_blit(pipe_context*, const > pipe_blit_info*)’: > swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned > int}’ to

Re: [Mesa-dev] [PATCH 6/6] nir: Rework conversion opcodes

Jason Ekstrand writes: > The NIR story on conversion opcodes is a mess. We've had way too many > of them, naming is inconsistent, and which ones have explicit sizes was > sort-of random. This commit re-organizes things and makes them all > consistent: > > - All non-bool

Re: [Mesa-dev] [PATCH 6/6] isl: Drop unused isl_surf_init_info::min_pitch

On Mon 06 Mar 2017, Jason Ekstrand wrote: > why do we sped two patches refactoring/renaming this field just so we can > delete it? There's no good reason... How it happened: These patches were written at different times, and were non-contiguous in a long-lived branch. I sorted the branch's

[Mesa-dev] [PATCH] nir: Pick just the channels we want for bitmap and drawpixels lowering.

One of the quirks of NIR is that it has allowed SSA references where the reference uses fewer channels than exist in the SSA value, which surprises new developers and makes some analysis harder. Jason is about to remove that quirk and validate that reference num_components == value

[Mesa-dev] [Bug 100037] [vmwgfx] Invalid SVGA3D command: 1202

https://bugs.freedesktop.org/show_bug.cgi?id=100037 --- Comment #3 from Deepak --- I can reproduce the bug but not able seeing the below dmesg: [ 103.849508] [drm:vmw_cmd_dx_destroy_shader [vmwgfx]] *ERROR* Could not find shader to remove. [ 103.849513]

[Mesa-dev] [PATCH v2 1/1] clover: use pipe_resource references

v2: buffers are created with one reference. Signed-off-by: Jan Vesely --- Vedran, can you confirm that this one still fixes the problem? Seems OK on EG. Jan src/gallium/state_trackers/clover/core/resource.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

Re: [Mesa-dev] [PATCH 2/4] util: add u_thread.h

On 09/03/17 02:41, Emil Velikov wrote: Hi Timothy, On 8 March 2017 at 04:36, Timothy Arceri wrote: This is a minimal copy of os_thread.h from gallium in order to move u_queue.{c,h} to this directory. I cannot see a patch which drops the equivalent parts in

Re: [Mesa-dev] [PATCH 5/5] [v2] gbm: Export a per plane getter for offset

I made a few trivial comments (mostly just asking for plane == 0 assertions more places). With that, these 5 are Reviewed-by: Jason Ekstrand On Wed, Mar 8, 2017 at 3:09 PM, Jason Ekstrand wrote: > On Tue, Mar 7, 2017 at 9:31 PM, Ben Widawsky

[Mesa-dev] [PATCH 5/4] gallium/util: replace pipe_thread_create() with u_thread_create()

They do the same thing we are just moving the function to be accessible to all of Mesa. --- src/gallium/auxiliary/os/os_thread.h | 28 +--- src/gallium/drivers/ddebug/dd_context.c | 2 +- src/gallium/drivers/llvmpipe/lp_rast.c | 2 +-

[Mesa-dev] [PATCH 7/4] gallium/util: replace pipe_thread_setname() with u_thread_setname()

They do the same thing we are just moving the function to be accessible to all of Mesa. --- src/gallium/auxiliary/os/os_thread.h | 12 src/gallium/drivers/llvmpipe/lp_rast.c | 2 +- src/gallium/state_trackers/nine/nine_state.c | 4 ++-- 3 files changed, 3

[Mesa-dev] [PATCH 6/4] gallium/util: replace pipe_thread_get_time_nano() with u_thread_get_time_nano()

They do the same thing we are just moving the function to be accessible to all of Mesa. --- src/gallium/auxiliary/os/os_thread.h | 18 +- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/src/gallium/auxiliary/os/os_thread.h b/src/gallium/auxiliary/os/os_thread.h

Re: [Mesa-dev] [PATCH 5/5] [v2] gbm: Export a per plane getter for offset

On Tue, Mar 7, 2017 at 9:31 PM, Ben Widawsky wrote: > Unlike stride, there was no previous offset getter, so it can be right > on the first try. > > v2: Return EINVAL when plane is greater than total planes to make it > match the similar APIs. > Avoid leak after fromPlanar

[Mesa-dev] [PATCH] swr: s/uint/enum pipe_render_cond_flag/

Fix build error. swr_context.cpp: In function ‘void swr_blit(pipe_context*, const pipe_blit_info*)’: swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive] ctx->render_cond_mode);

Re: [Mesa-dev] [PATCH 4/5] gbm: Export a per plane getter for stride

On Tue, Mar 7, 2017 at 9:14 PM, Ben Widawsky wrote: > v2: Preserve legacy behavior when plane is 0 (Jason Ekstrand) > EINVAL when input plane is greater than total planes (Jason Ekstrand) > Don't leak the image after fromPlanar (Daniel) > Move bo->image check below plane count

Re: [Mesa-dev] [PATCH 16/16] anv/cmd_buffer: handle out of device memory during binding table emission

On Wed, Mar 8, 2017 at 1:04 AM, Iago Toral wrote: > On Tue, 2017-03-07 at 13:25 -0800, Jason Ekstrand wrote: > > On Mon, Mar 6, 2017 at 11:16 PM, Iago Toral Quiroga > m> wrote: > > > --- > > > src/intel/vulkan/genX_cmd_buffer.c | 7 +-- > > > 1 file

Re: [Mesa-dev] [PATCH 00/16] anv: Handle out of memory situations better

On Wed, Mar 8, 2017 at 12:24 AM, Iago Toral wrote: > On Tue, 2017-03-07 at 10:31 +0200, Pohjolainen, Topi wrote: > > On Tue, Mar 07, 2017 at 08:15:45AM +0100, Iago Toral Quiroga wrote: > > > > > > There are a number of work-in-progress CTS tests that check OOM > > > handling >

[Mesa-dev] [PATCH 3/6] glsl/nir: Use nir_type_conversion_op

Using the helper is way better than hand-coding the universe. --- src/compiler/glsl/glsl_to_nir.cpp | 69 ++- 1 file changed, 32 insertions(+), 37 deletions(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index

[Mesa-dev] [PATCH 1/6] nir/validate: Validate ALU bit-size rules

--- src/compiler/nir/nir_validate.c | 21 + 1 file changed, 21 insertions(+) diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c index 16efcb2..cad578c 100644 --- a/src/compiler/nir/nir_validate.c +++ b/src/compiler/nir/nir_validate.c @@ -388,10

[Mesa-dev] [PATCH 6/6] nir: Rework conversion opcodes

The NIR story on conversion opcodes is a mess. We've had way too many of them, naming is inconsistent, and which ones have explicit sizes was sort-of random. This commit re-organizes things and makes them all consistent: - All non-bool conversion opcodes now have the explicit size in the

[Mesa-dev] [PATCH 5/6] i965/fs: Re-arrange comparison operations

--- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 56 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index fc85f0e..72a0a74 100644 ---

[Mesa-dev] [PATCH 4/6] i965/vec4: Get rid of the type parameter from to/from_double

--- src/mesa/drivers/dri/i965/brw_vec4.h | 6 ++ src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 33 -- 2 files changed, 15 insertions(+), 24 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index

[Mesa-dev] [PATCH 2/6] nir: Add a get_nir_type_for_glsl_base_type helper

--- src/compiler/nir/nir.h | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index dd1e407..57b8be3 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -680,9 +680,9 @@

[Mesa-dev] [PATCH 0/6] nir: Rework conversion opcodes

As I've been trolling through things such as fp64 and int64 lately, the current status conversion opcodes in NIR began bothering me. I've know that it's sub-optimal for a while but I didn't realize just how hairy it had gotten until this week. This little series makes everything sane by

[Mesa-dev] [Bug 100133] swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive]

https://bugs.freedesktop.org/show_bug.cgi?id=100133 Vinson Lee changed: What|Removed |Added CC||bri...@vmware.com,

[Mesa-dev] [Bug 100120] Mesa fails to build with gcc address sanitizer (-fsanitize=address -lasan)

https://bugs.freedesktop.org/show_bug.cgi?id=100120 --- Comment #1 from Jeff Smith --- While you shouldn't have needed LIBS="..." at all, there is a deficiency in libtool that was fixed in 2015:

Re: [Mesa-dev] [PATCH] radv/ac: fixup texture coord to have right number of channels.

Reviewed-by: Bas Nieuwenhuizen On Wed, Mar 8, 2017 at 11:27 PM, Dave Airlie wrote: > From: Dave Airlie > > Jason has patches to add validation to this area, this should fix > radv shaders. > > Signed-off-by: Dave Airlie

[Mesa-dev] [PATCH] radv/ac: fixup texture coord to have right number of channels.

From: Dave Airlie Jason has patches to add validation to this area, this should fix radv shaders. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_bufimage.c | 6 +++--- src/amd/vulkan/radv_meta_resolve_cs.c | 2 +- 2 files changed, 4

Re: [Mesa-dev] [PATCH] configure.ac: Allowing building without shader cache without zlib.

On 09/03/17 07:30, Marek Olšák wrote: On Wed, Mar 8, 2017 at 9:14 PM, Vinson Lee wrote: On Sat, Mar 4, 2017 at 3:42 PM, Emil Velikov wrote: On 4 March 2017 at 22:43, Vinson Lee wrote: On Sat, Mar 4, 2017 at 5:24 PM,

Re: [Mesa-dev] [PATCH 2/2] st/nine: pass NULL to ureg_get_tokens()

Reviewed-by: Axel Davy On 03/03/2017 00:12, Timothy Arceri wrote: The number of tokens in never used and the pointer is NULL checked so just pass NULL. --- src/gallium/state_trackers/nine/nine_ff.c | 3 +-- src/gallium/state_trackers/nine/nine_shader.c | 3 +-- 2

Re: [Mesa-dev] [PATCH 0/9] Enable GL_ARB_shader_atomic_counter_ops on i965

On Sun, Mar 5, 2017 at 1:35 PM, Matt Turner wrote: > On Thu, Sep 1, 2016 at 11:12 AM, Ian Romanick wrote: >> On 09/01/2016 11:10 AM, Ian Romanick wrote: >>> This is the updated series to enable GL_ARB_shader_atomic_counter_ops on >>> i965. Really only

Re: [Mesa-dev] [PATCH 11/11] st/va: add config support for 10bit decoding

On 08/03/17 21:32, Mark Thompson wrote: > On 08/03/17 12:29, Christian König wrote: >> From: Christian König >> >> Advertise 10bpp support if the driver supports decoding to a P016 surface. >> >> Signed-off-by: Christian König >> --- >>

Re: [Mesa-dev] [PATCH 11/11] st/va: add config support for 10bit decoding

On 08/03/17 12:29, Christian König wrote: > From: Christian König > > Advertise 10bpp support if the driver supports decoding to a P016 surface. > > Signed-off-by: Christian König > --- > src/gallium/state_trackers/va/config.c | 15

Re: [Mesa-dev] 10bit HEVC decoding for RadeonSI v2

On 08/03/17 12:29, Christian König wrote: > Hi guys, > > I finally found time testing this and hammering out (hopefully) all the > remaining bugs. Playing a 10bit HEVC file through VAAPI with mpv/ffmpeg git > master from about two days ago now works flawlessly and has only about 15% CPU > load on

[Mesa-dev] [Bug 100133] swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive]

https://bugs.freedesktop.org/show_bug.cgi?id=100133 Bug ID: 100133 Summary: swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive] Product: Mesa

[Mesa-dev] [PATCH v2] glsl: builtin: always return clones of the builtins

Builtins are created once and allocated using their own private ralloc context. When reparenting IR that includes builtins, we might be steal bits of builtins. This is problematic because these builtins might now be freed when the shader that includes then last is disposed. This might also lead to

Re: [Mesa-dev] [PATCH] configure.ac: Allowing building without shader cache without zlib.

On Wed, Mar 8, 2017 at 9:14 PM, Vinson Lee wrote: > On Sat, Mar 4, 2017 at 3:42 PM, Emil Velikov wrote: >> On 4 March 2017 at 22:43, Vinson Lee wrote: >>> On Sat, Mar 4, 2017 at 5:24 PM, Emil Velikov

Re: [Mesa-dev] [PATCH] configure.ac: Allowing building without shader cache without zlib.

On Sat, Mar 4, 2017 at 3:42 PM, Emil Velikov wrote: > On 4 March 2017 at 22:43, Vinson Lee wrote: >> On Sat, Mar 4, 2017 at 5:24 PM, Emil Velikov >> wrote: >>> On 4 March 2017 at 22:13, Vinson Lee

Re: [Mesa-dev] [PATCH] swr: support layer output in geometry shaders

Reviewed-by: Bruce Cherniak > On Mar 5, 2017, at 3:24 PM, Ilia Mirkin wrote: > > This makes bin/gl-3.2-layered-rendering-gl-layer-render fail only with > 2DMS_ARRAY, which is expected given the lackluster MSAA support. However > all the regular

Re: [Mesa-dev] [PATCH v3 16/24] i965/vec4: fix SIMD-width lowering for VEC4_OPCODE_FROM_DOUBLE in IVB/BYT

Samuel Iglesias Gonsálvez writes: > On 07/03/17 22:24, Francisco Jerez wrote: >> Samuel Iglesias Gonsálvez writes: >> >>> On 04/03/17 01:04, Francisco Jerez wrote: Samuel Iglesias Gonsálvez writes: > From: "Juan

Re: [Mesa-dev] [PATCH 3/3] glsl/linker: Check that re-declared, inter-shader built-in blocks match

On 2017-03-05 11:28:43, Eduardo Lima Mitev wrote: > From GLSL 4.5 spec, section "7.1 Built-In Language Variables", page 130 of > the PDF states: > > "If multiple shaders using members of a built-in block belonging to > the same interface are linked together in the same program, they must

Re: [Mesa-dev] [PATCH 0/6] isl: Fix requests for exact row pitch

On Mon, Mar 06, 2017 at 10:12:07AM -0800, Chad Versace wrote: > All callers of isl_surf_init() that set 'min_row_pitch' wanted to > request an *exact* row pitch, as evidenced by nearby asserts, but isl > lacked API for doing so. This series fixes that by adding a field, >

[Mesa-dev] [Bug 100120] Mesa fails to build with gcc address sanitizer (-fsanitize=address -lasan)

https://bugs.freedesktop.org/show_bug.cgi?id=100120 Bug ID: 100120 Summary: Mesa fails to build with gcc address sanitizer (-fsanitize=address -lasan) Product: Mesa Version: git Hardware: All OS: All

Re: [Mesa-dev] [PATCH 12/17] i965: Move the back-end compiler to src/intel/compiler

On Wednesday, March 8, 2017 10:02:38 AM PST Emil Velikov wrote: > On 8 March 2017 at 17:37, Jason Ekstrand wrote: > > On Wed, Mar 8, 2017 at 9:16 AM, Emil Velikov > > wrote: > >> > >> From: Jason Ekstrand > >> > >> Mostly

Re: [Mesa-dev] [PATCH 0/8] i965: Support OA counters via INTEL_performance_query

On Friday, February 24, 2017 5:57:55 AM PST Robert Bragg wrote: > This builds on the recent i965/INTEL_performance_query work to add support for > Haswell OA unit performance counters (Gen 8 and 9 support to follow once > corresponding kernel supports lands). > > Robert Bragg (8): >

Re: [Mesa-dev] [PATCH] i965: Select pipeline and emit state base address in Gen8+ HiZ ops.

On Wed, Mar 08, 2017 at 10:07:12AM -0800, Nanley Chery wrote: > On Wed, Mar 08, 2017 at 02:17:59AM -0800, Kenneth Graunke wrote: > > On Thursday, March 2, 2017 4:36:08 PM PST Nanley Chery wrote: > > > On Mon, Feb 06, 2017 at 03:55:49PM -0800, Kenneth Graunke wrote: > > > > If a HiZ op is the first

[Mesa-dev] [Bug 100091] Failure to create folder for on-disk shader cache

https://bugs.freedesktop.org/show_bug.cgi?id=100091 --- Comment #16 from Emil Velikov --- Created attachment 130129 --> https://bugs.freedesktop.org/attachment.cgi?id=130129=edit HACK: disable dynamic, enable symbolic Some ideas: - a non-timestamp better solution

Re: [Mesa-dev] [PATCH 04/37] glsl/tests: suffix .sh/.py files as applicable

On Wednesday, 2017-03-08 16:55:12 +, Emil Velikov wrote: > On 6 March 2017 at 18:21, Emil Velikov wrote: > > On 23 February 2017 at 17:13, Emil Velikov wrote: > >> From: Emil Velikov > >> > >> This makes it

Re: [Mesa-dev] [PATCH 3/8] i965: brw_context.h additions for OA unit query codegen

On Friday, February 24, 2017 5:57:58 AM PST Robert Bragg wrote: > In preparation for generating code from the XML performance counter meta > data, this makes some additions to brw_context.h for this code to be > able to reference. > > It adds a brw->perfquery.oa_metrics_table hash table for

Re: [Mesa-dev] [PATCH 2/8] i965: XML description of Haswell OA metric set

On Friday, February 24, 2017 5:57:57 AM PST Robert Bragg wrote: > In preparation for exposing Gen Observation Architecture performance > counters via INTEL_performance_query this adds an XML description for an > initial 'Render Metrics Basic Gen7.5' query and corresponding counters. > > The

Re: [Mesa-dev] [RESEND v4 00/16] cleanup anv_entrpoints_gen.py

On 7 March 2017 at 21:14, Dylan Baker wrote: > There are a number of small style cleanups and simplifications in this series, > but the main changes are: > - use a mako template to generate the header and code rather than prints > - be python 3.x ready (the goal isn't to

  1   2   >