Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

On Fri, 2017-03-10 at 14:28 +1100, Timothy Arceri wrote: > > On 10/03/17 08:46, Andres Gomez wrote: > > On Fri, 2017-03-10 at 08:32 +1100, Timothy Arceri wrote: > > > On 23/02/17 19:55, Andres Gomez wrote: > > > > Commit f1293b2f9bc3 split apart buffer block arrays but introduced > > > > also the

Re: [Mesa-dev] [PATCH] anv/blorp: Turn off AUX after doing a CCS_D resolve

On Thu, Mar 09, 2017 at 04:42:06PM -0800, Jason Ekstrand wrote: > For render passes with multiple subpasses on gen7, we only fast-clear at > the top but an input attachment use can cause us to do a resolve in the > middle of the render pass. Once we've done so, we are no longer have a >

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

On Thursday, March 9, 2017 8:30:44 PM PST Jason Ekstrand wrote: > On Thu, Mar 9, 2017 at 8:18 PM, Kenneth Graunke > wrote: > > > On Thursday, March 9, 2017 3:35:15 PM PST Nanley Chery wrote: > > > The PRMs state that this packet is 16 DWORDS long. Ensure that the last > >

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #22 from oia...@gmail.com --- (In reply to Timothy Arceri from comment #19) > (In reply to oiaohm from comment #17) > > (In reply to Timothy Arceri from comment #15) > > > (In reply to oiaohm from comment #12) > > > > (In reply to

[Mesa-dev] [Bug 100061] LODQ instruction generated with invalid dst mask

https://bugs.freedesktop.org/show_bug.cgi?id=100061 sephirot...@gmail.com changed: What|Removed |Added CC||sephirot...@gmail.com -- You

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #21 from oia...@gmail.com --- (In reply to Emil Velikov from comment #20) > > As a final note: shader cache is not enabled on anything but r600/radeonsi > atm, so the current code simply _cannot_ break your work-flows (workflow >

Re: [Mesa-dev] [PATCH] anv: change BLOCK_POOL_MEMFD_SIZE to exactly 2GB

On 03/09/2017 10:06 PM, Jason Ekstrand wrote: On Thu, Mar 9, 2017 at 8:37 AM, Eero Tamminen > wrote: HI, On 09.03.2017 13:28, Tapani Pälli wrote: ... We had some discussion today with Eero and came to

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

On Thu, Mar 9, 2017 at 8:18 PM, Kenneth Graunke wrote: > On Thursday, March 9, 2017 3:35:15 PM PST Nanley Chery wrote: > > The PRMs state that this packet is 16 DWORDS long. Ensure that the last > > three DWORDS are zeroed as required by the hardware when allocating a > >

Re: [Mesa-dev] [PATCH 1/3] util/disk_cache: use LRU eviction rather than random eviction (v2)

On 07/03/17 12:25, Alan Swanson wrote: Still using random selection of two-character subdirectory in which to check cache files rather than scanning entire cache. v2: Factor out double strlen call --- src/util/disk_cache.c | 78 +++ 1 file

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

On Thursday, March 9, 2017 3:35:15 PM PST Nanley Chery wrote: > The PRMs state that this packet is 16 DWORDS long. Ensure that the last > three DWORDS are zeroed as required by the hardware when allocating a > null surface state. > > Cc: > Signed-off-by: Nanley

Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

On 10/03/17 08:46, Andres Gomez wrote: On Fri, 2017-03-10 at 08:32 +1100, Timothy Arceri wrote: On 23/02/17 19:55, Andres Gomez wrote: Commit f1293b2f9bc3 split apart buffer block arrays but introduced also the possibility of a recount of active blocks

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

On Thu, Mar 9, 2017 at 5:32 PM, Nanley Chery wrote: > On Thu, Mar 09, 2017 at 05:03:30PM -0800, Jason Ekstrand wrote: > > On Thu, Mar 9, 2017 at 3:35 PM, Nanley Chery > wrote: > > > > > The PRMs state that this packet is 16 DWORDS long. Ensure that

Re: [Mesa-dev] [PATCH 3/3] gbm: Export a get modifiers

Fairly straightforward and nothing seems amiss. Reviewed-by: Jason Ekstrand On Thu, Mar 9, 2017 at 5:49 PM, Ben Widawsky wrote: > This patch originally had i965 specific code and was named: > commit 61cd3c52b868cf8cb90b06e53a382a921eb42754 > Author:

Re: [Mesa-dev] [PATCH 2/3] gbm: Introduce modifiers into surface/bo creation

On Thu, Mar 9, 2017 at 5:48 PM, Ben Widawsky wrote: > The idea behind modifiers like this is that the user of GBM will have > some mechanism to query what properties the hardware supports for its BO > or surface. This information is directly passed in (and stored) so that >

Re: [Mesa-dev] [PATCH 1/3] dri: Add an image creation with modifiers

On Thu, Mar 9, 2017 at 5:48 PM, Ben Widawsky wrote: > Modifiers will be obtains or guessed by the client and passed in during > "obtained" > image creation/import. > > This requires bumping the DRIimage version. > > As of this patch, the modifiers aren't plumbed all the way

[Mesa-dev] [PATCH 8/8] radeonsi: use a thread queue to write to shader cache

--- src/gallium/drivers/radeonsi/si_state_shaders.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 343cb83..8c00967 100644 ---

[Mesa-dev] [PATCH 6/8] util/u_queue: make u_queue accessible to cpp

--- src/util/u_queue.h | 8 1 file changed, 8 insertions(+) diff --git a/src/util/u_queue.h b/src/util/u_queue.h index 0073890..4aec1f2 100644 --- a/src/util/u_queue.h +++ b/src/util/u_queue.h @@ -31,20 +31,24 @@ */ #ifndef U_QUEUE_H #define U_QUEUE_H #include #include

[Mesa-dev] [PATCH 5/8] util/disk_cache: move disk_cache declaration to the header

This will allow use to access members outside if the disk cache util. --- src/util/disk_cache.c | 21 - src/util/disk_cache.h | 21 - 2 files changed, 20 insertions(+), 22 deletions(-) diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c index

[Mesa-dev] [PATCH 7/8] st/mesa/glsl: use a thread queue to write to shader cache

This uses a thread queue for the GLSL IR cache and the TGSI cache when adding entries. This should help reduce any overhead added by the shader cache when programs are not found in the cache. --- src/compiler/glsl/shader_cache.cpp | 7 --- src/mesa/state_tracker/st_shader_cache.c | 7

[Mesa-dev] [PATCH 4/8] util/disk_cache: make disk_cache_put() compatible with u_queue

--- src/compiler/glsl/shader_cache.cpp | 5 - src/compiler/glsl/tests/cache_test.c| 29 - src/gallium/drivers/radeonsi/si_state_shaders.c | 9 ++-- src/mesa/state_tracker/st_shader_cache.c| 5 - src/util/disk_cache.c

[Mesa-dev] [PATCH 1/8] glsl: don't use ralloc for blob creation

There is no need to use ralloc here. --- src/compiler/glsl/blob.c | 9 +++-- src/compiler/glsl/blob.h | 4 ++-- src/compiler/glsl/shader_cache.cpp | 4 ++-- src/compiler/glsl/tests/blob_test.c | 18 --

[Mesa-dev] [PATCH 3/8] util/disk_cache: add helpers for creating/destroying disk cache put jobs

--- src/util/disk_cache.c | 28 src/util/disk_cache.h | 39 +++ 2 files changed, 67 insertions(+) diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c index 426cc55..37b3576 100644 --- a/src/util/disk_cache.c +++

[Mesa-dev] [PATCH 2/8] util/disk_cache: add thread queue to disk cache

--- src/util/disk_cache.c | 15 ++- src/util/disk_cache.h | 2 ++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c index facdcec..426cc55 100644 --- a/src/util/disk_cache.c +++ b/src/util/disk_cache.c @@ -53,20 +53,23 @@ /*

[Mesa-dev] RFC Thread queue for shader cache compression/writes (real)

This series was created to attempt to address regressions in compile times cause by the shader cache when the cache is cold. However my testing has shown no noticable change either way in start-up times of Deus Ex on my Intel i5-6400 CPU. The reports were for slow compression times on an older

[Mesa-dev] [PATCH 4/8] glsl: don't recompile a shader on fallback unless needed

Because we optimistically skip compiling shaders if we have seen them before we may need to compile them later at link time if they haven't yet been use in a specific combination to create a program. Rather than always recompiling we take advantage of the gl_compile_status enum introduced in the

[Mesa-dev] [PATCH 6/8] util/disk_cache: add thread queue to disk cache

--- src/util/disk_cache.c | 15 ++- src/util/disk_cache.h | 2 ++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c index facdcec..426cc55 100644 --- a/src/util/disk_cache.c +++ b/src/util/disk_cache.c @@ -53,20 +53,23 @@ /*

[Mesa-dev] RFC Thread queue for shader cache compression/writes

This series was created to attempt to address regressions in compile times cause by the shader cache when the cache is cold. However my testing has shown no noticable change either way in start-up times of Deus Ex on my Intel i5-6400 CPU. The reports were for slow compression times on an older

[Mesa-dev] [PATCH 5/8] glsl: don't use ralloc for blob creation

There is no need to use ralloc here. --- src/compiler/glsl/blob.c | 9 +++-- src/compiler/glsl/blob.h | 4 ++-- src/compiler/glsl/shader_cache.cpp | 4 ++-- src/compiler/glsl/tests/blob_test.c | 18 --

[Mesa-dev] [PATCH 8/8] util/disk_cache: make disk_cache_put() compatible with u_queue

--- src/compiler/glsl/shader_cache.cpp | 5 - src/gallium/drivers/radeonsi/si_state_shaders.c | 9 +++-- src/mesa/state_tracker/st_shader_cache.c| 5 - src/util/disk_cache.c | 27 ++--- src/util/disk_cache.h

[Mesa-dev] [PATCH 7/8] util/disk_cache: add helpers for creating/destroying disk cache put jobs

--- src/util/disk_cache.c | 28 src/util/disk_cache.h | 39 +++ 2 files changed, 67 insertions(+) diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c index 426cc55..37b3576 100644 --- a/src/util/disk_cache.c +++

[Mesa-dev] [PATCH 3/8] mesa/glsl: introduce new gl_compile_status enum

This will allow us to tell if a shader really has been compiled or if the shader cache has just seen it before. --- src/compiler/glsl/glsl_parser_extras.cpp | 4 ++-- src/mesa/drivers/common/meta.c | 2 +- src/mesa/main/ff_fragment_shader.cpp | 2 +- src/mesa/main/mtypes.h

[Mesa-dev] [PATCH 2/8] gallium/util: replace pipe_thread_setname() with u_thread_setname()

They do the same thing we are just moving the function to be accessible to all of Mesa. --- src/gallium/auxiliary/os/os_thread.h | 12 src/gallium/drivers/llvmpipe/lp_rast.c | 2 +- src/gallium/state_trackers/nine/nine_state.c | 4 ++-- 3 files changed, 3

[Mesa-dev] [PATCH 1/8] gallium/util: replace pipe_thread_get_time_nano() with u_thread_get_time_nano()

They do the same thing we are just moving the function to be accessible to all of Mesa. --- src/gallium/auxiliary/os/os_thread.h | 18 +- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/src/gallium/auxiliary/os/os_thread.h b/src/gallium/auxiliary/os/os_thread.h

[Mesa-dev] [PATCH 2/3] gbm: Introduce modifiers into surface/bo creation

The idea behind modifiers like this is that the user of GBM will have some mechanism to query what properties the hardware supports for its BO or surface. This information is directly passed in (and stored) so that the DRI implementation can create an image with the appropriate attributes. A

[Mesa-dev] [PATCH 1/3] dri: Add an image creation with modifiers

Modifiers will be obtains or guessed by the client and passed in during image creation/import. This requires bumping the DRIimage version. As of this patch, the modifiers aren't plumbed all the way down, this patch simply makes sure the interface level stuff is correct. v2: Don't allow usage +

[Mesa-dev] [PATCH 0/3] GBM modifier plumbing

This is essential the creation and getter for GBM modifiers (via DRI images). This was the second chunk of the Renderbuffer Decompression series (aka GBM modifiers). Splitting this up to make merging easier. These patches are simple plumbing for getting modifiers through the various GBM functions

[Mesa-dev] [PATCH 3/3] gbm: Export a get modifiers

This patch originally had i965 specific code and was named: commit 61cd3c52b868cf8cb90b06e53a382a921eb42754 Author: Ben Widawsky Date: Thu Oct 20 18:21:24 2016 -0700 gbm: Get modifiers from DRI To accomplish this, two new query tokens are added to the extension:

[Mesa-dev] [PATCH 0/3] GBM modifier plumbing

This is essential the creation and getter for GBM modifiers (via DRI images). This was the second chunk of the Renderbuffer Decompression series (aka GBM modifiers). Splitting this up to make merging easier. These patches are simple plumbing for getting modifiers through the various GBM functions

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

On Thu, Mar 09, 2017 at 05:03:30PM -0800, Jason Ekstrand wrote: > On Thu, Mar 9, 2017 at 3:35 PM, Nanley Chery wrote: > > > The PRMs state that this packet is 16 DWORDS long. Ensure that the last > > three DWORDS are zeroed as required by the hardware when allocating a > >

Re: [Mesa-dev] [PATCH] i965: Move brw_init_compaction_tables() to brw_create_compiler().

On Thu, Mar 9, 2017 at 4:06 PM, Matt Turner wrote: > ... so that we can avoid threading complications or unnecessary > compaction table initializations (which just consists of setting some > pointers based on devinfo->gen). > --- > src/mesa/drivers/dri/i965/brw_compiler.c

Re: [Mesa-dev] [PATCH] intel: Correct the BDW surface state size

On Thu, Mar 9, 2017 at 3:35 PM, Nanley Chery wrote: > The PRMs state that this packet is 16 DWORDS long. Ensure that the last > three DWORDS are zeroed as required by the hardware when allocating a > null surface state. > > Cc: >

Re: [Mesa-dev] r600g: Support spilling temp arrays

Hello Glenn, I've tested this on r600g, Turks XT / HD6670, 2 GB (same as you have?). It was hard work to apply this on master. Do you have a rebase handy? But works so far. Am 05.03.2017 18:26, schrieb Glenn Kennard: This patch series implements support for spilling temporary arrays on

[Mesa-dev] [PATCH] anv/blorp: Turn off AUX after doing a CCS_D resolve

For render passes with multiple subpasses on gen7, we only fast-clear at the top but an input attachment use can cause us to do a resolve in the middle of the render pass. Once we've done so, we are no longer have a fast-cleared surface so we can just set aux_usage to NONE. ---

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #20 from Emil Velikov --- oia...@gmail.com let me put a couple of suggestions: - try to keep your answers brief - try to keep your analysis distro agnostic - keep Wikipedia references to a minimum -

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #19 from Timothy Arceri --- (In reply to oiaohm from comment #17) > (In reply to Timothy Arceri from comment #15) > > (In reply to oiaohm from comment #12) > > > (In reply to Timothy Arceri from comment #11) >

[Mesa-dev] [PATCH] i965: Move brw_init_compaction_tables() to brw_create_compiler().

... so that we can avoid threading complications or unnecessary compaction table initializations (which just consists of setting some pointers based on devinfo->gen). --- src/mesa/drivers/dri/i965/brw_compiler.c | 2 ++ src/mesa/drivers/dri/i965/brw_eu.c | 2 --

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #18 from Ilia Mirkin --- Since the different arch's libraries will almost invariably be different, this is comparable to flipping back and forth between versions. I expect it to be a fairly common developer

[Mesa-dev] [PATCH] intel: Correct the BDW surface state size

The PRMs state that this packet is 16 DWORDS long. Ensure that the last three DWORDS are zeroed as required by the hardware when allocating a null surface state. Cc: Signed-off-by: Nanley Chery --- src/intel/isl/isl.c

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #17 from oia...@gmail.com --- (In reply to Timothy Arceri from comment #15) > (In reply to oiaohm from comment #12) > > (In reply to Timothy Arceri from comment #11) > > > (In reply to oiaohm from comment #9) > > > > Jan Vesely > > >

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #16 from oia...@gmail.com --- (In reply to Ilia Mirkin from comment #14) > (In reply to oiaohm from comment #13) > > All I can guess is you are not interested in solving problem for my workflow > > so I should not bother opening bugs

Re: [Mesa-dev] [PATCH 11/11] st/va: add config support for 10bit decoding

On 09/03/17 14:08, Christian König wrote: > > Done, new set on the mailing list. > > I've dropped the VDPAU support since nobody seems to be interested in that > any more. > > Any more comments or are we good to go with that? Decode all looks good now. Postprocess-scale of P016 still misses

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #15 from Timothy Arceri --- (In reply to oiaohm from comment #12) > (In reply to Timothy Arceri from comment #11) > > (In reply to oiaohm from comment #9) > > > Jan Vesely > > > If the pointer size is the same

Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

Quoting Jason Ekstrand (2017-03-09 14:19:33) > On Thu, Mar 9, 2017 at 12:25 PM, Dylan Baker wrote: > > > > Quoting Jason Ekstrand (2017-03-09 10:23:56) > > +def op_bit_sizes(op): > > +    sizes = set([8, 16, 32, 64]) > > +    if not

Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

Looks fine : Reviewed-by: Lionel Landwerlin On 09/03/17 22:05, Jason Ekstrand wrote: Apart from avoiding some unneeded size cases, this shouldn't have any actual functional impact. --- src/compiler/nir/nir_constant_expressions.py | 51

Re: [Mesa-dev] [PATCH v2 25/25] configure.ac: do not require the i965 driver for ANV

You left brw_defines.h in compiler/Makefile.sources. With that fixed, Reviewed-by: Jason Ekstrand On Thu, Mar 9, 2017 at 11:07 AM, Emil Velikov wrote: > From: Emil Velikov > > As of last commit we have the two

Re: [Mesa-dev] [PATCH v2 19/25] i965: Move the back-end compiler to src/intel/compiler

On Thu, Mar 9, 2017 at 11:07 AM, Emil Velikov wrote: > From: Jason Ekstrand > > Mostly a dummy git mv with a couple of noticable parts: > - With the earlier header cleanups, nothing in src/intel depends > files from src/mesa/drivers/dri/i965/

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #14 from Ilia Mirkin --- (In reply to oiaohm from comment #13) > All I can guess is you are not interested in solving problem for my workflow > so I should not bother opening bugs in future. I have been trying

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #13 from oia...@gmail.com --- (In reply to Ilia Mirkin from comment #10) > There are lots of words, with lots of mentions of how Debian is awesome, but > still no usage scenario. Let me help you. A usage scenario looks like: > > """

Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

On Thu, Mar 9, 2017 at 12:25 PM, Dylan Baker wrote: > > > Quoting Jason Ekstrand (2017-03-09 10:23:56) > > +def op_bit_sizes(op): > > +sizes = set([8, 16, 32, 64]) > > +if not type_has_size(op.output_type): > > +sizes =

[Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

Apart from avoiding some unneeded size cases, this shouldn't have any actual functional impact. --- src/compiler/nir/nir_constant_expressions.py | 51 +++- 1 file changed, 27 insertions(+), 24 deletions(-) diff --git a/src/compiler/nir/nir_constant_expressions.py

[Mesa-dev] [PATCH 0/2] nir: Add support for 8 and 16-bit types

This tiny series adds support in NIR for 8 and 16-bit types. In particular, it now supports int8_t, uint8_t, int16_t, uint16_t, and float16_t. No 8-bit floating-point type is supported because 8-bit float would be stupid. These patches have been tested in Jenkins but no 8 or 16-bit code has

[Mesa-dev] [PATCH 2/2] nir: Add support for 8 and 16-bit types

--- src/compiler/nir/nir.h | 4 src/compiler/nir/nir_constant_expressions.py | 16 +++- src/compiler/nir/nir_opcodes.py | 6 +- 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h

Re: [Mesa-dev] [Mesa-stable] [PATCH] glapi: fix typo in count_scale

On Thu, Mar 9, 2017 at 10:20 PM, Timothy Arceri wrote: > > > On 09/03/17 02:38, Emil Velikov wrote: >> >> On 6 March 2017 at 04:25, Timothy Arceri wrote: >>> >>> From: Gregory Hainaut >>> >>> 2*4=8 >>> >>> Signed-off-by:

Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

On Fri, 2017-03-10 at 08:32 +1100, Timothy Arceri wrote: > On 23/02/17 19:55, Andres Gomez wrote: > > Commit f1293b2f9bc3 split apart buffer block arrays but introduced > > also the possibility of a recount of active > > blocks (NumUniformBlocks/NumShaderStorageBlocks) which would be > >

[Mesa-dev] [Bug 100073] Shader Disk Cache 32/64 bit detection has a flaw. Missed existence of x32 ABI

https://bugs.freedesktop.org/show_bug.cgi?id=100073 --- Comment #12 from oia...@gmail.com --- (In reply to Timothy Arceri from comment #11) > (In reply to oiaohm from comment #9) > > Jan Vesely > > If the pointer size is the same and the timestamp is the same, the cache > > will be reused, not

Re: [Mesa-dev] [Mesa-announce] Mesa 17.1.0 release plan

Threaded Gallium dispatch is possible for radeonsi within 5 weeks. I have most things done. It won't have as big an impact as glthread, but we might be able to enable it for all apps in radeonsi. Marek On Thu, Mar 9, 2017 at 4:52 PM, Emil Velikov wrote: > Hi all, > >

Re: [Mesa-dev] [PATCH 1/3] glsl: on UBO/SSBOs link error, the number of active blocks remains 0

On 23/02/17 19:55, Andres Gomez wrote: Commit f1293b2f9bc3 split apart buffer block arrays but introduced also the possibility of a recount of active blocks (NumUniformBlocks/NumShaderStorageBlocks) which would be incoherent with the actual amount of active blocks

Re: [Mesa-dev] [PATCH] glapi: fix typo in count_scale

On 09/03/17 02:38, Emil Velikov wrote: On 6 March 2017 at 04:25, Timothy Arceri wrote: From: Gregory Hainaut 2*4=8 Signed-off-by: Gregory Hainaut Reviewed-by: Timothy Arceri ---

Re: [Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

Quoting Jason Ekstrand (2017-03-09 10:23:56) > +def op_bit_sizes(op): > +sizes = set([8, 16, 32, 64]) > +if not type_has_size(op.output_type): > +sizes = sizes.intersection(set(type_sizes(op.output_type))) > +for input_type in op.input_types: > + if not

Re: [Mesa-dev] [PATCH] anv: change BLOCK_POOL_MEMFD_SIZE to exactly 2GB

On Thu, Mar 9, 2017 at 8:37 AM, Eero Tamminen wrote: > HI, > > On 09.03.2017 13:28, Tapani Pälli wrote: > ... > >> We had some discussion today with Eero and came to conclusion that maybe >> that 2GB is actually too big for 32bit system anyway and should consider >> to

Re: [Mesa-dev] [RFC 02/11] glsl: Add "built-in" function to do neg(fp64)

On 03/03/2017 09:13 AM, Ilia Mirkin wrote: > On Fri, Mar 3, 2017 at 11:57 AM, tournier.elie > wrote: >> On 3 March 2017 at 16:29, Ilia Mirkin wrote: >>> On Fri, Mar 3, 2017 at 11:22 AM, Elie Tournier >>> wrote:

Re: [Mesa-dev] [RFC 00/11] GL_ARB_gpu_shader_fp64

On 03/03/2017 11:16 AM, Jason Ekstrand wrote: > Hey Elie! > > On Fri, Mar 3, 2017 at 8:22 AM, Elie Tournier > wrote: > > From: Elie Tournier > > > This

[Mesa-dev] [PATCH v2 22/25] intel/compiler: whitespace cleanups

From: Emil Velikov Signed-off-by: Emil Velikov --- src/intel/compiler/brw_eu_util.c | 4 src/intel/compiler/brw_wm_iz.cpp | 1 - 2 files changed, 5 deletions(-) diff --git a/src/intel/compiler/brw_eu_util.c

[Mesa-dev] [PATCH v2 25/25] configure.ac: do not require the i965 driver for ANV

From: Emil Velikov As of last commit we have the two split, thus we no longer require the i965 in order to have the ANV driver. Even though ANV does not link against libdrm nor libdrm_intel, we still require those as dependencies due to the headers they provide.

[Mesa-dev] [PATCH v2 23/25] intel/tools: Use a makefile included from intel/Makefile.am

From: Jason Ekstrand Reviewed-by: Lionel Landwerlin Reviewed-by: Emil Velikov --- configure.ac | 1 - src/Makefile.am| 4 --

[Mesa-dev] [PATCH v2 17/25] util/bitscan: use correct signature for ffs/ffsll

From: Emil Velikov Otherwise we'll get errors such as error: conflicting types for ‘ffs’ error: conflicting types for ‘ffsll’ We might want to improve the heuristics and provide a definition only when a native one is missing. We can address that at a later stage.

[Mesa-dev] [PATCH v2 21/25] intel/compiler: link all tests again gtest, even test_eu_compact"

From: Emil Velikov At the moment all the tests but test_eu_compact are actual C++ gtests. To simplify things, we can move the gtest.la to the common TEST_LIBS. As we're here, we can rename change the test extension [to .cpp] to avoid using the confusing dummy.cpp.

[Mesa-dev] [PATCH v2 24/25] intel/vulkan: Get rid of recursive make

From: Jason Ekstrand v2 [Emil Velikov] - Various fixes and initial stab at the Android build. - Keep the generation rules/EXTRA_DIST outside the conditional --- configure.ac | 1 - src/Makefile.am

[Mesa-dev] [PATCH v2 16/25] i965: add missing brw_defines.h include in brw_program.c

From: Emil Velikov File is using MI_LOAD_REGISTER_IMM, GEN7_CACHE_MODE_1 and others as defined in the header. Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_state_upload.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [PATCH v2 20/25] i965: remove i965_symbols_test reference from .gitignore

From: Emil Velikov The test/binary was removed back in 2012. With that one gone, we can drop the .gitignore file all together. Cc: Eric Anholt Fixes: c8850394423 ("i965: Drop the missing symbols link test.") Signed-off-by: Emil Velikov

[Mesa-dev] [PATCH v2 18/25] i965: split EU defines to brw_eu_defines.h

From: Emil Velikov Split out the EU defines from the 'generic' ones, as the former are more compiler oriented. With a later commit we'll move brw_eu_defines.h alongside the compiler infra to src/intel/. Pulling all the defines in there seems overzealous. Some

[Mesa-dev] [PATCH v2 15/25] i965: add missing brw_defines.h include in brw_program.c

From: Emil Velikov File is using the PIPE_CONTROL_* macros as defined in the header. Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_program.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [PATCH v2 14/25] i965: add missing #include in brw_inst.h

From: Emil Velikov Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_inst.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h index

[Mesa-dev] [PATCH v2 19/25] i965: Move the back-end compiler to src/intel/compiler

From: Jason Ekstrand Mostly a dummy git mv with a couple of noticable parts: - With the earlier header cleanups, nothing in src/intel depends files from src/mesa/drivers/dri/i965/ - Both Autoconf and Android builds are addressed. Thanks to Mauro and Tapani for the

[Mesa-dev] [PATCH v2 13/25] i965: move brw_define.h ifndef guard to the top

From: Emil Velikov Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_defines.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH v2 11/25] i965: remove unused brw_program.h include

From: Emil Velikov Neither of the changed files requires the brw_program.h include. Since we're about to move them [to src/intel/compiler] with the next commit there's no point in having the include. Let alone the very confusing compiler include directive

[Mesa-dev] [PATCH v2 06/25] intel/isl: Stop linking libi965_compiler.la into tests

From: Jason Ekstrand Reviewed-by: Emil Velikov --- src/intel/Makefile.isl.am | 1 - 1 file changed, 1 deletion(-) diff --git a/src/intel/Makefile.isl.am b/src/intel/Makefile.isl.am index 5a317f522b..ee2215df1d 100644 ---

[Mesa-dev] [PATCH v2 09/25] i965: remove dead brw_new_shader() declaration

From: Emil Velikov Cc: Timothy Arceri Fixes: 194537ebe44 ("mesa/glsl/i965: remove Driver.NewShader()") Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_program.h | 2 -- 1 file changed, 2 deletions(-)

[Mesa-dev] [PATCH v2 04/25] radv/wsi: Don't include wayland headers

From: Emil Velikov Unused and we'll rework the way wayland-drm-client-protocol.h is generated with later commit. Signed-off-by: Emil Velikov --- src/amd/vulkan/radv_wsi_wayland.c | 3 --- 1 file changed, 3 deletions(-) diff --git

[Mesa-dev] [PATCH v2 07/25] anv: Stop including brw_context.h

From: Jason Ekstrand --- src/intel/vulkan/anv_private.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 27c1923945..2552226879 100644 --- a/src/intel/vulkan/anv_private.h +++

[Mesa-dev] [PATCH v2 08/25] i965: remove unused brw_cs.h include

From: Emil Velikov Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_fs.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index

[Mesa-dev] [PATCH v2 01/25] wayland: move .gitignore where applicable

From: Emil Velikov Strictly speaking things work as-is, but let's move the file alongside the artefacts it references. Analogous to all other places in mesa. Signed-off-by: Emil Velikov --- src/egl/wayland/{ => wayland-drm}/.gitignore |

[Mesa-dev] [PATCH v2 10/25] i965: remove duplicate declaration of brw_mark_surface_used

From: Emil Velikov Function was made static and moved to another header with earlier commit. Cc: Jason Ekstrand Fixes: 760c8a1d950 ("i965: Make mark_surface_used a static inline in brw_compiler.h") Signed-off-by: Emil Velikov

[Mesa-dev] [PATCH v2 12/25] i965: remove unused macros from brw_defines.h

From: Emil Velikov The follow three groups are not used by neither the DRI module nor the compiler. BRW_POLYGON_*_FACING BRW_POLYGON_FACING_* BRW_STATELESS_BUFFER_* Signed-off-by: Emil Velikov ---

[Mesa-dev] [PATCH v2 03/25] anv/wsi: Don't include wayland headers

From: Jason Ekstrand Unused and we'll rework the way wayland-drm-client-protocol.h is generated with later commit. v2 [Emil] - Also remove wayland-client.h Signed-off-by: Emil Velikov --- src/intel/vulkan/anv_wsi_wayland.c | 3 --- 1

[Mesa-dev] [PATCH v2 02/25] configure.ac: provide a fall-back define for WAYLAND_SCANNER

From: Emil Velikov In some cases, we can end up calling WAYLAND_SCANNER even when there's no binary. Do follow the other's approach set by AX_PROG_FLEX/BISON and set the variable to : Signed-off-by: Emil Velikov --- configure.ac | 4 ++--

[Mesa-dev] [PATCH v2 05/25] vulkan/wsi: Generate wayland protocol headers separately from EGL

From: Jason Ekstrand Previously, we were depending on EGL for generating the headers and providing the protocol symbols. However, since neither Vulkan driver actually wants to link against EGL, this is kind of pointless. It also creates a weird build dependency. v2

[Mesa-dev] [PATCH v2 00/25] Move i965 compiler to src/intel/

Changes since v1 include: - brw_eu_defines.h split and associated fixes Split it not perfect, but I think is reasonable for the time being. i965: remove unused macros from brw_defines.h i965: move brw_define.h ifndef guard to the top i965: add missing #include in brw_inst.h i965: add

[Mesa-dev] [Bug 100037] [vmwgfx] Invalid SVGA3D command: 1202

https://bugs.freedesktop.org/show_bug.cgi?id=100037 --- Comment #5 from Deepak --- Hello, I meant that I can reproduce it already. Thanks for providing the details. -- You are receiving this mail because: You are the assignee for the bug. You are the QA Contact for the

[Mesa-dev] [PATCH 1/2] nir/constant_expressions: Refactor helper functions

Apart from avoiding some unneeded size cases, this shouldn't have any actual functional impact. --- src/compiler/nir/nir_constant_expressions.py | 51 +++- 1 file changed, 27 insertions(+), 24 deletions(-) diff --git a/src/compiler/nir/nir_constant_expressions.py

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