So the solution will be query if EXT_color_buffer_half_float is supported?
-Original Message-
From: Palli, Tapani
Sent: Friday, March 23, 2018 1:53 PM
To: Lin, Johnson ; Alejandro Piñeiro
; mesa-dev@lists.freedesktop.org
Subject: Re:
On 03/22/2018 07:53 AM, Tapani Pälli wrote:
On 03/22/2018 04:43 AM, Lin, Johnson wrote:
Hi, Thanks for the comments.
I just noticed it does not check the extension support for
EXT_color_buffer_float neither?
That is probably because it is enabled as 'dummy_true' (see
On Fri, Mar 23, 2018 at 11:43 AM, Chih-Wei Huang wrote:
> 2018-03-22 16:23 GMT+08:00 Tomasz Figa :
>> Hi Chih-Wei,
>>
>> On Thu, Feb 22, 2018 at 2:53 PM, Chih-Wei Huang wrote:
>>> 2018-02-21 3:03 GMT+08:00 Rob Herring
Fixes piglit test:
tests/spec/arb_enhanced_layouts/execution/component-layout/vs-fs-array-interleave-range.shader_test
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git
The location was only being incremented the first time we processed a
location. This meant we would incorrectly skip some elements of
an array if the first element was packed and proccessed previously
but other elements were not.
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 5 ++---
1 file
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Thu, Mar 22, 2018 at 4:41 PM, Samuel Pitoiset
wrote:
> Based on RadeonSI. Untested.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 5
https://bugs.freedesktop.org/show_bug.cgi?id=105699
Roland Scheidegger changed:
What|Removed |Added
Assignee|srol...@vmware.com
https://bugs.freedesktop.org/show_bug.cgi?id=105699
Bug ID: 105699
Summary: s3tc fbo-generatemipmap-formats tests fail unless
optimized
Product: Mesa
Version: unspecified
Hardware: Other
OS: All
Quoting Ilia Mirkin (2018-03-22 15:16:18)
> On Thu, Mar 22, 2018 at 6:00 PM, Dylan Baker wrote:
> > Quoting Ilia Mirkin (2018-03-21 17:39:14)
> >> Just one bit of feedback, for the rest I either agree or have no opinion:
> >>
> >> On Wed, Mar 21, 2018 at 8:28 PM, Emil Velikov
I'd rather we figure out a story of when it is faster. I tried a lot
of stuff with the currently available games, and getting it
consistently faster was difficult.
So if you have a raven ridge, feel free to try something, but I'm not
really a fan of copying it blindly without understanding it.
https://bugs.freedesktop.org/show_bug.cgi?id=105670
--- Comment #6 from Timothy Arceri ---
(In reply to Gert Wollny from comment #2)
> I can confirm this on Radeon 6870 HD.
>
> I was able to track the issue to the series beginning with
>
>ab23b759f24 glsl: don't
Reviewed-by: Brian Paul
On 03/22/2018 04:18 PM, Eric Anholt wrote:
GTF-GLES3.gtf.GL3Tests.instanced_arrays.instanced_arrays_divisor uses -1
as a divisor, so we would overflow to count=0 and upload no data,
triggering the assert below. We want to upload 1 element in this
On 03/22/2018 04:18 PM, Eric Anholt wrote:
There's nothing to worry about here -- the A channel just gets dropped by
the blit. This avoids a segfault in the fallback path when copying from a
RGBA16_SINT renderbuffer to a RGB16_SINT destination represented by an
RGBA16_SINT texture (the fallback
GTF-GLES3.gtf.GL3Tests.instanced_arrays.instanced_arrays_divisor uses -1
as a divisor, so we would overflow to count=0 and upload no data,
triggering the assert below. We want to upload 1 element in this case,
fixing the test on VC5.
v2: Use some more obvious logic, and explain why we don't use
There's nothing to worry about here -- the A channel just gets dropped by
the blit. This avoids a segfault in the fallback path when copying from a
RGBA16_SINT renderbuffer to a RGB16_SINT destination represented by an
RGBA16_SINT texture (the fallback path tries to get/fetch to float
buffers,
On Thu, Mar 22, 2018 at 6:00 PM, Dylan Baker wrote:
> Quoting Ilia Mirkin (2018-03-21 17:39:14)
>> Just one bit of feedback, for the rest I either agree or have no opinion:
>>
>> On Wed, Mar 21, 2018 at 8:28 PM, Emil Velikov
>> wrote:
>> > * unfit
Quoting Ilia Mirkin (2018-03-21 17:39:14)
> Just one bit of feedback, for the rest I either agree or have no opinion:
>
> On Wed, Mar 21, 2018 at 8:28 PM, Emil Velikov
> wrote:
> > * unfit and late nominations:
> > * any rejections that are unfit based on the
I didn't check the xml definition bit by bit, but I'm sure it's fine.
This series is :
Reviewed-by: Lionel Landwerlin
On 21/03/18 18:42, Rafael Antognolli wrote:
---
src/intel/genxml/gen10.xml | 27 +++
src/intel/genxml/gen11.xml | 27
There is another macro anv_genX_call() in anv_cmd_buffer.c & anv_blorp.c
Also a switch in anv_device.c in anv_device_init_dispatch.
If you just knock those off in the same patch, that would be great.
Thanks!
-
Lionel
On 22/03/18 20:58, Jordan Justen wrote:
Signed-off-by: Jordan Justen
Signed-off-by: Jordan Justen
---
src/intel/vulkan/anv_cmd_buffer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/intel/vulkan/anv_cmd_buffer.c
b/src/intel/vulkan/anv_cmd_buffer.c
index 8f4bf3f0bb9..33687920a38 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=105670
--- Comment #5 from Roland Scheidegger ---
(In reply to almos from comment #4)
> The problem is not loop unrolling. The problem is that userspace code can
> hang the GPU unrecoverably, and thus bringing down the entire
https://bugs.freedesktop.org/show_bug.cgi?id=105670
--- Comment #4 from almos ---
The problem is not loop unrolling. The problem is that userspace code can hang
the GPU unrecoverably, and thus bringing down the entire system.
BTW I can confirm this on Pitcairn with radeon
For the series,
Reviewed-by: Neha Bhende
Regards,
Neha
From: Brian Paul
Sent: Thursday, March 22, 2018 8:28:52 AM
To: mesa-dev@lists.freedesktop.org
Cc: Neha Bhende; Charmaine Lee
Subject: [PATCH 2/2] svga: simplify
For the series,
Reviewed-by: Neha Bhende
Regards,
Neha
From: Brian Paul
Sent: Thursday, March 22, 2018 8:29:16 AM
To: mesa-dev@lists.freedesktop.org
Cc: Neha Bhende; Charmaine Lee
Subject: [PATCH 3/3] st/mesa:
On 22 March 2018 at 18:46, Juan A. Suarez Romero wrote:
> Instead we will re-generate them again on building.
>
> v2: get rid of BUILT_SOURCES (Daniel, Emil)
> ---
> src/egl/Makefile.am | 15 ++-
> src/egl/wayland/wayland-drm/Makefile.am | 22
Instead we will re-generate them again on building.
v2: get rid of BUILT_SOURCES (Daniel, Emil)
---
src/egl/Makefile.am | 15 ++-
src/egl/wayland/wayland-drm/Makefile.am | 22 --
src/vulkan/Makefile.am | 15 ++-
3
Brian Paul writes:
> ---
> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 --
> src/mesa/state_tracker/st_glsl_to_tgsi.h | 2 +-
> 2 files changed, 5 insertions(+), 3 deletions(-)
This series is:
Reviewed-by: Eric Anholt
signature.asc
Description:
Reviewed-by: Lionel Landwerlin
On 22/03/18 18:22, Kenneth Graunke wrote:
This is just zero - passing nothing already gives us a post-sync
operation of "nothing".
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +---
"Juan A. Suarez Romero" writes:
> As the other VC4 files do. Otherwise, it won't find nir_builder.h
>
> v2: add path in source code rather changing autotools (Emil)
>
> Reviewed-by: Emil Velikov
Reviewed-by: Eric Anholt
On Thursday, 2018-03-22 11:17:55 -0700, Dylan Baker wrote:
> Quoting Eric Engestrom (2018-03-22 05:08:55)
> > On Monday, 2018-03-12 10:16:33 -0700, Dylan Baker wrote:
> > > Quoting Emil Velikov (2018-03-12 09:09:50)
> > > > On 12 March 2018 at 15:01, Eric Engestrom
> >
Brian Paul writes:
> Enums are nicer in gdb.
This series is:
Reviewed-by: Eric Anholt
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This is just zero - passing nothing already gives us a post-sync
operation of "nothing".
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +---
src/mesa/drivers/dri/i965/brw_pipe_control.c | 2 +-
src/mesa/drivers/dri/i965/brw_program.c | 4 +---
src/mesa/drivers/dri/i965/gen7_l3_state.c
On 21 March 2018 at 18:00, Lepton Wu wrote:
> Thanks all for review. Is there anything else missing for getting this
> committed?
Some of us tend to give extra 24h or so for other devs to send final
comments/R-B.
Everything seems silent so the series is in master now.
Quoting Eric Engestrom (2018-03-22 05:08:55)
> On Monday, 2018-03-12 10:16:33 -0700, Dylan Baker wrote:
> > Quoting Emil Velikov (2018-03-12 09:09:50)
> > > On 12 March 2018 at 15:01, Eric Engestrom
> > > wrote:
> > > > Signed-off-by: Eric Engestrom
On 03/22/2018 01:12 AM, Alejandro Piñeiro wrote:
> Looks good in general, just a comment below.
>
>
> On 22/03/18 01:58, Ian Romanick wrote:
>> From: Ian Romanick
>>
>> This method is similar to the existing ::equals methods. Instead of
>> testing that two src_regs
On 03/22/2018 01:12 AM, Alejandro Piñeiro wrote:
> Any reason to not add tests on test_vec4_cmod_propagation as the fs
> equivalent did?
Laziness. :)
> Also, two small comments below.
>
> On 22/03/18 01:58, Ian Romanick wrote:
>> From: Ian Romanick
>>
>> No changes on
Hey Tomasz,
On 03/22/2018 09:27 AM, Tomasz Figa wrote:
Hi Stefan,
On Thu, Mar 22, 2018 at 8:42 AM, Stefan Schake wrote:
Hey Robert,
On Wed, Mar 21, 2018 at 4:16 PM, Robert Foss wrote:
Hey,
I've started looking into removing the gralloc
This is imported from RadeonSI/ADMVLK. That might or might not
improve performance. Anyway, it's still disabled by default.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_pipeline.c | 56 +-
1 file changed, 55
To fix a regression in:
dEQP-VK.spirv_assembly.instruction.graphics.variable_init.output.struct
And the following regressions (Polaris only):
dEQP-VK.glsl.indexing.varying_array.*
v3: account for slots (Dave)
v2: handle indirect array accesses (Dave)
Fixes: f3275ca01c ("ac/nir: only enable used
https://bugs.freedesktop.org/show_bug.cgi?id=105670
--- Comment #3 from Roland Scheidegger ---
(In reply to Gert Wollny from comment #2)
> Regarding bisecting this, after a failure one usually must reboot the
> system, otherwise the graphics card is in a bad state. But given
On Thursday, March 22, 2018 9:02:11 AM PDT Lionel Landwerlin wrote:
> When registring configuration to the kernel for the first time, we run
> into an issue where the id number is not properly set. As a result
> when trying to use that id later on, we get an error.
>
> This issue manifest itself
On Wednesday, March 21, 2018 7:12:50 AM PDT Lionel Landwerlin wrote:
> There are a couple of ways we can get the fusing information from the
> kernel :
>
> - Through DRM_I915_GETPARAM with the SLICE_MASK/SUBSLICE_MASK
> parameters
>
> - Through the new DRM_IOCTL_I915_QUERY by requesting
On 22 March 2018 at 17:01, Daniel Stone wrote:
> Hi Juan,
>
> On 22 March 2018 at 16:49, Juan A. Suarez Romero wrote:
>> Instead we will re-generate them again on building.
>
> Thanks for sending the v2 - that looks good to me. There was some kind
> of
On Thu, 2018-03-22 at 17:01 +, Daniel Stone wrote:
> Hi Juan,
>
> On 22 March 2018 at 16:49, Juan A. Suarez Romero wrote:
> > Instead we will re-generate them again on building.
>
> Thanks for sending the v2 - that looks good to me. There was some kind
> of problem with
On Wednesday, March 21, 2018 7:12:48 AM PDT Lionel Landwerlin wrote:
> Required updates from drm-next for changes in i965.
>
> Signed-off-by: Lionel Landwerlin
> ---
> include/drm-uapi/README | 8 +--
> include/drm-uapi/drm_mode.h | 43 +---
>
Hi Juan,
On 22 March 2018 at 16:49, Juan A. Suarez Romero wrote:
> Instead we will re-generate them again on building.
Thanks for sending the v2 - that looks good to me. There was some kind
of problem with having the sources in BUILT_SOURCES though, which Emil
might be able
https://bugs.freedesktop.org/show_bug.cgi?id=105670
--- Comment #2 from Gert Wollny ---
I can confirm this on Radeon 6870 HD.
I was able to track the issue to the series beginning with
ab23b759f24 glsl: don't drop instructions from unreachable
Reviewed-by: Emil Velikov
---
src/gallium/drivers/swr/Makefile.am | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/swr/Makefile.am
b/src/gallium/drivers/swr/Makefile.am
index 13c7f8b7345..5ec9213c349 100644
---
As the other VC4 files do. Otherwise, it won't find nir_builder.h
v2: add path in source code rather changing autotools (Emil)
Reviewed-by: Emil Velikov
---
src/gallium/drivers/vc4/vc4_blit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Reviewed-by: Emil Velikov
---
Makefile.am | 1 +
src/gallium/winsys/tegra/drm/Makefile.sources | 1 +
2 files changed, 2 insertions(+)
diff --git a/Makefile.am b/Makefile.am
index de6921bf1fc..804b1d85353 100644
--- a/Makefile.am
+++
Reviewed-by: Emil Velikov
---
src/amd/vulkan/Makefile.am | 4
src/intel/Makefile.vulkan.am | 4
2 files changed, 8 insertions(+)
diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am
index cc1b53980fd..00b808229fa 100644
---
On Thu, 2018-03-22 at 14:16 +, Emil Velikov wrote:
> Can we merge the series as-is, until we untangle the dist bits?
Just sent a V2 following Daniel proposal.
J.A.
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mesa-dev mailing list
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Reviewed-by: Emil Velikov
---
src/compiler/Makefile.sources | 1 +
src/compiler/nir/meson.build | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index b231f2fa972..2dc48365507 100644
---
Reviewed-by: Emil Velikov
---
src/amd/vulkan/Makefile.sources | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/Makefile.sources b/src/amd/vulkan/Makefile.sources
index b0a8f8b97d8..ccb956a2396 100644
---
Instead we will re-generate them again on building.
---
src/egl/Makefile.am | 10 +-
src/egl/wayland/wayland-drm/Makefile.am | 8 ++--
src/vulkan/Makefile.am | 11 +--
3 files changed, 24 insertions(+), 5 deletions(-)
diff --git
This series fix several issues that happen when running "./autogen.sh && make
{dist, distcheck}".
This V2 is similar to V1, except for the first patch: we now exclude from dist
the generated wayland-scanner files.
Juan A. Suarez Romero (7):
waylan-drm: do not distribute generated sources
On 03/21/2018 11:06 AM, Eric Anholt wrote:
GTF-GLES3.gtf.GL3Tests.instanced_arrays.instanced_arrays_divisor uses -1
as a divisor,
Since GL's vertex attrib instance divisor is a GLuint, we can
alternately say the divisor is ~0, right?
so we would overflow to count=0 and upload no data,
On Thursday, 2018-03-22 15:28:49 +, Daniel Stone wrote:
> On 22 March 2018 at 15:20, Derek Foreman wrote:
> > commit 03dd9a88b0be17ff0ce91e92f6902a9a85ba584a introduced per surface
> > queues, but the display_sync for swrast_commit_backbuffer remained on
> > the old
On 03/21/2018 02:54 PM, Eric Anholt wrote:
There's nothing to worry about here -- the A channel just gets dropped by
the blit. This avoids a segfault in the fallback path when copying from a
RGBA16_SINT renderbuffer to a RGB16_SINT destination represented by an
RGBA16_SINT texture (the fallback
On Wed, Mar 21, 2018 at 3:08 PM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> On Wed, Mar 21, 2018 at 2:56 PM, Francisco Jerez
>> wrote:
>>> Matt Turner writes:
>>>
From Message Descriptor section
On Thu, Mar 22, 2018 at 11:46:57AM -0400, Ilia Mirkin wrote:
> With the minor whitespace issue I pointed out (which might also apply
> to 8/8, couldn't tell), this is
Looks like there is also a case in 5/8, will go over them and resubmit the ones
with wacky spacing.
(I think the issue here is
When registring configuration to the kernel for the first time, we run
into an issue where the id number is not properly set. As a result
when trying to use that id later on, we get an error.
This issue manifest itself the first time you use frameretrace after
reboot, subsequent runs are fine.
With the minor whitespace issue I pointed out (which might also apply
to 8/8, couldn't tell), this is
Reviewed-by: Ilia Mirkin
On Thu, Mar 22, 2018 at 11:26 AM, Wladimir J. van der Laan
wrote:
> While working on a205 support for i.MX51/53, I've also
On Thu, Mar 22, 2018 at 11:26 AM, Wladimir J. van der Laan
wrote:
> Extend translate_sge_slt to emit these, in analogous fashion
> but using CNDEv.
>
> Signed-off-by: Wladimir J. van der Laan
> ---
> src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 23
>
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index e9122072a8..8c406a572c 100644
--- a/src/amd/vulkan/radv_device.c
+++
Based on RadeonSI. Untested.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_device.c | 5 -
src/amd/vulkan/radv_pipeline.c | 1 +
src/amd/vulkan/si_cmd_buffer.c | 1 +
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git
Reviewed-by: Christian König
Am 22.03.2018 um 16:03 schrieb Marek Olšák:
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 --
src/mesa/state_tracker/st_glsl_to_tgsi.h | 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index fc53811..5f7a0dc 100644
---
---
src/mesa/state_tracker/st_atom_constbuf.c | 57 +++
1 file changed, 36 insertions(+), 21 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_constbuf.c
b/src/mesa/state_tracker/st_atom_constbuf.c
index 87a72b2..0c094dc 100644
---
---
src/mesa/state_tracker/st_atom_constbuf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_atom_constbuf.c
b/src/mesa/state_tracker/st_atom_constbuf.c
index 0c094dc..6455e61 100644
--- a/src/mesa/state_tracker/st_atom_constbuf.c
+++
---
src/gallium/drivers/svga/svga_tgsi_emit.h | 12 ++--
src/gallium/drivers/svga/svga_tgsi_insn.c | 19 ++-
2 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_tgsi_emit.h
b/src/gallium/drivers/svga/svga_tgsi_emit.h
index
---
src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
index 04d8303..4292894 100644
--- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
+++
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index bbbf101..b5b4869 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++
On 22 March 2018 at 15:20, Derek Foreman wrote:
> commit 03dd9a88b0be17ff0ce91e92f6902a9a85ba584a introduced per surface
> queues, but the display_sync for swrast_commit_backbuffer remained on
> the old queue. This is likely to break when dispatching the correct
> queue
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c | 8
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 12
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index
---
src/gallium/drivers/svga/svga_tgsi_insn.c | 2 +-
src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c
b/src/gallium/drivers/svga/svga_tgsi_insn.c
index be99ad5..c08809c 100644
---
Need to update the tgsi code and st_glsl_to_tgsi code at the same time
to prevent compile break since C++ is much pickier about implicit
enum/unsigned casting.
Bump size of glsl_to_tgsi_instruction::op to 10 bits to be sure to
avoid MSVC signed enum overflow issue. No change in class size.
---
---
src/gallium/auxiliary/tgsi/tgsi_exec.h | 4 ++--
src/gallium/drivers/softpipe/sp_buffer.c | 4 ++--
src/gallium/drivers/softpipe/sp_image.c | 8
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h
---
src/gallium/auxiliary/tgsi/tgsi_build.c | 2 +-
src/gallium/auxiliary/tgsi/tgsi_lowering.c | 6 +++---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 6 +++---
src/gallium/auxiliary/tgsi/tgsi_transform.c | 2 +-
src/gallium/auxiliary/tgsi/tgsi_transform.h | 12 ++--
5 files
Enums are nicer in gdb.
---
src/gallium/include/pipe/p_shader_tokens.h | 548 +++--
1 file changed, 275 insertions(+), 273 deletions(-)
diff --git a/src/gallium/include/pipe/p_shader_tokens.h
b/src/gallium/include/pipe/p_shader_tokens.h
index 4e95789..f4e45c2 100644
---
The version passed to QueryVersion requests is the version that the
client supports. We were just passing in whatever version of XCB was
present on the system, which may not be a version that Mesa actually
explicitly supports, e.g. it might bring unwanted semantics.
Set specific protocol versions
Use DOT2ADDv instruction with 0.0f constant add.
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
Add support for:
- PIPE_FORMAT_ETC1_RGB8
- PIPE_FORMAT_DXT1_RGB
- PIPE_FORMAT_DXT1_RGBA
- PIPE_FORMAT_DXT3_RGBA
- PIPE_FORMAT_DXT5_RGBA
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/fd2_util.c | 11 +++
1 file changed, 11 insertions(+)
Change use of BLEND_ to BLEND2_,
BLEND_* a3xx_rb_blend_opcode
BLEND2_* is a2xx_rb_blend_opcode
This makes no effective difference as the used enumerant has the same
value (0), but the other enumerants do not match 1-to-1 so this will
avoid future problems.
Signed-off-by: Wladimir J. van
Denormalized texture coordinates are required for text rendering in
GALLIUM_HUD.
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 3 ++-
src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 +
Extend translate_sge_slt to emit these, in analogous fashion
but using CNDEv.
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git
The format enumeration comes comes from the yamoto
register headers that are part of the amd-gpu kernel driver.
(see freedreno envytools commit 1b32c444f82cd7144d71602106462f59f146c1d0)
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/a2xx.xml.h |
Textures will sometimes be updated if texture view state was
un-set, without this change that causes an assertion crash or
segfault.
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 13 ++---
1 file changed, 10 insertions(+),
While working on a205 support for i.MX51/53, I've also written some patches
that are not specific to a20x but should apply to the whole a2xx range.
As I'm figuring out how to handle backward compatibility to other a2xx, I
think it makes sense to send these upstream already to reduce the patch
Compose swizzles using util_format_compose_swizzles instead
of the custom code (which somehow had a bug).
This makes the GL_ALPHA internal format work.
Signed-off-by: Wladimir J. van der Laan
---
src/gallium/drivers/freedreno/a2xx/fd2_util.c | 18 +-
1 file
And improve the unreachable() error message.
---
src/mesa/state_tracker/st_glsl_types.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_types.cpp
b/src/mesa/state_tracker/st_glsl_types.cpp
index ef7b7fa..baba2d4 100644
---
commit 03dd9a88b0be17ff0ce91e92f6902a9a85ba584a introduced per surface
queues, but the display_sync for swrast_commit_backbuffer remained on
the old queue. This is likely to break when dispatching the correct
queue at the top of function (which can't dispatch the sync callback
we're waiting for).
From: Marek Olšák
Reviewed-by: Alex Deucher
---
src/amd/addrlib/addrinterface.cpp| 32 -
src/amd/addrlib/addrinterface.h | 62 ++
src/amd/addrlib/addrtypes.h | 6 +-
src/amd/addrlib/amdgpu_asic_addr.h | 3 +
From: Marek Olšák
Reviewed-by: Alex Deucher
---
include/pci_ids/radeonsi_pci_ids.h | 6 +
src/amd/common/ac_llvm_util.c | 1 +
src/amd/common/ac_surface.c | 33 +++--
From: Marek Olšák
---
src/amd/common/ac_gpu_info.c | 50
src/amd/common/ac_gpu_info.h | 1 +
2 files changed, 51 insertions(+)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 7740b46b7b9..22b5a73143d 100644
---
From: Marek Olšák
---
src/amd/common/ac_gpu_info.c | 107 ---
src/amd/common/ac_gpu_info.h | 24 ++
2 files changed, 76 insertions(+), 55 deletions(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
From: Marek Olšák
---
src/amd/common/ac_gpu_info.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 73fc36203c1..ca556a8b11f 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
From: Marek Olšák
---
src/amd/common/ac_gpu_info.c | 2 +-
src/amd/common/ac_gpu_info.h | 2 +-
src/gallium/drivers/r600/r600_buffer_common.c | 4 ++--
src/gallium/drivers/r600/r600_cs.h| 2 +-
On Thu, Mar 22, 2018 at 10:43 AM, Wladimir J. van der Laan
wrote:
> Hello Ilia,
>
> On Thu, Jan 25, 2018 at 08:41:11AM -0500, Ilia Mirkin wrote:
>> Should you also expose PIPE_CAP_TEXTURE_RECTANGLE? (Or whatever it's
>> called... I forget.)
>
> I checked and I don't think a
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