On Tue 24 Jan 2017, Lionel Landwerlin wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/vulkan/anv_device.c | 593
> +
> src/intel/vulkan/anv_formats.c | 42 +++
> 2 files changed, 398 insertions(+), 237
and <ja...@jlekstrand.net>
> Cc: Shawn Starr <shawn.st...@rogers.com>
> Cc: Chad Versace <chadvers...@chromium.org>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99446
> Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
> ---
> Slightly pedanti
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
>return ISL_FORMAT_R24_UNORM_X8_TYPELESS;
> case MESA_FORMAT_Z_FLOAT32:
> + case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
>return ISL_FORMAT_R32_FLOAT;
> case MESA_FORMAT_Z_UNORM16:
>
On Mon 23 Jan 2017, Jason Ekstrand wrote:
> On Mon, Jan 23, 2017 at 3:31 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> On Mon 23 Jan 2017, Jason Ekstrand wrote:
> > On Mon, Jan 23, 2017 at 2:28 PM, Chad Versace <chadvers..
Bump. Requesting more review please.
On Fri 13 Jan 2017, Chad Versace wrote:
> This series depends on fence fd support in I915_GEM_EXECBUFFER2, which
> isn't upstream in libdrm nor the kernel yet. I tested this with kmscube
> on Skylake, and everything looked good to me.
>
>
On Fri 20 Jan 2017, Rafael Antognolli wrote:
> I have tested this series with the branches that you mentioned, and with
> piglit with the patches from my own branch:
>
> https://github.com/rantogno/piglit/tree/review/fences-v02
>
> Everything seems to work fine. You can add:
>
> Tested-by:
On Mon 23 Jan 2017, Jason Ekstrand wrote:
> On Mon, Jan 23, 2017 at 2:28 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> Implement each vkFoo2KHR() by trivially passing it through to the
> original vkFoo().
>
>
> As I mentioned to Lionel when he w
Implement each vkFoo2KHR() by trivially passing it through to the
original vkFoo().
---
I tested this patch with a little demo app, but I haven't ran any CTS tests
with it. If CTS tests do exit (I'm searching for them now), I'll run
them against this patch before pushing.
On Thu 19 Jan 2017, Jason Ekstrand wrote:
> Reviewed-by: Jason Ekstrand
And pushed.
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() didn't fully
disable HiZ.
Please give some reviewed-by's and tested-by's.
On Wed 04 Jan 2017, Chad Versace wrote:
> Fixes crash in piglit
> `egl_khr_gl_renderbuffer_image-clear-shared-image GL_DEPTH_COMPONENT24`
> on Skylake.
>
> The crash happened because blorp attempted to execut
On Wed 18 Jan 2017, Juan A. Suarez Romero wrote:
> Commit 42011be1e disabled HiZ when sharing depth buffer externally,
> which free HiZ buffer.
>
> But in emit_depth_packets() we use that buffer, which generates a crash
> in
>
This a refactor patch; no expected changed in behavior.
Add `enum brw_fence_type` and brw_fence::type. There is only one type
currently, BRW_FENCE_TYPE_BO_WAIT. This patch reduces a lot of noise in
the next, which adds new type BRW_FENCE_TYPE_SYNC_FD.
---
src/mesa/drivers/dri/i965/brw_sync.c |
Rename to brw_fence_insert_locked(). This is correct because the fence's
mutex is effectively locked, as all callers are also *creators* of the
fence, and have not yet returned the new fence.
This reduces noise in the next patch, which defines and uses
brw_fence_insert(), an unlocked variant.
---
Required to implement EGL_ANDROID_native_fence_sync on i965.
Specifically, i965 needs drm_intel_gem_bo_exec_fence(),
I915_PARAM_HAS_EXEC_FENCE, and libsync.h.
TODO: Pick real libdrm version after Intel exec fences land.
---
configure.ac | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
This patch implements a new type of struct brw_fence, one that is based
struct sync_file.
This completes support for EGL_ANDROID_native_fence_sync.
* Background
Linux 4.7 added a new file type, struct sync_file. See
commit 460bfc41fd52959311ed0328163f785e023857af
Author: Gustavo
Pre-patch, brw_sync.c ignored the return value of
intel_batchbuffer_flush().
When intel_batchbuffer_flush() fails during eglCreateSync
(brw_dri_create_fence), we now give up, cleanup, and return NULL.
When it fails during glFenceSync, however, we blindly continue and hope
for the best because
A variant of intel_batchbuffer_flush() with parameters for in and out
fence fds.
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 24 ++--
src/mesa/drivers/dri/i965/intel_batchbuffer.h | 14 --
2 files changed, 26 insertions(+), 12 deletions(-)
diff --git
This bool maps to I915_PARAM_HAS_EXEC_FENCE_FD.
TODO: The i915 param is not yet upstream. Wait for the kernel interface
before committing.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
src/mesa/drivers/dri/i965/intel_screen.h | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
/kmscube/tag/?h=chadv/test/fences-v02
I submitted the libdrm patches to the intel-gfx list. Someone else
should submit the kernel patches, as I tested them but don't grok them.
Chad Versace (7):
i965: Add intel_screen::has_fence_fd
i965: Add intel_batchbuffer_flush_fence()
i965/sync: Add brw_fence
This patch implements vk_icdNegotiateLoaderICDInterfaceVersion(), which
brings us to loader interface v3.
v2:
- Drop the pragmas. [emil]
- Advertise v3 instead of v2. Anvil supported more than I
thought. [jason]
- s/Surface/SurfaceKHR/ in comments. [emil]
Cc: Emil Velikov
On Wed 11 Jan 2017, Emil Velikov wrote:
> On 11 January 2017 at 03:59, Jason Ekstrand <ja...@jlekstrand.net> wrote:
> > On Tue, Jan 10, 2017 at 7:17 PM, Chad Versace <chadvers...@chromium.org>
> > wrote:
> >>
> >> Loader interface v2 differs from v1
On Tue 10 Jan 2017, Jason Ekstrand wrote:
> On Tue, Jan 10, 2017 at 7:17 PM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> Loader interface v2 differs from v1 in that the first ICD entrypoint
> called by the loader is vk_icdNegotiateLoad
On Tue 10 Jan 2017, Jason Ekstrand wrote:
> I thought for sure we supported at least v2... In any case, go for it.
No. We only supported v1. And I just sent patches to support v2.
Dave, I tested that I didn't break the radv build. But you should
probably double-check for me.
Import from commit f2aeefec on branch 'master'
of https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers.
---
include/vulkan/vk_icd.h | 110 ++--
1 file changed, 78 insertions(+), 32 deletions(-)
diff --git a/include/vulkan/vk_icd.h
Loader interface v2 differs from v1 in that the first ICD entrypoint
called by the loader is vk_icdNegotiateLoaderICDInterfaceVersion(), not
vk_icdGetInstanceProcAddr(). The ICD must statically expose this
entrypoint.
---
src/intel/vulkan/anv_device.c | 43
that radv continues to build after this series.
Chad Versace (3):
vulkan: Add new cast macros for VkIcd types
vulkan: Update vk_icd.h to interface version 3
anv: Support loader interface version 2
include/vulkan/vk_icd.h | 110 +---
src/amd/vulkan
We can't import the latest vk_icd.h because the new header breaks the
Mesa build. This patch defines new casting macros,
ICD_DEFINE_NONDISP_HANDLE_CASTS() and ICD_FROM_HANDLE(), which can
handle both the old and new vk_icd.h, and will prevent the build from
breaking when we update the header.
In
I've begun working on updating vk_icd.h to the latest upstream version,
and adding Anvil support for the new interface. Mesa today supports
loader interface v1; the latest interface is v3.
I don't want to duplicate work that my already been done. So...
Has anyone already completed this on a
ctional.buffer_age.*
>
> Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98330
> ---
> src/mesa/drivers/dri/i965/intel_pixel_read.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
Makes sense
This patch has a regressing side-effect: it disables CCS for all single-sample
miptrees created by glRenderbufferStorage(). After stepping through some Piglit
tests, I believe the problem is that line 161 below always returns false for
such miptrees because mt->is_scanout is true. I don't
Fixes crash in piglit
`egl_khr_gl_renderbuffer_image-clear-shared-image GL_DEPTH_COMPONENT24`
on Skylake.
The crash happened because blorp attempted to execute a pending hiz
clear after the hiz buffer was deleted. Deleting the pending hiz ops
when the hiz buffer gets deleted fixes the crash.
For
Pre-patch, if the user created an EGLImage from an intel_mipmap_tree
before the miptree's first use, then intel_miptree_make_shareable()
failed to prevent later creation of the miptree's auxilliary surface.
This results in the original, exported miptree possessing an auxilliary
surface, but the
On Tue 03 Jan 2017, Ben Widawsky wrote:
> On 17-01-03 08:21:06, Chad Versace wrote:
> > On Sun 01 Jan 2017, Ben Widawsky wrote:
> > > Cc: Topi Pohjolainen <topi.pohjolai...@intel.com>
> > > Cc: Chad Versace <chadvers...@chromium.org>
> > >
irable after a recent patch from
> Chad:
>
> commit 1c8be049bea786c2c054a770025976beba5b8636
> Author: Chad Versace <chadvers...@chromium.org>
> Date: Fri Dec 9 16:18:11 2016 -0800
>
> i965/mt: Disable aux surfaces after making miptree shareable
>
> The nex
On Sun 01 Jan 2017, Ben Widawsky wrote:
> Cc: Topi Pohjolainen <topi.pohjolai...@intel.com>
> Cc: Chad Versace <chadvers...@chromium.org>
> Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 2 +-
>
Fixes tests 'dEQP-GLES3.functional.texture.mipmap.*.generate.rgba5551*' on
Intel Broadwell 0x1616.
The GL 4.5 spec describes the algorithm of glGenerateMipmap as:
The contents of the derived images are computed by repeated, filtered
reduction of the level base image. [...] No particular
Use atomic ops when updating gl_shader::RefCount.
Fixes intermittent failures and crashes in
'dEQP-EGL.functional.sharing.gles2.multithread.*'.
All tests in that group now pass except
The spec implicitly allows the incoming count to be 0. From the Vulkan
1.0.38 spec, Section 4.1 Physical Devices:
If the value referenced by pQueueFamilyPropertyCount is not 0 [then
do stuff].
Cc: Damien Grassart
---
src/intel/vulkan/anv_device.c | 9 -
1
t;dam...@grassart.com>
> ---
> src/intel/vulkan/anv_device.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Chad Versace <chadvers...@chromium.org>
And pushed.
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Fixes dEQP-EGL.functional.create_context_ext.robust_*
on Intel with GBM.
If the user sets the EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR in
EGL_CONTEXT_FLAGS_KHR when creating an OpenGL ES context, then
EGL_KHR_create_context spec requires that we unconditionally emit
EGL_BAD_ATTRIBUTE because that
To my knowledge, this fixes no tests. I simply wrote the patch for
completeness as a follow-up to the previous two patches.
v2: Fix copy-paste error.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
This allows eglCreateImage() to accept textures of said format.
Patch 1/2 to fix
dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8
on Intel.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99185
---
include/GL/internal/dri_interface.h| 2 ++
hardware supports BRW_SURFACE_FORMAT_B5G5R5A1_UNORM, so teach
glTexImage2D to choose that instead.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99185
Chad Versace (3):
dri: Add __DRI_IMAGE_FORMAT_ARGB1555
mesa/texformat: Handle GL_RGBA + GL_UNSIGNED_SHORT_5_5_5_1
i965: Allow import/export
_mesa_choose_tex_format() already handles GL_RGBA +
GL_UNSIGNED_SHORT_1_5_5_5_REV
by converting it to MESA_FORMAT_B5G5R5A1_UNORM. Teach it do the same for
the non-reversed type. Otherwise, the switch's fallthrough converts it
to an format, which has incompatible precision in the alpha
To my knowledge, this fixes no tests. I simply wrote the patch for
completeness as a follow-up to the previous two patches.
---
src/mesa/drivers/dri/i965/intel_screen.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
On Wed 21 Dec 2016, Xu, Randy wrote:
> Hi, Kenneth
>
> The patch https://android-review.googlesource.com/#/c/291429/ for GLES3.1 has
> been merged to dEQP master branch, so expect the GLES3 change should be
> merged also.
> In this case, we don't need this change in Mesa.
The dEQP maitainers
row
>
> v2: avoid unnecessary x11 roundtrips (Chad Versace)
>
> Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98327
> ---
> src/egl/drivers/dri2/platform_x11.c | 36
> 1 f
yet another.
I have more comments below.
> -Original Message-
> From: Ian Romanick [mailto:i...@freedesktop.org]
> Sent: Saturday, December 17, 2016 6:02 AM
> To: Chad Versace <chadvers...@chromium.org>; Xu, Randy <randy...@intel.com>;
> mesa-dev@lists.freedesk
On Mon 19 Dec 2016, Tapani Pälli wrote:
>
>
> On 12/17/2016 03:58 AM, Chad Versace wrote:
> > Happy Christmas to everyone who's busy squashing dEQP bugs.
> >
> > I wrote a new GBM backend for dEQP. I even submitted it to dEQP's
> > upstream Gerrit. Pyry, dEQ
On Tue 20 Dec 2016, Tapani Pälli wrote:
> This makes better guarantee that the values we return are
> in sync what the underlying drawable currently has.
>
> Together with dEQP change bug #98327 this fixes following test:
>
>dEQP-EGL.functional.resize.surface_size.grow
>
> Signed-off-by:
On Fri 16 Dec 2016, Chad Versace wrote:
> Happy Christmas to everyone who's busy squashing dEQP bugs.
>
> I wrote a new GBM backend for dEQP. [...]
> There's probably bugs. No surprises there.
You probably want this Mesa patch before using dEQP on GBM. It fixes
some EGL failures
If the provided EGLConfig does not support the requested surface type,
then emit EGL_BAD_MATCH.
Fixes dEQP-EGL.functional.negative_api.create_pbuffer_surface
on GBM.
Cc: "13.0"
---
src/egl/main/eglapi.c | 10 ++
1 file changed, 10 insertions(+)
diff
Happy Christmas to everyone who's busy squashing dEQP bugs.
I wrote a new GBM backend for dEQP. I even submitted it to dEQP's
upstream Gerrit. Pyry, dEQP's maintainer, told me over beer earlier
this year that he would accept it if I submitted it, and if it wasn't
too crazy. So, maybe it'll be
On Fri 16 Dec 2016, Chad Versace wrote:
> On Fri 16 Dec 2016, Randy Xu wrote:
> > From: "Xu,Randy" <randy...@intel.com>
> >
> > The ES specification says that TexImage3D should return GL_INVALID_OPERATION
> > if the internal format is DEPTH
On Fri 16 Dec 2016, Randy Xu wrote:
> From: "Xu,Randy"
>
> The ES specification says that TexImage3D should return GL_INVALID_OPERATION
> if the internal format is DEPTH_COMPONENT, DEPTH_-STENCIL or STENCIL_INDEX.
> The current code returns INVALID_ENUM as
On Thu 15 Dec 2016, Emil Velikov wrote:
> Hi Chad,
>
> On 10 December 2016 at 00:40, Chad Versace <chadvers...@chromium.org> wrote:
> > intel_miptree_make_shareable() discarded and disabled CCS. Fix it so
> > that it discards and disables HiZ t
On Wed 14 Dec 2016, Emil Velikov wrote:
> On 13 December 2016 at 22:40, Chad Versace <chadvers...@chromium.org> wrote:
> > Don't dereference a null EGLDisplay.
> >
> > Fixes tests
> > dEQP-EGL.functional.negative_api.
Don't dereference a null EGLDisplay.
Fixes tests
dEQP-EGL.functional.negative_api.create_pbuffer_surface
dEQP-EGL.functional.negative_api.create_pixmap_surface
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99038
---
src/egl/main/eglapi.c | 4 ++--
1 file changed, 2 insertions(+), 2
intel_miptree_make_shareable() discarded and disabled CCS. Fix it so
that it discards and disables HiZ too.
Fixes
dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer
on Skylake.
v2: Actually do what the commit message says. Discard the HiZ buffer.
Fixes:
intel_miptree_make_shareable() discarded and disabled CCS. Fix it so
that it discards and disables HiZ too.
Fixes
dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer
on Skylake.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=98329
Cc: Haixia Shi
The inescapable vortex of HiZ finds me wherever I go...
This series brings us one step closer to passing the Android N CTS.
See https://bugs.freedesktop.org/show_bug.cgi?id=98329.
Chad Versace (2):
i965/mt: Disable aux surfaces after making miptree shareable
i965/mt: Disable HiZ when
The entire goal of intel_miptree_make_shareable() is to permanently
disable the miptree's aux surfaces. So set
intel_mipmap_tree:disable_aux_buffers after the function's done with
discarding down the aux surfaces.
References: https://bugs.freedesktop.org/show_bug.cgi?id=98329
Cc: Haixia Shi
---
src/intel/vulkan/anv_device.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index d594df7d3b..e3d278df73 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1246,11
Hi Rob, just checking on the status on the patch set. Do you plan to
send a revised series or commit them as-is? I ask because my i965
patches depend on your patches 1-4, and I'm trying to decide to when to
resend them.
On Fri 18 Nov 2016, Rob Clark wrote:
> This patchset implements support for
Jason Ekstrand <jason.ekstr...@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Thanks for fixing this. The bug bit me too.
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Fri 18 Nov 2016, Rob Clark wrote:
> From: Rob Clark <robcl...@freedesktop.org>
>
> With fixes from Chad squashed in, plus fixes for issues that Rafael
> found while writing piglit tests.
>
> Cc: Chad Versace <chadvers...@chromium.org>
> Cc: Rafael Antogn
Patches 1-3 are
Reviewed-by: Chad Versace <chadvers...@chromium.org>
Tested-by: Chad Versace <chadvers...@chromium.org>
I tested them with Rafael's Piglit tests and my in-flight i965 patches.
However, patch 4 causes one of Rafael's tests to segfault. I've replied
to patch
On Thu 03 Nov 2016, Jason Ekstrand wrote:
>
>
> On Thu, Nov 3, 2016 at 10:59 AM, Chad Versace <chadvers...@chromium.org>
> wrote:
>
> On Wed 02 Nov 2016, Jason Ekstrand wrote:
> > @@ -1116,6 +1117,11 @@ VkResult anv_QueueSubmit(
> >
On Wed 02 Nov 2016, Jason Ekstrand wrote:
> Our previous fence implementation was very simple. Fences had two states:
> signaled and unsignaled. However, this didn't properly handle all of the
> edge-cases that we need to handle. In order to handle the case where the
> client calls
semaphore, pImageIndex);
> +
> + /* Thanks to implicit sync, the image is ready immediately. */
> + fence->ready = true;
> +
> + return result;
> }
Looks good (at least until explicit sync arrives).
Reviewed-by: Chad Versace <chadvers...@chromium.org>
M_HANDLE(anv_event, event, _event);
>
> anv_batch_emit(_buffer->batch, GENX(PIPE_CONTROL), pc) {
> + if (stageMask & PIPELINE_STAGE_PIPELINED_BITS) {
> + pc.StallAtPixelScoreboard = true;
> + pc.CommandStreamerStallEnable = true;
> + }
> +
> pc.DestinationAddre
Explain why it's 64-bit and its valid values.
---
src/intel/vulkan/anv_private.h | 4
1 file changed, 4 insertions(+)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 8f5a95b..0924ccf 100644
--- a/src/intel/vulkan/anv_private.h
+++
and pbuffer.
>
> Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98326
> Cc: "12.0 13.0" <mesa-sta...@lists.freedesktop.org>
> ---
> src/egl/main/eglsurface.c | 6 +-
> 1 file changed, 5
Since commit 63c5d5c6c46c8472ee7a8241a0f80f13d79cb8cd, the surfaceless
platform has allowed creation of pbuffer surfaces. But the vtable entry
for eglSwapBuffers has remained NULL.
Discovered by running a little pbuffer test.
Cc: Gurchetan Singh
---
s: 4b8a55809eb ("egl/surfaceless: tweak
> > surfaceless_add_configs_for_visuals()")
> > Reported-by: Chad Versace <chadvers...@chromium.org>
> > Cc: Chad Versace <chadvers...@chromium.org>
> > Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
Since m
Fixes GCC warning:
drivers/dri2/platform_surfaceless.c:196:18: warning: comparison
between pointer and integer
Fixes: 4b8a55809eb ("egl/surfaceless: tweak
surfaceless_add_configs_for_visuals()")
Cc: Emil Velikov
---
src/egl/drivers/dri2/platform_surfaceless.c
On Fri 14 Oct 2016, Emil Velikov wrote:
> From: Emil Velikov <emil.veli...@collabora.com>
>
> i is used for the driver_configs, while j is for the visuals.
>
> Fixes: 4b8a55809eb ("egl/surfaceless: tweak
> surfaceless_add_configs_for_visuals()")
>
On Fri 16 Sep 2016, Emil Velikov wrote:
> From: Emil Velikov
>
> Analogous to previous commit.
>
> v2: Use correct comparison in loop conditional (Eric)
> Use valid C initializer (Gurchetan)
>
> Signed-off-by: Emil Velikov
>
Some people privately asked why we need to create this EGL platform.
I want to respond publicly.
Mesa *already* *has* this EGL platform. In my view, the issue at hand
isn't whether to create or to not create the platform. It's whether to
specify its behavior (formally in an extension spec) or
Document the EGL enum ranges for Mesa and those values allocated by the
following extensions:
EGL_MESA_drm_image
EGL_MESA_platform_gbm
EGL_MESA_platform_surfaceless
EGL_WL_bind_wayland_display
---
docs/specs/enums.txt | 27 ++-
1 file changed, 26
/?h=review/EGL_MESA_platform_surfaceless-v01
Chad Versace (6):
docs: Add EGL_MESA_platform_surfaceless.txt (v2)
egl: Don't advertise unsupported platform extensions
egl: Implement EGL_MESA_platform_surfaceless
egl: Move old EGL_MESA_screen_surface spec
doc/specs: Reference the Khronos registry
It was the lone file in src/egl/docs. Move it to where the other specs
live, in $MESA_TOP/docs/specs.
---
.../EGL_MESA_screen_surface => docs/specs/OLD/EGL_MESA_screen_surface.txt | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename src/egl/docs/EGL_MESA_screen_surface =>
Years ago Khronos replaced the registry's spec files with newfangled XML
files. Update the reference in doc/specs/enum.txt accordingly.
---
docs/specs/enums.txt | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/docs/specs/enums.txt b/docs/specs/enums.txt
index
---
include/EGL/eglmesaext.h | 5 +
src/egl/main/eglapi.c | 42 +-
src/egl/main/egldisplay.c | 21 +
src/egl/main/egldisplay.h | 5 +
src/egl/main/eglglobals.c | 3 +++
5 files changed, 75 insertions(+), 1 deletion(-)
+
+MESA_platform_surfaceless
+
+Name Strings
+
+EGL_MESA_platform_surfaceless
+
+Contributors
+
+Chad Versace <chadvers...@google.com>
+Haixia Shi <h...@google.com>
+Stéphane Marchesin <marc...@google.com>
+Zach Reizner <za...@chromium.org>
+Gurc
Mesa's set of supported platform extensions depends on the autoconf
option --with-egl-platforms=foo,bar,baz. If --with-egl-platforms lacks
foo, then eglGetPlatformDisplay(EGL_PLATFORM_FOO, ...) unconditonally
fails.
So, if --with-egl-platforms lacks foo, then remove
EGL_VENDOR_platform_foo from
On Thu 13 Oct 2016, Chad Versace wrote:
> On Fri 23 Sep 2016, Chad Versace wrote:
>
> > diff --git a/docs/specs/EGL_MESA_platform_surfaceless.txt
> > b/docs/specs/EGL_MESA_platform_surfaceless.txt
> > new file mode 100644
> > index 000..b700370
> >
On Fri 23 Sep 2016, Chad Versace wrote:
> diff --git a/docs/specs/EGL_MESA_platform_surfaceless.txt
> b/docs/specs/EGL_MESA_platform_surfaceless.txt
> new file mode 100644
> index 000..b700370
> --- /dev/null
> +++ b/docs/specs/EGL_MESA_platform_surfaceless.txt
> @@ -0
efer `#pragma once` to #ifndef guards. But
I understand that you want consistency. Do you plan to update all the
headers?
For patches 6-12,
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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(+), 12 deletions(-)
Patches 1-5 are
Reviewed-by: Chad Versace <chadvers...@chromium.org>
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On Tue 11 Oct 2016, Emil Velikov wrote:
> On 10 October 2016 at 20:41, Rob Clark <robdcl...@gmail.com> wrote:
> > On Mon, Oct 10, 2016 at 1:43 PM, Chad Versace <chadvers...@chromium.org>
> > wrote:
> >> Testing:
> >>
> >> I haven't yet t
Rename to brw_fence_insert_locked(). This is correct because the fence's
mutex is effectively locked, as all callers are also *creators* of the
fence, and have not yet returned the new fence.
This reduces noise in the next patch, which defines and uses
brw_fence_insert(), an unlocked variant.
---
This patch implements a new type of struct brw_fence, one that is based
struct sync_file.
This completes support for EGL_ANDROID_native_fence_sync.
* Background
Linux 4.7 added a new file type, struct sync_file. See
commit 460bfc41fd52959311ed0328163f785e023857af
Author: Gustavo
Pre-patch, brw_sync.c ignored the return value of
intel_batchbuffer_flush().
When intel_batchbuffer_flush() fails during eglCreateSync
(brw_dri_create_fence), we now give up, cleanup, and return NULL.
When it fails during glFenceSync, however, we blindly continue and hope
for the best because
From: Chad Versace <chad.vers...@intel.com>
Close the sync fd *after* the sync's refcount drops to 0.
---
src/egl/drivers/dri2/egl_dri2.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
From: Chad Versace <chad.vers...@intel.com>
This bool maps to I915_PARAM_HAS_EXEC_FENCE_FD.
TODO: The i915 param is not yet upstream. Wait for the kernel interface
before committing.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
src/mesa/drivers/dri/i965/intel_screen.h | 2
This a refactor patch; no expected changed in behavior.
Add `enum brw_fence_type` and brw_fence::type. There is only one type
currently, BRW_FENCE_TYPE_BO_WAIT. This patch reduces a lot of noise in
the next, which adds new type BRW_FENCE_TYPE_SYNC_FD.
---
src/mesa/drivers/dri/i965/brw_sync.c |
Add EGL_KHR_debug tracing to eglDupNativeFenceFDANDROID, because all EGL
entrypoints support tracing now.
---
src/egl/main/eglapi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index 3c0b017..449a2be 100644
--- a/src/egl/main/eglapi.c
+++
From: Chad Versace <chad.vers...@intel.com>
A variant of intel_batchbuffer_flush() with parameters for in and out
fence fds.
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 25 +++--
src/mesa/drivers/dri/i965/intel_batchbuffer.h | 14 --
2 files chang
From: Chad Versace <chad.vers...@intel.com>
Don't set SyncCondition twice.
---
src/egl/main/eglsync.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index ccfa474..b1b8c43 100644
--- a/src/egl/main/eglsync.c
+++ b/src/egl/main/egl
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