[Mesa-dev] [PATCH] [V2] i965: Context aware user space EU control through application

igh/medium/low for their platform & then program contexts accordingly. Here gpu_load_type directly translates to number of shader cores/EUs a particular GPU has. V2 : changes for setting the loadtype through setparam. Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanj

[Mesa-dev] [PATCH 2/2] i965: Context aware user space EU control through application

igh/medium/low for their platform & then program contexts accordingly. Here gpu_load_type directly translates to number of shader cores/EUs a particular GPU has. Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanje Signed-off-by: Praveen Diwakar Signed-off-by:

[Mesa-dev] [PATCH 1/2] RFC : Context aware user space Resource control

gpu_load_type directly translates to number of shader cores/EUs a particular GPU has. Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanje Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe --- include/EGL/eglext.h | 8 inclu

[Mesa-dev] [PATCH v4] i965 : optimized bucket index calculation

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> Reducing Bucket index calculation to O(1). This algorithm calculates the index using matrix method. Matrix arrangement is as below: Assuming PAGE_SIZE is 4096. 1*4096 2*40963*40964*4096 5*4096

[Mesa-dev] [PATCH v3] i965 : optimized bucket index calculation

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> Now the complexity has been reduced to O(1) Algorithm calculates the index using matrix method. Matrix arrangement is as below: Assuming PAGE_SIZE is 4096. 1*4096 2*40963*40964*4096 5*4096 6*409

[Mesa-dev] [PATCH v3] i965 : optimized bucket index calculation.

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> Avoiding the loop which was running with O(n) complexity. Now the complexity has been reduced to O(1) Algorithm calculates the index using matrix method. Matrix arrangement is as below: Assuming PAGE_SIZE is 4096.

[Mesa-dev] [PATCH v2] i965 : optimized bucket index calculation

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> Avoiding the loop which was running with O(n) complexity. Now the complexity has been reduced to O(1) Algorithm calculates the index using matrix method. Matrix arrangement is as below: Assuming PAGE_SIZE is 4096. 1*40

[Mesa-dev] [PATCH] i965 : optimized bucket index calculation

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> Avoiding the loop which was running with O(n) complexity. Now the complexity has been reduced to O(1) Tested with piglit. Slight performance improvement (~1%) in 3d mark. Change-Id: Id099f1cd24ad5b691a69070eda79b8f4e9be39a6 Sign

[Mesa-dev] [PATCH] i965: Avoids loop for buffer object availability in add_exec_bo

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> Original logic loops over the list for every buffer object. Maintained a flag to identify whether bo is already there in list. Improves performance - 3DMark by 2% Tested with piglit Signed-off-by: Aravindan Muth

[Mesa-dev] [PATCH V3] i965 : Optimize atom state flag checks

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> This patch improves CPI Rate(Cycles per Instruction) and branch miss predict for i965. The function check_state() was showing CPI retired rate. Performance stats with android: - CPI retired lowered by 28% (lower is better) -

[Mesa-dev] [PATCH V2] i965 : Optimize atom state flag checks

From: Aravindan Muthukumar <aravindan.muthuku...@intel.com> This patch improves CPI Rate(Cycles per Instruction) and branch mispredict for i965. The function check_state() was showing CPI retired rate. Performance stats with android: CPI retired lowered by 28% (lower is better)

[Mesa-dev] [PATCH] i965 : Performance Improvement

From: Aravindan M This patch improves CPI Rate(Cycles per Instruction) and CPU time utilization for i965. The functions check_state and brw_pipeline_state_finished was found poor CPU utilization from performance analysis. Change-Id:

[Mesa-dev] [PATCH] i965 : Performance Improvement

From: Aravindan M This patch improves CPI Rate(Cycles per Instruction) and CPU time utilization for i965. The functions check_state and brw_pipeline_state_finished was found poor CPU utilization from performance analysis. Change-Id: