From: Marek Olšák <marek.ol...@amd.com>

The main impact is that {upload, draw, upload, draw, ..} doesn't flush
framebuffer caches before every upload.

Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
---
 src/gallium/drivers/r600/r600_hw_context.c | 15 +--------------
 1 file changed, 1 insertion(+), 14 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_hw_context.c 
b/src/gallium/drivers/r600/r600_hw_context.c
index 1ae3f04..04c3cb2 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -448,15 +448,7 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
        src_offset += r600_resource(src)->gpu_address;
 
        /* Flush the caches where the resources are bound. */
-       rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
-                        R600_CONTEXT_INV_VERTEX_CACHE |
-                        R600_CONTEXT_INV_TEX_CACHE |
-                        R600_CONTEXT_FLUSH_AND_INV |
-                        R600_CONTEXT_FLUSH_AND_INV_CB |
-                        R600_CONTEXT_FLUSH_AND_INV_DB |
-                        R600_CONTEXT_FLUSH_AND_INV_CB_META |
-                        R600_CONTEXT_FLUSH_AND_INV_DB_META |
-                        R600_CONTEXT_STREAMOUT_FLUSH |
+       rctx->b.flags |= r600_get_flush_flags(R600_COHERENCY_SHADER) |
                         R600_CONTEXT_WAIT_3D_IDLE;
 
        /* There are differences between R700 and EG in CP DMA,
@@ -514,11 +506,6 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
         * should precede it.
         */
        r600_emit_pfp_sync_me(rctx);
-
-       /* Invalidate the read caches. */
-       rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE |
-                        R600_CONTEXT_INV_VERTEX_CACHE |
-                        R600_CONTEXT_INV_TEX_CACHE;
 }
 
 void r600_dma_copy_buffer(struct r600_context *rctx,
-- 
2.7.4

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