Re: [Mesa-dev] [PATCH 10/25] i965: Use separate enums for register vs immediate types

2017-08-09 Thread Scott D Phillips
Matt Turner writes: > On Tue, Aug 8, 2017 at 4:25 PM, Scott D Phillips > wrote: >>> + [BRW_HW_IMM_TYPE_UV] = 2, >>> + [BRW_HW_IMM_TYPE_VF] = 4, >>> + [BRW_HW_IMM_TYPE_V] = 2, >> >> Is this right? I see it was there

Re: [Mesa-dev] [PATCH 10/25] i965: Use separate enums for register vs immediate types

2017-08-09 Thread Matt Turner
On Tue, Aug 8, 2017 at 4:25 PM, Scott D Phillips wrote: >> + [BRW_HW_IMM_TYPE_UV] = 2, >> + [BRW_HW_IMM_TYPE_VF] = 4, >> + [BRW_HW_IMM_TYPE_V] = 2, > > Is this right? I see it was there before, and perhaps I'm being dense, > but it seems

Re: [Mesa-dev] [PATCH 10/25] i965: Use separate enums for register vs immediate types

2017-08-08 Thread Scott D Phillips
Matt Turner writes: > The hardware encodings often mean different things depending on whether > the source is an immediate. > --- > src/intel/compiler/brw_disasm.c | 46 --- > src/intel/compiler/brw_eu_compact.c | 8 +-- >

[Mesa-dev] [PATCH 10/25] i965: Use separate enums for register vs immediate types

2017-08-04 Thread Matt Turner
The hardware encodings often mean different things depending on whether the source is an immediate. --- src/intel/compiler/brw_disasm.c | 46 --- src/intel/compiler/brw_eu_compact.c | 8 +-- src/intel/compiler/brw_eu_defines.h | 48 +--