Re: [Mesa-dev] [PATCH 3/4] radeonsi: allow tessellation on CU1 and ES on CU0

On 20.01.2016 19:20, Marek Olšák wrote: On Wed, Jan 20, 2016 at 6:30 PM, Nicolai Hähnle wrote: On 19.01.2016 20:20, Marek Olšák wrote: From: Marek Olšák We don't use on-chip GS, so it's not required to reserve CU1 for ES. Why is a deadlock not

Re: [Mesa-dev] [PATCH 3/4] radeonsi: allow tessellation on CU1 and ES on CU0

On 19.01.2016 20:20, Marek Olšák wrote: From: Marek Olšák We don't use on-chip GS, so it's not required to reserve CU1 for ES. Why is a deadlock not possible with an off-chip GS ring? Nicolai --- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- 1 file changed, 2

Re: [Mesa-dev] [PATCH 3/4] radeonsi: allow tessellation on CU1 and ES on CU0

On Wed, Jan 20, 2016 at 6:30 PM, Nicolai Hähnle wrote: > On 19.01.2016 20:20, Marek Olšák wrote: >> >> From: Marek Olšák >> >> We don't use on-chip GS, so it's not required to reserve CU1 for ES. > > > Why is a deadlock not possible with an off-chip GS

[Mesa-dev] [PATCH 3/4] radeonsi: allow tessellation on CU1 and ES on CU0

From: Marek Olšák We don't use on-chip GS, so it's not required to reserve CU1 for ES. --- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c