v4:
* Force thread_local_id_index to -1 for now, and have
fs_visitor::setup_cs_payload look at thread_local_id_index. This
enables us to more easily cut over from the old local ID layout to
the new layout, as suggested by Jason.
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
---
src/intel/vulkan/anv_pipeline.c | 4 ++++
src/mesa/drivers/dri/i965/brw_compiler.h | 1 +
src/mesa/drivers/dri/i965/brw_cs.c | 3 +++
src/mesa/drivers/dri/i965/brw_fs.cpp | 18 +++++++++++++++++-
4 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 789bc1a..504f0be 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -338,6 +338,10 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
pipeline->needs_data_cache = true;
}
+ if (stage == MESA_SHADER_COMPUTE)
+ ((struct brw_cs_prog_data *)prog_data)->thread_local_id_index =
+ prog_data->nr_params++; /* The CS Thread ID uniform */
+
if (nir->info.num_ssbos > 0)
pipeline->needs_data_cache = true;
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h
b/src/mesa/drivers/dri/i965/brw_compiler.h
index 0844694..bed969c 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -433,6 +433,7 @@ struct brw_cs_prog_data {
bool uses_barrier;
bool uses_num_work_groups;
unsigned local_invocation_id_regs;
+ int thread_local_id_index;
struct {
/** @{
diff --git a/src/mesa/drivers/dri/i965/brw_cs.c
b/src/mesa/drivers/dri/i965/brw_cs.c
index a9cbde9..2a25584 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.c
+++ b/src/mesa/drivers/dri/i965/brw_cs.c
@@ -93,6 +93,9 @@ brw_codegen_cs_prog(struct brw_context *brw,
*/
int param_count = cp->program.Base.nir->num_uniforms / 4;
+ /* The backend also sometimes add a param for the thread local id. */
+ prog_data.thread_local_id_index = param_count++;
+
/* The backend also sometimes adds params for texture size. */
param_count += 2 *
ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits;
prog_data.base.param =
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 00d937e..e8a3aab 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5621,7 +5621,8 @@ fs_visitor::setup_cs_payload()
payload.num_regs = 1;
- if (nir->info.system_values_read & SYSTEM_BIT_LOCAL_INVOCATION_ID) {
+ if (nir->info.system_values_read & SYSTEM_BIT_LOCAL_INVOCATION_ID &&
+ prog_data->thread_local_id_index < 0) {
prog_data->local_invocation_id_regs = dispatch_width * 3 / 8;
payload.local_invocation_id_reg = payload.num_regs;
payload.num_regs += prog_data->local_invocation_id_regs;
@@ -6551,6 +6552,21 @@ brw_compile_cs(const struct brw_compiler *compiler, void
*log_data,
true);
brw_nir_lower_cs_shared(shader);
prog_data->base.total_shared += shader->num_shared;
+
+ /* The driver isn't yet ready to support thread_local_id_index, so we force
+ * it to disabled for now.
+ */
+ prog_data->thread_local_id_index = -1;
+
+ /* Now that we cloned the nir_shader, we can update num_uniforms based on
+ * the thread_local_id_index.
+ */
+ if (prog_data->thread_local_id_index >= 0) {
+ shader->num_uniforms =
+ MAX2(shader->num_uniforms,
+ (unsigned)4 * (prog_data->thread_local_id_index + 1));
+ }
+
shader = brw_postprocess_nir(shader, compiler->devinfo, true);
prog_data->local_size[0] = shader->info.cs.local_size[0];
--
2.8.1
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