Hello list, The candidate for the Mesa 17.0.3 is now available. Currently we have: - 32 queued - 1 nominated (outstanding) - and 2 rejected patch(es)
The current queue consists of fixes in several fronts. There are several patches addressing improvements in the API validation and the GLSL compiler We have several patches for the Intel drivers (both GL and Vulkan), including a fix for a hang with GfxBench 4.0 CarChase, several improvements in the Vulkan driver and other crash fixes. Galleon drivers have seen fixed an existing deadlock too. For radeonsi, we now include the polaris12 pci id and a fix for a hang after a shader compile failure. nouveau is benefiting now from performance improvements, specially for the Feral-ported games and some other fixes. radv, freedreno and clover include some few fixes too. On integration side - we had a swr build fix with llvm >= 5.0 and also a fix for building with MSVC. For those of you wondering - the delay was caused mainly by a miscommunication on my size while checking the proposed fix involving the use of the v4 for DRI2's flush extension. Take a look at section "Mesa stable queue" for more information. Testing reports/general approval -------------------------------- Any testing reports (or general approval of the state of the branch) will be greatly appreciated. The plan is to have 17.0.3 this Saturday (1st of April), around or shortly after 15:00 GMT. If you have any questions or suggestions - be that about the current patch queue or otherwise, please go ahead. Trivial merge conflicts ----------------------- commit d46506ac2289c7d13493ffc9fbb43513a66b3139 Author: Jason Ekstrand <jason.ekstr...@intel.com> anv/query: Invalidate the correct range (cherry picked from commit 81840130c0f147ed6ae4c26872c2f04a2167bc54) commit a6616a84d87699669961cb256b8c2feec3be86f5 Author: Jason Ekstrand <jason.ekstr...@intel.com> anv/GetQueryPoolResults: Actually implement the spec (cherry picked from commit 08df015b9de8ccb16ce6db93890910f8a02be4c6) commit 3218aed24d3adcd7e9dd015c8c5751c492ff8a46 Author: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> radv: flush DB cache before and after HTILE decompress. (cherry picked from commit a8c51b1cd9168b621e27cf5308d0dd8fc08f8a4a) commit eb6372c0b93d575eecbc3f7f8c6f0ec700c15041 Author: Jason Ekstrand <jason.ekstr...@intel.com> anv/query: Fix the location of timestamp availability (cherry picked from commit 4bbb4b95b8ba02693f5e6990b983ebb66dc6241a) commit 6cabd40211413bbf780fa61949da7dde47608792 Author: Jason Ekstrand <jason.ekstr...@intel.com> anv: Make anv_get_layerCount a macro (cherry picked from commit 1b8fa8dd794c22aba43b16470e75ecaebf902b11) commit 9973db02a04621598bf504fcc7797522ee5046de Author: Jason Ekstrand <jason.ekstr...@intel.com> anv/cmd_buffer: Apply flush operations prior to executing secondaries (cherry picked from commit 01a65dc43be3a4bf6b8a901586f7222218f4b6b3) Cheers, Andres Mesa stable queue ----------------- Nominated (1) ============= Craig Stout (1): anv/cmd_buffer: fix host memory leak Queued (32) =========== Alex Deucher (1): radeonsi: add new polaris12 pci id Andres Gomez (1): glsl: on UBO/SSBOs link error reset the number of active blocks to 0 Axel Davy (2): st/nine: Resolve deadlock in surface/volume dtors when using csmt st/nine: Use atomics for available_texture_mem Bas Nieuwenhuizen (1): radv: flush DB cache before and after HTILE decompress. Dave Airlie (1): radv: fix primitive reset index emission Ilia Mirkin (1): st/mesa: set result writemask based on ir type Jan Vesely (1): clover: use pipe_resource references Jason Ekstrand (9): anv/query: Invalidate the correct range anv/GetQueryPoolResults: Actually implement the spec anv/image: Return early when unbinding an image anv/query: Fix the location of timestamp availability anv: Make anv_get_layerCount a macro anv/blorp: Use anv_get_layerCount everywhere anv/cmd_buffer: Apply flush operations prior to executing secondaries anv/cmd_buffer: Fix bad indentation anv: Flush caches prior to PIPELINE_SELECT on all gens José Fonseca (1): c11/threads: Include thr/xtimec.h for xtime definition when building with MSVC. Juan A. Suarez Romero (1): tests/cache_test: allow crossing mount points Karol Herbst (1): nvc0/ir: treat FMA like MAD for operand propagation Kenneth Graunke (1): i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough. Marek Olšák (1): radeonsi: don't hang on shader compile failure Matt Turner (1): i965/fs: Don't emit SEL instructions for type-converting MOVs. Nanley Chery (1): intel: Correct the BDW surface state size Nicolai Hähnle (1): mesa/main: fix MultiDrawElements[BaseVertex] validation of primcount Rob Clark (1): freedreno: fix memory leak Tim Rowley (1): swr: [rasterizer jitter] fix llvm >= 5.0 build break Timothy Arceri (2): glsl: fix lower jumps for returns when loop is inside an if mesa: update lower_jumps tests after bug fix Topi Pohjolainen (1): i965/gen8+: Do full stall when switching pipeline Xu Randy (2): anv/blorp: Fix a crash in CmdClearColorImage anv/genX: Solve the vkCreateGraphicsPipelines crash Rejected (2) ============ Alex Smith (1): radv: Invalidate L2 for TRANSFER_WRITE barriers The commit addressed an earlier one [0567ab0407e] which did not land in branch. A stable specific backported patch will follow later ... Thomas Hellstrom (1): gbm/dri: Flush after unmap The commit caused a regression in i965 (and possibly others) since it didn't implement v4 of DRI2's flush extension. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev